2 ## This file is part of the sigrok project.
4 ## Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 # Macronix MX25Lxx05D SPI (NOR) flash chip protocol decoder
23 # Note: Works for MX25L1605D/MX25L3205D/MX25L6405D.
25 import sigrokdecode as srd
27 # Dict which maps command IDs to their names and descriptions.
29 0x06: ('WREN', 'Write enable'),
30 0x04: ('WRDI', 'Write disable'),
31 0x9f: ('RDID', 'Read identification'),
32 0x05: ('RDSR', 'Read status register'),
33 0x01: ('WRSR', 'Write status register'),
34 0x03: ('READ', 'Read data'),
35 0x0b: ('FAST/READ', 'Fast read data'),
36 0xbb: ('2READ', '2x I/O read'),
37 0x20: ('SE', 'Sector erase'),
38 0xd8: ('BE', 'Block erase'),
39 0x60: ('CE', 'Chip erase'),
40 0xc7: ('CE2', 'Chip erase'), # Alternative command ID
41 0x02: ('PP', 'Page program'),
42 0xad: ('CP', 'Continuously program mode'),
43 0xb9: ('DP', 'Deep power down'),
44 0xab: ('RDP/RES', 'Release from deep powerdown / Read electronic ID'),
45 0x90: ('REMS', 'Read electronic manufacturer & device ID'),
46 0xef: ('REMS2', 'Read ID for 2x I/O mode'),
47 0xb1: ('ENSO', 'Enter secured OTP'),
48 0xc1: ('EXSO', 'Exit secured OTP'),
49 0x2b: ('RDSCUR', 'Read security register'),
50 0x2f: ('WRSCUR', 'Write security register'),
51 0x70: ('ESRY', 'Enable SO to output RY/BY#'),
52 0x80: ('DSRY', 'Disable SO to output RY/BY#'),
61 def decode_status_reg(data):
62 # TODO: Additional per-bit(s) self.put() calls with correct start/end.
64 # Bits[0:0]: WIP (write in progress)
65 s = 'W' if (data & (1 << 0)) else 'No w'
66 ret = '%srite operation in progress.\n' % s
68 # Bits[1:1]: WEL (write enable latch)
69 s = '' if (data & (1 << 1)) else 'not '
70 ret += 'Internal write enable latch is %sset.\n' % s
72 # Bits[5:2]: Block protect bits
73 # TODO: More detailed decoding (chip-dependent).
74 ret += 'Block protection bits (BP3-BP0): 0x%x.\n' % ((data & 0x3c) >> 2)
76 # Bits[6:6]: Continuously program mode (CP mode)
77 s = '' if (data & (1 << 6)) else 'not '
78 ret += 'Device is %sin continuously program mode (CP mode).\n' % s
80 # Bits[7:7]: SRWD (status register write disable)
81 s = 'not ' if (data & (1 << 7)) else ''
82 ret += 'Status register writes are %sallowed.\n' % s
86 class Decoder(srd.Decoder):
90 longname = 'Macronix MX25Lxx05D'
91 desc = 'SPI (NOR) flash chip protocol.'
93 inputs = ['spi', 'logic']
94 outputs = ['mx25lxx05d']
97 {'id': 'hold', 'name': 'HOLD#', 'desc': 'TODO.'},
98 {'id': 'wp_acc', 'name': 'WP#/ACC', 'desc': 'TODO.'},
102 ['Text', 'Human-readable text'],
105 def __init__(self, **kwargs):
111 def start(self, metadata):
112 # self.out_proto = self.add(srd.OUTPUT_PROTO, 'mx25lxx05d')
113 self.out_ann = self.add(srd.OUTPUT_ANN, 'mx25lxx05d')
118 def putx(self, data):
119 # Simplification, most annotations span exactly one SPI byte/packet.
120 self.put(self.ss, self.es, self.out_ann, data)
122 def handle_wren(self, mosi, miso):
123 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
126 # TODO: Check/display device ID / name
127 def handle_rdid(self, mosi, miso):
128 if self.cmdstate == 1:
129 # Byte 1: Master sends command ID.
130 self.start_sample = self.ss
131 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
132 elif self.cmdstate == 2:
133 # Byte 2: Slave sends the JEDEC manufacturer ID.
134 self.putx([0, ['Manufacturer ID: 0x%02x' % miso]])
135 elif self.cmdstate == 3:
136 # Byte 3: Slave sends the memory type (0x20 for this chip).
137 self.putx([0, ['Memory type: 0x%02x' % miso]])
138 elif self.cmdstate == 4:
139 # Byte 4: Slave sends the device ID.
140 self.device_id = miso
141 self.putx([0, ['Device ID: 0x%02x' % miso]])
143 if self.cmdstate == 4:
144 # TODO: Check self.device_id is valid & exists in device_names.
145 # TODO: Same device ID? Check!
146 d = 'Device: Macronix %s' % device_name[self.device_id]
147 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
152 # TODO: Warn/abort if we don't see the necessary amount of bytes.
153 # TODO: Warn if WREN was not seen before.
154 def handle_se(self, mosi, miso):
155 if self.cmdstate == 1:
156 # Byte 1: Master sends command ID.
158 self.start_sample = self.ss
159 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
160 elif self.cmdstate in (2, 3, 4):
161 # Bytes 2/3/4: Master sends sectror address (24bits, MSB-first).
162 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
163 # self.putx([0, ['Sector address, byte %d: 0x%02x' % \
164 # (4 - self.cmdstate, mosi)]])
166 if self.cmdstate == 4:
167 d = 'Erase sector %d (0x%06x)' % (self.addr, self.addr)
168 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
169 # TODO: Max. size depends on chip, check that too if possible.
170 if self.addr % 4096 != 0:
171 # Sector addresses must be 4K-aligned (same for all 3 chips).
172 d = 'Warning: Invalid sector address!' # TODO: type == WARN?
173 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
178 def handle_rems(self, mosi, miso):
179 if self.cmdstate == 1:
180 # Byte 1: Master sends command ID.
181 self.start_sample = self.ss
182 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
183 elif self.cmdstate in (2, 3):
184 # Bytes 2/3: Master sends two dummy bytes.
185 # TODO: Check dummy bytes? Check reply from device?
186 self.putx([0, ['Dummy byte: %s' % mosi]])
187 elif self.cmdstate == 4:
188 # Byte 4: Master sends 0x00 or 0x01.
189 # 0x00: Master wants manufacturer ID as first reply byte.
190 # 0x01: Master wants device ID as first reply byte.
191 self.manufacturer_id_first = True if (mosi == 0x00) else False
192 d = 'manufacturer' if (mosi == 0x00) else 'device'
193 self.putx([0, ['Master wants %s ID first' % d]])
194 elif self.cmdstate == 5:
195 # Byte 5: Slave sends manufacturer ID (or device ID).
197 d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
198 self.putx([0, ['%s ID' % d]])
199 elif self.cmdstate == 6:
200 # Byte 6: Slave sends device ID (or manufacturer ID).
201 self.ids.append(miso)
202 d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
203 self.putx([0, ['%s ID' % d]])
205 if self.cmdstate == 6:
206 self.end_sample = self.es
207 id = self.ids[1] if self.manufacturer_id_first else self.ids[0]
208 self.putx([0, ['Device: Macronix %s' % device_name[id]]])
213 def handle_rdsr(self, mosi, miso):
214 # Read status register: Master asserts CS#, sends RDSR command,
215 # reads status register byte. If CS# is kept asserted, the status
216 # register can be read continuously / multiple times in a row.
217 # When done, the master de-asserts CS# again.
218 if self.cmdstate == 1:
219 # Byte 1: Master sends command ID.
220 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
221 elif self.cmdstate >= 2:
222 # Bytes 2-x: Slave sends status register as long as master clocks.
223 if self.cmdstate <= 3: # TODO: While CS# asserted.
224 self.putx([0, ['Status register: 0x%02x' % miso]])
225 self.putx([0, [decode_status_reg(miso)]])
227 if self.cmdstate == 3: # TODO: If CS# got de-asserted.
233 def handle_pp(self, mosi, miso):
234 # Page program: Master asserts CS#, sends PP command, sends 3-byte
235 # page address, sends >= 1 data bytes, de-asserts CS#.
236 if self.cmdstate == 1:
237 # Byte 1: Master sends command ID.
238 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
239 elif self.cmdstate in (2, 3, 4):
240 # Bytes 2/3/4: Master sends page address (24bits, MSB-first).
241 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
242 # self.putx([0, ['Page address, byte %d: 0x%02x' % \
243 # (4 - self.cmdstate, mosi)]])
244 if self.cmdstate == 4:
245 self.putx([0, ['Page address: 0x%06x' % self.addr]])
247 elif self.cmdstate >= 5:
248 # Bytes 5-x: Master sends data bytes (until CS# de-asserted).
249 # TODO: For now we hardcode 256 bytes per page / PP command.
250 if self.cmdstate <= 256 + 4: # TODO: While CS# asserted.
251 self.data.append(mosi)
252 # self.putx([0, ['New data byte: 0x%02x' % mosi]])
254 if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted.
255 # s = ', '.join(map(hex, self.data))
256 s = ''.join(map(chr, self.data))
257 self.putx([0, ['Page data: %s' % s]])
264 def handle_read(self, mosi, miso):
265 # Read data bytes: Master asserts CS#, sends READ command, sends
266 # 3-byte address, reads >= 1 data bytes, de-asserts CS#.
267 if self.cmdstate == 1:
268 # Byte 1: Master sends command ID.
269 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
270 elif self.cmdstate in (2, 3, 4):
271 # Bytes 2/3/4: Master sends read address (24bits, MSB-first).
272 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
273 # self.putx([0, ['Read address, byte %d: 0x%02x' % \
274 # (4 - self.cmdstate, mosi)]])
275 if self.cmdstate == 4:
276 self.putx([0, ['Read address: 0x%06x' % self.addr]])
278 elif self.cmdstate >= 5:
279 # Bytes 5-x: Master reads data bytes (until CS# de-asserted).
280 # TODO: For now we hardcode 256 bytes per READ command.
281 if self.cmdstate <= 256 + 4: # TODO: While CS# asserted.
282 self.data.append(miso)
283 # self.putx([0, ['New read byte: 0x%02x' % miso]])
285 if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted.
286 # s = ', '.join(map(hex, self.data))
287 s = ''.join(map(chr, self.data))
288 self.putx([0, ['Read data: %s' % s]])
295 def decode(self, ss, es, data):
297 ptype, mosi, miso = data
299 # if ptype == 'DATA':
300 # self.putx([0, ['MOSI: 0x%02x, MISO: 0x%02x' % (mosi, miso)]])
302 # if ptype == 'CS-CHANGE':
303 # if mosi == 1 and miso == 0:
304 # self.putx([0, ['Asserting CS#']])
305 # elif mosi == 0 and miso == 1:
306 # self.putx([0, ['De-asserting CS#']])
311 self.ss, self.es = ss, es
313 # If we encountered a known chip command, enter the resp. state.
314 if self.state == None:
319 if self.state in cmds:
320 s = 'handle_%s' % cmds[self.state][0].lower().replace('/', '_')
321 handle_reg = getattr(self, s)
322 handle_reg(mosi, miso)
324 self.putx([0, ['Unknown command: 0x%02x' % mosi]])