From: Diego Asanza <redacted>
Date: Sun, 8 May 2016 17:13:12 +0000 (+0200)
Subject: dslogic: Fix sampling for high samplerates.
X-Git-Tag: libsigrok-0.5.0~405
X-Git-Url: https://sigrok.org/gitweb/?p=libsigrok.git;a=commitdiff_plain;h=a04b28ce2c2e504e38b23fcfff236bdb527a5097

dslogic: Fix sampling for high samplerates.

This patch fixes sampling at 100MHz, 200MHz and 400MHz.

Signed-off-by: Diego Asanza <redacted>
---

diff --git a/src/hardware/fx2lafw/api.c b/src/hardware/fx2lafw/api.c
index 17ae297c..73365494 100644
--- a/src/hardware/fx2lafw/api.c
+++ b/src/hardware/fx2lafw/api.c
@@ -809,6 +809,19 @@ static int start_transfers(const struct sr_dev_inst *sdi)
 		devc->trigger_fired = TRUE;
 
 	num_transfers = fx2lafw_get_number_of_transfers(devc);
+
+	//if (devc->dslogic)
+	//	num_transfers = dslogic_get_number_of_transfers(devc);
+
+	if ( devc->dslogic){
+		if(devc->cur_samplerate == SR_MHZ(100))
+			num_transfers = 16;
+		else if (devc->cur_samplerate == SR_MHZ(200))
+			num_transfers = 8;
+		else if (devc->cur_samplerate == SR_MHZ(400))
+			num_transfers = 4;
+	}
+
 	size = fx2lafw_get_buffer_size(devc);
 	devc->submitted_transfers = 0;
 
@@ -830,6 +843,7 @@ static int start_transfers(const struct sr_dev_inst *sdi)
 		libusb_fill_bulk_transfer(transfer, usb->devhdl,
 				endpoint | LIBUSB_ENDPOINT_IN, buf, size,
 				fx2lafw_receive_transfer, (void *)sdi, timeout);
+		sr_info("submitting transfer: %d", i);
 		if ((ret = libusb_submit_transfer(transfer)) != 0) {
 			sr_err("Failed to submit transfer: %s.",
 			       libusb_error_name(ret));
diff --git a/src/hardware/fx2lafw/dslogic.c b/src/hardware/fx2lafw/dslogic.c
index d5bb153e..1b4c80f2 100644
--- a/src/hardware/fx2lafw/dslogic.c
+++ b/src/hardware/fx2lafw/dslogic.c
@@ -358,14 +358,15 @@ SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi)
 			v16 |= 1 << 2;
 		}
 	}
-	if (devc->limit_samples > DS_MAX_LOGIC_DEPTH && !devc->dslogic_continuous_mode){
+	if (devc->limit_samples > DS_MAX_LOGIC_DEPTH * ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE) 
+		&& !devc->dslogic_continuous_mode){
 		/* enable rle for long captures.
 		   Without this, captured data present errors. */
 		v16 |= 1<< 3;
 	}
 
 	WL16(&cfg.mode, v16);
-	v32 = ceil(SR_MHZ(100) * 1.0 / devc->cur_samplerate);
+	v32 = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
 	WL32(&cfg.divider, v32);
 	WL32(&cfg.count, devc->limit_samples);
 
@@ -381,3 +382,35 @@ SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi)
 
 	return SR_OK;
 }
+
+static int to_bytes_per_ms(struct dev_context* devc){
+	if (devc->cur_samplerate > SR_MHZ(100))
+        return SR_MHZ(100) / 1000 * (devc->sample_wide ? 2 : 1);
+    return devc->cur_samplerate / 1000 * (devc->sample_wide ? 2 : 1);	
+}
+
+static size_t get_buffer_size(struct dev_context *devc)
+{
+    size_t s;
+
+    /*
+     * The buffer should be large enough to hold 10ms of data and
+     * a multiple of 512.
+     */
+    s = 10 * to_bytes_per_ms(devc);
+    //s = to_bytes_per_ms(devc->cur_samplerate);
+    return (s + 511) & ~511;
+}
+
+SR_PRIV int dslogic_get_number_of_transfers(struct dev_context* devc){
+	unsigned int n;
+	/* Total buffer size should be able to hold about 100ms of data. */
+	n = (100 * to_bytes_per_ms(devc) /
+		get_buffer_size(devc));
+	sr_info("New calculation: %d", n);
+
+	if (n > NUM_SIMUL_TRANSFERS)
+		return NUM_SIMUL_TRANSFERS;
+
+	return n;
+}
diff --git a/src/hardware/fx2lafw/dslogic.h b/src/hardware/fx2lafw/dslogic.h
index 6cb827d3..1c10d7d5 100644
--- a/src/hardware/fx2lafw/dslogic.h
+++ b/src/hardware/fx2lafw/dslogic.h
@@ -35,8 +35,8 @@
 #define DS_START_FLAGS_SAMPLE_WIDE	(1 << 5)
 #define DS_START_FLAGS_MODE_LA		(1 << 4)
 
-/* enable rle to capture more samples than this limit */
-#define DS_MAX_LOGIC_DEPTH	16000000
+#define DS_MAX_LOGIC_DEPTH	SR_MHZ(16)
+#define DS_MAX_LOGIC_SAMPLERATE SR_MHZ(100)
 
 enum dslogic_operation_modes {
 	DS_OP_NORMAL,
@@ -145,5 +145,6 @@ SR_PRIV int dslogic_start_acquisition(const struct sr_dev_inst *sdi);
 SR_PRIV int dslogic_stop_acquisition(const struct sr_dev_inst *sdi);
 SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi);
 SR_PRIV int dslogic_set_vth(const struct sr_dev_inst *sdi, double vth);
+SR_PRIV int dslogic_get_number_of_transfers(struct dev_context* devc);
 
 #endif