From: Frank Stettner <redacted>
Date: Mon, 4 Jan 2021 13:36:18 +0000 (+0100)
Subject: arachnid-labs-re-load-pro: Fix for get voltage and current while in acquisition.
X-Git-Url: https://sigrok.org/gitweb/?p=libsigrok.git;a=commitdiff_plain;h=8fb9afcacd279e7c8febad89ba9d491ce9f8a164

arachnid-labs-re-load-pro: Fix for get voltage and current while in acquisition.

[ gsi: moved intruction order to unify with other cond signalling code paths ]
---

diff --git a/src/hardware/arachnid-labs-re-load-pro/protocol.c b/src/hardware/arachnid-labs-re-load-pro/protocol.c
index 2c1031a2..36785b2c 100644
--- a/src/hardware/arachnid-labs-re-load-pro/protocol.c
+++ b/src/hardware/arachnid-labs-re-load-pro/protocol.c
@@ -336,6 +336,7 @@ static void handle_packet(const struct sr_dev_inst *sdi)
 	devc->voltage = g_ascii_strtod(tokens[2], NULL) / 1000;
 	devc->current = g_ascii_strtod(tokens[1], NULL) / 1000;
 	g_strfreev(tokens);
+	g_cond_signal(&devc->voltage_cond);
 
 	/* Begin frame. */
 	std_session_send_df_frame_begin(sdi);