]> sigrok.org Git - libsigrok.git/commitdiff
hwdriver: Add configuration key for number of powerline cycles
authorAlexandru Gagniuc <redacted>
Sat, 5 Mar 2016 07:25:15 +0000 (23:25 -0800)
committerUwe Hermann <redacted>
Wed, 30 Mar 2016 10:39:25 +0000 (12:39 +0200)
High precision multimeters have a special setting, called "number of
powerline cycles" (NPLC) which determines the integration time of the
ADC in terms of the power line period. Some devices need their NPLC
adjusted from the default value before they can measure at their full
rated precision.

include/libsigrok/libsigrok.h
src/hwdriver.c

index 3daf616d80e471d8253f0b810c09e586bdab9042..31ee5dce44e8bace1f3d9af5bd10ca64ce0f287b 100644 (file)
@@ -1015,6 +1015,9 @@ enum sr_configkey {
        /** The device supports setting a probe factor. */
        SR_CONF_PROBE_FACTOR,
 
+       /** Number of powerline cycles for ADC integration time. */
+       SR_CONF_ADC_POWERLINE_CYCLES,
+
        /* Update sr_key_info_config[] (hwdriver.c) upon changes! */
 
        /*--- Acquisition modes, sample limiting ----------------------------*/
index 81a86a7998a5de184f5411a37b42d7c8b8793846..b31242ad7799dec7aef83d974bce5372b16f7e2b 100644 (file)
@@ -189,6 +189,8 @@ static struct sr_key_info sr_key_info_config[] = {
                "Data source", NULL},
        {SR_CONF_PROBE_FACTOR, SR_T_UINT64, "probe_factor",
                "Probe factor", NULL},
+       {SR_CONF_ADC_POWERLINE_CYCLES, SR_T_FLOAT, "nplc",
+               "Number of ADC powerline cycles", NULL},
 
        /* Acquisition modes, sample limiting */
        {SR_CONF_LIMIT_MSEC, SR_T_UINT64, "limit_time",