X-Git-Url: https://sigrok.org/gitweb/?p=libsigrok.git;a=blobdiff_plain;f=src%2Fhardware%2Fscpi-pps%2Fprofiles.c;h=45feb72f2d8fce6cf5e2679718c9dc01a290a2a4;hp=93718be1c97dfe7c470c903756d4cb8ccebf71ab;hb=5433907ed99c40e948b8350f55845dd88a5cbbe6;hpb=dbc519f72038baff3bc026e45efa683e95880c19 diff --git a/src/hardware/scpi-pps/profiles.c b/src/hardware/scpi-pps/profiles.c index 93718be1..45feb72f 100644 --- a/src/hardware/scpi-pps/profiles.c +++ b/src/hardware/scpi-pps/profiles.c @@ -442,14 +442,26 @@ static const uint32_t hp_6630a_devopts_cg[] = { SR_CONF_CURRENT | SR_CONF_GET, SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST, SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET | SR_CONF_LIST, SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET, + SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, + SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE | SR_CONF_GET, + SR_CONF_REGULATION | SR_CONF_GET, +}; + +static const struct channel_spec hp_6632a_ch[] = { + { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00125, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, }; static const struct channel_spec hp_6633a_ch[] = { { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS }, }; +static const struct channel_spec hp_6634a_ch[] = { + { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.00025, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS }, +}; + static const struct channel_group_spec hp_6630a_cg[] = { { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC }, }; @@ -461,12 +473,104 @@ static const struct scpi_command hp_6630a_cmd[] = { { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" }, { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" }, { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "STS?" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" }, { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" }, { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" }, - { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" }, + { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, "STS?" }, + { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION_ACTIVE, "STS?" }, + { SCPI_CMD_GET_OUTPUT_REGULATION, "STS?" }, ALL_ZERO }; +static int hp_6630a_init_acquisition(const struct sr_dev_inst *sdi) +{ + struct sr_scpi_dev_inst *scpi; + + scpi = sdi->conn; + + /* + * Monitor CV (1), CC+ (2), UR (4), OVP (8), OTP (16), OCP (64) and + * CC- (256) bits of the Status Register for the FAULT? query. + */ + return sr_scpi_send(scpi, "UNMASK 607"); +} + +static int hp_6630a_update_status(const struct sr_dev_inst *sdi) +{ + struct sr_scpi_dev_inst *scpi; + int ret; + int fault; + gboolean cv, cc_pos, unreg, cc_neg; + gboolean regulation_changed; + char *regulation; + + scpi = sdi->conn; + + /* + * Use the FAULT register (only 0->1 transitions), this way multiple set + * regulation bits in the STS/ASTS registers are ignored. In rare cases + * we will miss some changes (1->0 transitions, e.g. no regulation at all), + * but SPS/ASPS doesn't work either, unless all states are stored and + * compared to the states in STS/ASTS. + * TODO: Use SPoll or SRQ when SCPI over GPIB is used. + */ + ret = sr_scpi_get_int(scpi, "FAULT?", &fault); + if (ret != SR_OK) + return ret; + + /* OVP */ + if (fault & (1 << 3)) + sr_session_send_meta(sdi, SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE, + g_variant_new_boolean(fault & (1 << 3))); + + /* OCP */ + if (fault & (1 << 6)) + sr_session_send_meta(sdi, SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE, + g_variant_new_boolean(fault & (1 << 6))); + + /* OTP */ + if (fault & (1 << 4)) + sr_session_send_meta(sdi, SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE, + g_variant_new_boolean(fault & (1 << 4))); + + /* CV */ + cv = (fault & (1 << 0)); + regulation_changed = (fault & (1 << 0)); + /* CC+ */ + cc_pos = (fault & (1 << 1)); + regulation_changed = (fault & (1 << 1)) | regulation_changed; + /* UNREG */ + unreg = (fault & (1 << 2)); + regulation_changed = (fault & (1 << 2)) | regulation_changed; + /* CC- */ + cc_neg = (fault & (1 << 9)); + regulation_changed = (fault & (1 << 9)) | regulation_changed; + + if (regulation_changed) { + if (cv && !cc_pos && !cc_neg && !unreg) + regulation = "CV"; + else if (cc_pos && !cv && !cc_neg && !unreg) + regulation = "CC"; + else if (cc_neg && !cv && !cc_pos && !unreg) + regulation = "CC-"; + else if (unreg && !cv && !cc_pos && !cc_neg) + regulation = "UR"; + else if (!cv && !cc_pos && !cc_neg && !unreg) + regulation = ""; + else { + sr_dbg("Undefined regulation for HP 66xxA " + "(CV=%i, CC+=%i, CC-=%i, UR=%i).", + cv, cc_pos, cc_neg, unreg); + return FALSE; + } + sr_session_send_meta(sdi, SR_CONF_REGULATION, + g_variant_new_string(regulation)); + } + + return SR_OK; +} + /* HP 663xB series */ static const uint32_t hp_6630b_devopts[] = { SR_CONF_CONTINUOUS, @@ -488,6 +592,22 @@ static const uint32_t hp_6630b_devopts_cg[] = { SR_CONF_REGULATION | SR_CONF_GET, }; +static const struct channel_spec hp_6611c_ch[] = { + { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 5.1188, 0.00125, 4, 5 }, { 0, 41.92297 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS }, +}; + +static const struct channel_spec hp_6612c_ch[] = { + { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 41.92256 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, +}; + +static const struct channel_spec hp_6613c_ch[] = { + { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 1.0238, 0.00025, 4, 5 }, { 0, 52.40627 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS }, +}; + +static const struct channel_spec hp_6614c_ch[] = { + { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 0.5118, 0.000125, 4, 5 }, { 0, 52.39808 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS }, +}; + static const struct channel_spec hp_6631b_ch[] = { { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 10.237, 0.00263, 4, 5 }, { 0, 83.84103 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS }, }; @@ -496,6 +616,10 @@ static const struct channel_spec hp_6632b_ch[] = { { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, }; +static const struct channel_spec hp_66312a_ch[] = { + { "1", { 0, 20.475, 0.0001, 4, 5 }, { 0, 2.0475, 0.0001, 4, 5 }, { 0, 41.92256 }, FREQ_DC_ONLY, { 0, 22, 0.01 }, NO_OCP_LIMITS }, +}; + static const struct channel_spec hp_66332a_ch[] = { { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, }; @@ -513,6 +637,10 @@ static const struct channel_group_spec hp_6630b_cg[] = { }; static const struct scpi_command hp_6630b_cmd[] = { + /* + * SCPI_CMD_REMOTE and SCPI_CMD_LOCAL are not used when GPIB is used, + * otherwise the device will report (non critical) error 602. + */ { SCPI_CMD_REMOTE, "SYST:REM" }, { SCPI_CMD_LOCAL, "SYST:LOC" }, { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" }, @@ -536,7 +664,7 @@ static const struct scpi_command hp_6630b_cmd[] = { ALL_ZERO }; -static int hp_6630b_init_aquisition(const struct sr_dev_inst *sdi) +static int hp_6630b_init_acquisition(const struct sr_dev_inst *sdi) { struct sr_scpi_dev_inst *scpi; int ret; @@ -650,8 +778,8 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) /* * Check if output state has changed, due to one of the * questionable states changed. - * NOTE: The output state is send even if it hasn't changed, but that - * only happends rarely. + * NOTE: The output state is sent even if it hasn't changed, + * but that only happens rarely. */ ret = sr_scpi_get_bool(scpi, "OUTP:STAT?", &output_enabled); if (ret != SR_OK) @@ -683,7 +811,7 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) } if (regulation_changed) { - if (cv && !cc_pos && !cc_neg &&!unreg) + if (cv && !cc_pos && !cc_neg && !unreg) regulation = "CV"; else if (cc_pos && !cv && !cc_neg && !unreg) regulation = "CC"; @@ -691,11 +819,11 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) regulation = "CC-"; else if (unreg && !cv && !cc_pos && !cc_neg) regulation = "UR"; - else if (!cv && !cc_pos && !cc_neg &&!unreg) - /* This happends in case of OCP active */ + else if (!cv && !cc_pos && !cc_neg && !unreg) + /* This happens in case of OCP active. */ regulation = ""; else { - /* This happends from time to time (CV and CC+ active). */ + /* This happens from time to time (CV and CC+ active). */ sr_dbg("Undefined regulation for HP 66xxB " "(CV=%i, CC+=%i, CC-=%i, UR=%i).", cv, cc_pos, cc_neg, unreg); @@ -708,6 +836,53 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) return SR_OK; } +/* Owon P4000 series */ +static const uint32_t owon_p4000_devopts[] = { + SR_CONF_CONTINUOUS, + SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, + SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET +}; + +static const uint32_t owon_p4000_devopts_cg[] = { + SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, + SR_CONF_VOLTAGE | SR_CONF_GET, + SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_CURRENT | SR_CONF_GET, + SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, + SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, +}; + +static const struct channel_spec owon_p4603_ch[] = { + { "1", { 0.01, 60, 0.001, 3, 3 }, { 0.001, 3, 0.001, 3, 3 }, { 0, 180, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 61, 0.001}, { 0.001, 3.1, 0.001} }, +}; + +static const struct channel_spec owon_p4305_ch[] = { + { "1", { 0.01, 30, 0.001, 3, 3 }, { 0.001, 5, 0.001, 3, 3 }, { 0, 180, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 31, 0.001}, { 0.001, 3.1, 0.001} }, +}; + +static const struct channel_group_spec owon_p4000_cg[] = { + { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC }, +}; + +static const struct scpi_command owon_p4000_cmd[] = { + { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" }, + { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, + { SCPI_CMD_GET_MEAS_POWER, "MEAS:POW?" }, + { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" }, + { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" }, + { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" }, + { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" }, + { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" }, + { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP 1" }, + { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP 0" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM?" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM %.6f" }, + { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM?" }, + { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM %.6f" }, + ALL_ZERO +}; + /* Philips/Fluke PM2800 series */ static const uint32_t philips_pm2800_devopts[] = { SR_CONF_CONTINUOUS, @@ -909,6 +1084,83 @@ static const struct scpi_command rs_hmc8043_cmd[] = { ALL_ZERO }; +static const uint32_t rs_hmp4040_devopts[] = { + SR_CONF_CONTINUOUS, + SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, + SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, +}; + +static const uint32_t rs_hmp4040_devopts_cg[] = { + SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET, + SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, + SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, + SR_CONF_VOLTAGE | SR_CONF_GET, + SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_CURRENT | SR_CONF_GET, + SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, + SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE | SR_CONF_GET, + SR_CONF_REGULATION | SR_CONF_GET, +}; + +static const struct channel_spec rs_hmp2020_ch[] = { + { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, +}; + +static const struct channel_spec rs_hmp2030_ch[] = { + { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, +}; + +static const struct channel_spec rs_hmp4040_ch[] = { + { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "4", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, +}; + +static const struct channel_group_spec rs_hmp4040_cg[] = { + { "1", CH_IDX(0), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, + { "2", CH_IDX(1), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, + { "3", CH_IDX(2), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, + { "4", CH_IDX(3), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, +}; + +/* + * Developer's note: Currently unused device commands. Some of them + * are not in use because SCPI_CMD codes are not defined yet. + * OUTP:GEN + * VOLT? MAX, CURR? MAX + * VOLT:PROT:CLE (could set SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE) + * VOLT:PROT:MODE + * FUSE:STAT, FUSE:TRIP?, FUSE:LINK, FUSE:UNL + * ARB:... + * SYST:LOC, SYST:REM, SYST:RWL, SYST:MIX + * SYST:BEEP:IMM + */ +static const struct scpi_command rs_hmp4040_cmd[] = { + { SCPI_CMD_REMOTE, "SYST:REM" }, + { SCPI_CMD_LOCAL, "SYST:LOC" }, + { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" }, + { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" }, + { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, + { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" }, + { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" }, + { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" }, + { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" }, + { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" }, + { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" }, + { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" }, + { SCPI_CMD_GET_OUTPUT_REGULATION, "STAT:QUES:INST:ISUM%s:COND?" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" }, + { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION_ACTIVE, "STAT:QUES:INST:ISUM%s:COND?" }, + ALL_ZERO +}; + SR_PRIV const struct scpi_pps pps_profiles[] = { /* Agilent N5763A */ { "Agilent", "N5763A", SCPI_DIALECT_UNKNOWN, 0, @@ -918,7 +1170,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(agilent_n5700a_cg), agilent_n5700a_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -930,7 +1182,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(agilent_n5700a_cg), agilent_n5700a_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -942,7 +1194,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(bk_9130_cg), bk_9130_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -954,7 +1206,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(chroma_61604_cg), chroma_61604_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -966,10 +1218,40 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { NULL, 0, chroma_62000_cmd, .probe_channels = chroma_62000p_probe_channels, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, + /* + * This entry is for testing the HP COMP language with a HP 6632B power + * supply switched to the COMP language ("SYST:LANG COMP"). When used, + * disable the entry for the HP 6632B below! + */ + /* + { "HP", "6632B", SCPI_DIALECT_HP_COMP, 0, + ARRAY_AND_SIZE(hp_6630a_devopts), + ARRAY_AND_SIZE(hp_6630a_devopts_cg), + ARRAY_AND_SIZE(hp_6632a_ch), + ARRAY_AND_SIZE(hp_6630a_cg), + hp_6630a_cmd, + .probe_channels = NULL, + hp_6630a_init_acquisition, + hp_6630a_update_status, + }, + */ + + /* HP 6632A */ + { "HP", "6632A", SCPI_DIALECT_HP_COMP, 0, + ARRAY_AND_SIZE(hp_6630a_devopts), + ARRAY_AND_SIZE(hp_6630a_devopts_cg), + ARRAY_AND_SIZE(hp_6632a_ch), + ARRAY_AND_SIZE(hp_6630a_cg), + hp_6630a_cmd, + .probe_channels = NULL, + hp_6630a_init_acquisition, + hp_6630a_update_status, + }, + /* HP 6633A */ { "HP", "6633A", SCPI_DIALECT_HP_COMP, 0, ARRAY_AND_SIZE(hp_6630a_devopts), @@ -978,8 +1260,68 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(hp_6630a_cg), hp_6630a_cmd, .probe_channels = NULL, - .init_aquisition = NULL, - .update_status = NULL, + hp_6630a_init_acquisition, + hp_6630a_update_status, + }, + + /* HP 6634A */ + { "HP", "6634A", SCPI_DIALECT_HP_COMP, 0, + ARRAY_AND_SIZE(hp_6630a_devopts), + ARRAY_AND_SIZE(hp_6630a_devopts_cg), + ARRAY_AND_SIZE(hp_6634a_ch), + ARRAY_AND_SIZE(hp_6630a_cg), + hp_6630a_cmd, + .probe_channels = NULL, + hp_6630a_init_acquisition, + hp_6630a_update_status, + }, + + /* HP 6611C */ + { "HP", "6611C", SCPI_DIALECT_HP_66XXB, PPS_OTP, + ARRAY_AND_SIZE(hp_6630b_devopts), + ARRAY_AND_SIZE(hp_6630b_devopts_cg), + ARRAY_AND_SIZE(hp_6611c_ch), + ARRAY_AND_SIZE(hp_6630b_cg), + hp_6630b_cmd, + .probe_channels = NULL, + hp_6630b_init_acquisition, + hp_6630b_update_status, + }, + + /* HP 6612C */ + { "HP", "6612C", SCPI_DIALECT_HP_66XXB, PPS_OTP, + ARRAY_AND_SIZE(hp_6630b_devopts), + ARRAY_AND_SIZE(hp_6630b_devopts_cg), + ARRAY_AND_SIZE(hp_6612c_ch), + ARRAY_AND_SIZE(hp_6630b_cg), + hp_6630b_cmd, + .probe_channels = NULL, + hp_6630b_init_acquisition, + hp_6630b_update_status, + }, + + /* HP 6613C */ + { "HP", "6613C", SCPI_DIALECT_HP_66XXB, PPS_OTP, + ARRAY_AND_SIZE(hp_6630b_devopts), + ARRAY_AND_SIZE(hp_6630b_devopts_cg), + ARRAY_AND_SIZE(hp_6613c_ch), + ARRAY_AND_SIZE(hp_6630b_cg), + hp_6630b_cmd, + .probe_channels = NULL, + hp_6630b_init_acquisition, + hp_6630b_update_status, + }, + + /* HP 6614C */ + { "HP", "6614C", SCPI_DIALECT_HP_66XXB, PPS_OTP, + ARRAY_AND_SIZE(hp_6630b_devopts), + ARRAY_AND_SIZE(hp_6630b_devopts_cg), + ARRAY_AND_SIZE(hp_6614c_ch), + ARRAY_AND_SIZE(hp_6630b_cg), + hp_6630b_cmd, + .probe_channels = NULL, + hp_6630b_init_acquisition, + hp_6630b_update_status, }, /* HP 6631B */ @@ -990,7 +1332,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(hp_6630b_cg), hp_6630b_cmd, .probe_channels = NULL, - hp_6630b_init_aquisition, + hp_6630b_init_acquisition, hp_6630b_update_status, }, @@ -1002,7 +1344,19 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(hp_6630b_cg), hp_6630b_cmd, .probe_channels = NULL, - hp_6630b_init_aquisition, + hp_6630b_init_acquisition, + hp_6630b_update_status, + }, + + /* HP 66312A */ + { "HP", "66312A", SCPI_DIALECT_HP_66XXB, PPS_OTP, + ARRAY_AND_SIZE(hp_6630b_devopts), + ARRAY_AND_SIZE(hp_6630b_devopts_cg), + ARRAY_AND_SIZE(hp_66312a_ch), + ARRAY_AND_SIZE(hp_6630b_cg), + hp_6630b_cmd, + .probe_channels = NULL, + hp_6630b_init_acquisition, hp_6630b_update_status, }, @@ -1014,7 +1368,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(hp_6630b_cg), hp_6630b_cmd, .probe_channels = NULL, - hp_6630b_init_aquisition, + hp_6630b_init_acquisition, hp_6630b_update_status, }, @@ -1026,7 +1380,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(hp_6630b_cg), hp_6630b_cmd, .probe_channels = NULL, - hp_6630b_init_aquisition, + hp_6630b_init_acquisition, hp_6630b_update_status, }, @@ -1038,7 +1392,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(hp_6630b_cg), hp_6630b_cmd, .probe_channels = NULL, - hp_6630b_init_aquisition, + hp_6630b_init_acquisition, hp_6630b_update_status, }, @@ -1050,7 +1404,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(rigol_dp700_cg), rigol_dp700_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, { "Rigol", "^DP712$", SCPI_DIALECT_UNKNOWN, 0, @@ -1060,7 +1414,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(rigol_dp700_cg), rigol_dp700_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -1072,7 +1426,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(rigol_dp820_cg), rigol_dp800_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, { "Rigol", "^DP831A$", SCPI_DIALECT_UNKNOWN, PPS_OTP, @@ -1082,7 +1436,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(rigol_dp830_cg), rigol_dp800_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, { "Rigol", "^(DP832|DP832A)$", SCPI_DIALECT_UNKNOWN, PPS_OTP, @@ -1092,7 +1446,29 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(rigol_dp830_cg), rigol_dp800_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + + /* Owon P4000 series */ + { "OWON", "^P4305$", SCPI_DIALECT_UNKNOWN, 0, + ARRAY_AND_SIZE(owon_p4000_devopts), + ARRAY_AND_SIZE(owon_p4000_devopts_cg), + ARRAY_AND_SIZE(owon_p4305_ch), + ARRAY_AND_SIZE(owon_p4000_cg), + owon_p4000_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "OWON", "^P4603$", SCPI_DIALECT_UNKNOWN, 0, + ARRAY_AND_SIZE(owon_p4000_devopts), + ARRAY_AND_SIZE(owon_p4000_devopts_cg), + ARRAY_AND_SIZE(owon_p4603_ch), + ARRAY_AND_SIZE(owon_p4000_cg), + owon_p4000_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -1104,7 +1480,7 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { NULL, 0, philips_pm2800_cmd, philips_pm2800_probe_channels, - .init_aquisition = NULL, + .init_acquisition = NULL, .update_status = NULL, }, @@ -1116,7 +1492,70 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { ARRAY_AND_SIZE(rs_hmc8043_cg), rs_hmc8043_cmd, .probe_channels = NULL, - .init_aquisition = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + + /* Hameg / Rohde&Schwarz HMP4000 series */ + /* TODO Match on regex, pass scpi_pps item to .probe_channels(). */ + { "HAMEG", "HMP4030", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp4040_ch, 3, + rs_hmp4040_cg, 3, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "HAMEG", "HMP4040", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + ARRAY_AND_SIZE(rs_hmp4040_ch), + ARRAY_AND_SIZE(rs_hmp4040_cg), + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP2020", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp2020_ch, 2, + rs_hmp4040_cg, 2, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP2030", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp2030_ch, 3, + rs_hmp4040_cg, 3, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP4030", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp4040_ch, 3, + rs_hmp4040_cg, 3, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP4040", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + ARRAY_AND_SIZE(rs_hmp4040_ch), + ARRAY_AND_SIZE(rs_hmp4040_cg), + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, .update_status = NULL, }, };