X-Git-Url: https://sigrok.org/gitweb/?p=libsigrok.git;a=blobdiff_plain;f=src%2Fhardware%2Frigol-ds%2Fprotocol.c;h=02a484f32935d6cecf0a8a6e0e9807437a514224;hp=8e12990173dbe8e5e95c82122e127c534fd5c499;hb=704910e32ca97421e59009f1e384b9fc94a5a75b;hpb=55bece00aae2a53a0e25a685ee3ca111dc29fd12

diff --git a/src/hardware/rigol-ds/protocol.c b/src/hardware/rigol-ds/protocol.c
index 8e129901..02a484f3 100644
--- a/src/hardware/rigol-ds/protocol.c
+++ b/src/hardware/rigol-ds/protocol.c
@@ -333,12 +333,17 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 	struct dev_context *devc;
 	gchar *trig_mode;
 	unsigned int num_channels, i, j;
+	int buffer_samples;
 
 	if (!(devc = sdi->priv))
 		return SR_ERR;
 
-	sr_dbg("Starting data capture for frameset %" PRIu64 " of %" PRIu64,
-	       devc->num_frames + 1, devc->limit_frames);
+	if (devc->limit_frames == 0)
+		sr_dbg("Starting data capture for frameset %" PRIu64,
+		       devc->num_frames + 1);
+	else
+		sr_dbg("Starting data capture for frameset %" PRIu64 " of %"
+		       PRIu64, devc->num_frames + 1, devc->limit_frames);
 
 	switch (devc->model->series->protocol) {
 	case PROTOCOL_V1:
@@ -365,6 +370,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 		break;
 	case PROTOCOL_V3:
 	case PROTOCOL_V4:
+	case PROTOCOL_V5:
 		if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
 			return SR_ERR;
 		if (devc->data_source == DATA_SOURCE_LIVE) {
@@ -377,7 +383,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 			if (devc->model->series->protocol == PROTOCOL_V3) {
 				if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
 					return SR_ERR;
-			} else if (devc->model->series->protocol == PROTOCOL_V4) {
+			} else if (devc->model->series->protocol >= PROTOCOL_V4) {
 				num_channels = 0;
 
 				/* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
@@ -394,12 +400,29 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 					}
 				}
 
-				devc->analog_frame_size = devc->digital_frame_size =
-					num_channels == 1 ?
-						devc->model->series->buffer_samples :
-							num_channels == 2 ?
-								devc->model->series->buffer_samples / 2 :
-								devc->model->series->buffer_samples / 4;
+				buffer_samples = devc->model->series->buffer_samples;
+				if (buffer_samples == 0)
+				{
+					/* The DS4000 series does not have a fixed memory depth, it
+					 * can be chosen from the menu and also varies with number
+					 * of active channels. Retrieve the actual number with the
+					 * ACQ:MDEP command. */
+					sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples);
+					devc->analog_frame_size = devc->digital_frame_size =
+							buffer_samples;
+				}
+				else
+				{
+					/* The DS1000Z series has a fixed memory depth which we
+					 * need to divide correctly according to the number of
+					 * active channels. */
+					devc->analog_frame_size = devc->digital_frame_size =
+						num_channels == 1 ?
+							buffer_samples :
+								num_channels == 2 ?
+									buffer_samples / 2 :
+									buffer_samples / 4;
+				}
 			}
 
 			if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
@@ -455,6 +478,7 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 		}
 		break;
 	case PROTOCOL_V4:
+	case PROTOCOL_V5:
 		if (ch->type == SR_CHANNEL_ANALOG) {
 			if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 					ch->index + 1) != SR_OK)
@@ -469,6 +493,11 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 					devc->data_source == DATA_SOURCE_LIVE ?
 						":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
 			return SR_ERR;
+
+		if (devc->data_source != DATA_SOURCE_LIVE) {
+			if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
+				return SR_ERR;
+		}
 		break;
 	}
 
@@ -627,9 +656,12 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 				return TRUE;
 		}
 
-		if (devc->model->series->protocol >= PROTOCOL_V3)
+		if (devc->model->series->protocol >= PROTOCOL_V3) {
+			if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
+				return TRUE;
 			if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
 				return TRUE;
+		}
 
 		if (sr_scpi_read_begin(scpi) != SR_OK)
 			return TRUE;
@@ -642,8 +674,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 				return TRUE;
 			if (len == -1) {
 				sr_err("Error while reading block header, aborting capture.");
-				packet.type = SR_DF_FRAME_END;
-				sr_session_send(sdi, &packet);
+				std_session_send_df_frame_end(sdi);
 				sr_dev_acquisition_stop(sdi);
 				return TRUE;
 			}
@@ -675,8 +706,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 
 	if (len == -1) {
 		sr_err("Error while reading block data, aborting capture.");
-		packet.type = SR_DF_FRAME_END;
-		sr_session_send(sdi, &packet);
+		std_session_send_df_frame_end(sdi);
 		sr_dev_acquisition_stop(sdi);
 		return TRUE;
 	}
@@ -714,7 +744,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 		// TODO: For the MSO1000Z series, we need a way to express that
 		// this data is in fact just for a single channel, with the valid
 		// data for that channel in the LSB of each byte.
-		logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
+		logic.unitsize = devc->model->series->protocol >= PROTOCOL_V4 ? 1 : 2;
 		logic.data = devc->buffer;
 		packet.type = SR_DF_LOGIC;
 		packet.payload = &logic;
@@ -734,13 +764,8 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 			if (devc->data_source != DATA_SOURCE_LIVE)
 				rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 		}
-		/* End acquisition when data for all channels is acquired. */
 		if (!sr_scpi_read_complete(scpi) && !devc->channel_entry->next) {
 			sr_err("Read should have been completed");
-			packet.type = SR_DF_FRAME_END;
-			sr_session_send(sdi, &packet);
-			sr_dev_acquisition_stop(sdi);
-			return TRUE;
 		}
 		devc->num_block_read = 0;
 	} else {
@@ -772,10 +797,9 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 		rigol_ds_channel_start(sdi);
 	} else {
 		/* Done with this frame. */
-		packet.type = SR_DF_FRAME_END;
-		sr_session_send(sdi, &packet);
+		std_session_send_df_frame_end(sdi);
 
-		if (++devc->num_frames == devc->limit_frames) {
+		if (++devc->num_frames == devc->limit_frames || devc->data_source == DATA_SOURCE_MEMORY) {
 			/* Last frame, stop capture. */
 			sr_dev_acquisition_stop(sdi);
 		} else {
@@ -785,8 +809,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 			rigol_ds_capture_start(sdi);
 
 			/* Start of next frame. */
-			packet.type = SR_DF_FRAME_BEGIN;
-			sr_session_send(sdi, &packet);
+			std_session_send_df_frame_begin(sdi);
 		}
 	}
 
@@ -827,9 +850,12 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 		sr_dbg("Logic analyzer %s, current digital channel state:",
 				devc->la_enabled ? "enabled" : "disabled");
 		for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
-			cmd = g_strdup_printf(
-				devc->model->series->protocol >= PROTOCOL_V3 ?
-					":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
+			if (devc->model->series->protocol >= PROTOCOL_V5)
+				cmd = g_strdup_printf(":LA:DISP? D%d", i);
+			else if (devc->model->series->protocol >= PROTOCOL_V3)
+				cmd = g_strdup_printf(":LA:DIG%d:DISP?", i);
+			else
+				cmd = g_strdup_printf(":DIG%d:TURN?", i);
 			res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
 			g_free(cmd);
 			if (res != SR_OK)
@@ -879,7 +905,8 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 	sr_dbg("Current trigger source %s", devc->trigger_source);
 
 	/* Horizontal trigger position. */
-	if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
+	if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str,
+			&devc->horiz_triggerpos) != SR_OK)
 		return SR_ERR;
 	sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);