X-Git-Url: https://sigrok.org/gitweb/?p=libsigrok.git;a=blobdiff_plain;f=hardware%2Fasix-sigma%2Fasix-sigma.c;h=bdb797a013a668303199abfb338ddc5ce3dbec66;hp=bb90b41ae507b5e7262864a0c365d0d800f93831;hb=d261dbbfcc73;hpb=6c39d99a2809c0065b8bd547c426a08f42445e92

diff --git a/hardware/asix-sigma/asix-sigma.c b/hardware/asix-sigma/asix-sigma.c
index bb90b41a..bdb797a0 100644
--- a/hardware/asix-sigma/asix-sigma.c
+++ b/hardware/asix-sigma/asix-sigma.c
@@ -57,8 +57,12 @@ static uint64_t supported_samplerates[] = {
 	0,
 };
 
+/*
+ * Probe numbers seem to go from 1-16, according to this image:
+ * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
+ * (the cable has two additional GND pins, and a TI and TO pin)
+ */
 static const char *probe_names[NUM_PROBES + 1] = {
-	"0",
 	"1",
 	"2",
 	"3",
@@ -74,6 +78,7 @@ static const char *probe_names[NUM_PROBES + 1] = {
 	"13",
 	"14",
 	"15",
+	"16",
 	NULL,
 };