};
static const uint32_t devopts[] = {
- SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
+ SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
SR_CONF_SAMPLERATE | SR_CONF_GET,
SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_NUM_HDIV | SR_CONF_GET,
"Segmented",
};
+static const struct rigol_ds_command std_cmd[] = {
+ { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
+ { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
+};
+
+static const struct rigol_ds_command mso7000a_cmd[] = {
+ { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
+ { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
+};
+
enum vendor {
RIGOL,
AGILENT,
DS2000,
DS2000A,
DSO1000,
+ DSO1000B,
DS1000Z,
+ DS4000,
+ MSO5000,
+ MSO7000A,
};
/* short name, full name */
{1000, 1}, {500, 1000000}, 14, 1400, 14000},
[DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
{50, 1}, {2, 1000}, 12, 600, 20480},
+ [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
+ {50, 1}, {2, 1000}, 12, 600, 20480},
[DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
{50, 1}, {1, 1000}, 12, 1200, 12000000},
+ [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
+ {1000, 1}, {1, 1000}, 14, 1400, 0},
+ [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2,
+ {1000, 1}, {500, 1000000}, 10, 1000, 0},
+ [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
+ {50, 1}, {2, 1000}, 10, 1000, 8000000},
};
#define SERIES(x) &supported_series[x]
digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
/* series, model, min timebase, analog channels, digital */
static const struct rigol_ds_model supported_models[] = {
- {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false)},
- {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false)},
- {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true)},
- {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true)},
- {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true)},
- {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true)},
- {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false)},
- {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true)},
- {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true)},
- {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false)},
- {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false)},
- {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false)},
- {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false)},
- {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true)},
- {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true)},
- {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true)},
- {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true)},
+ {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000), "DS1152E-EDU", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(DS1000Z), "DS1102Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000Z), "DS1202Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
+ {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(DS4000), "DS4014", {1, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
+ {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd},
+ {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+ {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd},
+ /* TODO: Digital channels are not yet supported on MSO7000A. */
+ {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
};
static struct sr_dev_driver rigol_ds_driver_info;
+static int analog_frame_size(const struct sr_dev_inst *);
+
static void clear_helper(struct dev_context *devc)
{
unsigned int i;
channel_name = g_strdup_printf("CH%d", i + 1);
ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
- devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
-
- devc->analog_groups[i]->name = channel_name;
+ devc->analog_groups[i] = sr_channel_group_new(sdi,
+ channel_name, NULL);
devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
- sdi->channel_groups = g_slist_append(sdi->channel_groups,
- devc->analog_groups[i]);
}
if (devc->model->has_digital) {
- devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
-
+ devc->digital_group = sr_channel_group_new(sdi, "LA", NULL);
for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
channel_name = g_strdup_printf("D%d", i);
ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
devc->digital_group->channels = g_slist_append(
devc->digital_group->channels, ch);
}
- devc->digital_group->name = g_strdup("LA");
- sdi->channel_groups = g_slist_append(sdi->channel_groups,
- devc->digital_group);
}
for (i = 0; i < ARRAY_SIZE(timebases); i++) {
case DATA_SOURCE_LIVE:
return devc->model->series->live_samples;
case DATA_SOURCE_MEMORY:
+ case DATA_SOURCE_SEGMENTED:
return devc->model->series->buffer_samples / analog_channels;
default:
return 0;
case DATA_SOURCE_LIVE:
return devc->model->series->live_samples * 2;
case DATA_SOURCE_MEMORY:
+ case DATA_SOURCE_SEGMENTED:
return devc->model->series->buffer_samples * 2;
default:
return 0;
struct dev_context *devc;
struct sr_channel *ch;
const char *tmp_str;
- uint64_t samplerate;
int analog_channel = -1;
float smallest_diff = INFINITY;
int idx = -1;
else
*data = g_variant_new_string("Segmented");
break;
+ case SR_CONF_LIMIT_FRAMES:
+ *data = g_variant_new_uint64(devc->limit_frames);
+ break;
case SR_CONF_SAMPLERATE:
- if (devc->data_source == DATA_SOURCE_LIVE) {
- samplerate = analog_frame_size(sdi) /
- (devc->timebase * devc->model->series->num_horizontal_divs);
- *data = g_variant_new_uint64(samplerate);
- } else {
- sr_dbg("Unknown data source: %d.", devc->data_source);
- return SR_ERR_NA;
- }
+ *data = g_variant_new_uint64(devc->sample_rate);
break;
case SR_CONF_TRIGGER_SOURCE:
if (!strcmp(devc->trigger_source, "ACL"))
* need to express this in seconds. */
t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
- return rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
+ return rigol_ds_config_set(sdi,
+ devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
case SR_CONF_TRIGGER_LEVEL:
t_dbl = g_variant_get_double(data);
g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
struct sr_scpi_dev_inst *scpi;
struct dev_context *devc;
struct sr_channel *ch;
- struct sr_datafeed_packet packet;
gboolean some_digital;
GSList *l;
+ char *cmd;
+ int protocol;
+ int ret;
scpi = sdi->conn;
devc = sdi->priv;
+ protocol = devc->model->series->protocol;
devc->num_frames = 0;
+ devc->num_frames_segmented = 0;
some_digital = FALSE;
for (l = sdi->channels; l; l = l->next) {
/* Only one list entry for older protocols. All channels are
* retrieved together when this entry is processed. */
if (ch->enabled && (
- devc->model->series->protocol > PROTOCOL_V3 ||
+ protocol > PROTOCOL_V3 ||
!some_digital))
devc->enabled_channels = g_slist_append(
devc->enabled_channels, ch);
some_digital = TRUE;
/* Turn on LA module if currently off. */
if (!devc->la_enabled) {
- if (rigol_ds_config_set(sdi,
- devc->model->series->protocol >= PROTOCOL_V3 ?
+ if (rigol_ds_config_set(sdi, protocol >= PROTOCOL_V3 ?
":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
return SR_ERR;
devc->la_enabled = TRUE;
}
if (ch->enabled != devc->digital_channels[ch->index]) {
/* Enabled channel is currently disabled, or vice versa. */
- if (rigol_ds_config_set(sdi,
- devc->model->series->protocol >= PROTOCOL_V3 ?
- ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
+ if (protocol >= PROTOCOL_V5)
+ cmd = ":LA:DISP D%d,%s";
+ else if (protocol >= PROTOCOL_V3)
+ cmd = ":LA:DIG%d:DISP %s";
+ else
+ cmd = ":DIG%d:TURN %s";
+
+ if (rigol_ds_config_set(sdi, cmd, ch->index,
ch->enabled ? "ON" : "OFF") != SR_OK)
return SR_ERR;
devc->digital_channels[ch->index] = ch->enabled;
/* Set memory mode. */
if (devc->data_source == DATA_SOURCE_SEGMENTED) {
- sr_err("Data source 'Segmented' not yet supported");
- return SR_ERR;
+ switch (protocol) {
+ case PROTOCOL_V1:
+ case PROTOCOL_V2:
+ /* V1 and V2 do not have segmented data */
+ sr_err("Data source 'Segmented' not supported on this model");
+ break;
+ case PROTOCOL_V3:
+ case PROTOCOL_V4:
+ {
+ int frames = 0;
+ if (sr_scpi_get_int(sdi->conn,
+ protocol == PROTOCOL_V4 ? "FUNC:WREP:FEND?" :
+ "FUNC:WREP:FMAX?", &frames) != SR_OK)
+ return SR_ERR;
+ if (frames <= 0) {
+ sr_err("No segmented data available");
+ return SR_ERR;
+ }
+ devc->num_frames_segmented = frames;
+ break;
+ }
+ case PROTOCOL_V5:
+ /* The frame limit has to be read on the fly, just set up
+ * reading of the first frame */
+ if (rigol_ds_config_set(sdi, "REC:CURR 1") != SR_OK)
+ return SR_ERR;
+ break;
+ default:
+ sr_err("Data source 'Segmented' not yet supported");
+ return SR_ERR;
+ }
}
devc->analog_frame_size = analog_frame_size(sdi);
devc->channel_entry = devc->enabled_channels;
+ if (devc->data_source == DATA_SOURCE_LIVE) {
+ devc->sample_rate = analog_frame_size(sdi) /
+ (devc->timebase * devc->model->series->num_horizontal_divs);
+ } else {
+ float xinc;
+ if (devc->model->series->protocol < PROTOCOL_V3) {
+ sr_err("Cannot get samplerate (below V3).");
+ return SR_ERR;
+ }
+ ret = sr_scpi_get_float(sdi->conn, "WAV:XINC?", &xinc);
+ if (ret != SR_OK) {
+ sr_err("Cannot get samplerate (WAV:XINC? failed).");
+ return SR_ERR;
+ }
+ if (!xinc) {
+ sr_err("Cannot get samplerate (zero XINC value).");
+ return SR_ERR;
+ }
+ devc->sample_rate = 1. / xinc;
+ }
+
if (rigol_ds_capture_start(sdi) != SR_OK)
return SR_ERR;
/* Start of first frame. */
- packet.type = SR_DF_FRAME_BEGIN;
- sr_session_send(sdi, &packet);
+ std_session_send_df_frame_begin(sdi);
return SR_OK;
}
projects / libsigrok.git / blobdiff