src/hardware/scpi-pps/profiles.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
   5  *
   6  * This program is free software: you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation, either version 3 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <string.h>
  21 #include "protocol.h"
  22
  23 #define CH_IDX(x) (1 << x)
  24
  25 const char *pps_vendors[][2] = {
  26         { "RIGOL TECHNOLOGIES", "Rigol" },
  27         { "HEWLETT-PACKARD", "HP" },
  28 };
  29
  30 const char *get_vendor(const char *raw_vendor)
  31 {
  32         unsigned int i;
  33
  34         for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
  35                 if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
  36                         return pps_vendors[i][1];
  37         }
  38
  39         return raw_vendor;
  40 }
  41
  42 static const uint32_t devopts_none[] = { };
  43
  44 /* Rigol DP800 series */
  45 static const uint32_t rigol_dp800_devopts[] = {
  46         SR_CONF_POWER_SUPPLY,
  47         SR_CONF_CONTINUOUS,
  48         SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
  49 };
  50
  51 static const uint32_t rigol_dp800_devopts_cg[] = {
  52         SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
  53         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
  54         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
  55         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  56         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
  57         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
  58         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  59         SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
  60         SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  61         SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
  62         SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  63         SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
  64 };
  65
  66 struct channel_spec rigol_dp831_ch[] = {
  67         { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 } },
  68         { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 } },
  69         { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 } },
  70 };
  71
  72 struct channel_spec rigol_dp832_ch[] = {
  73         { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 } },
  74         { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 } },
  75         { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 } },
  76 };
  77
  78 struct channel_group_spec rigol_dp800_cg[] = {
  79         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
  80         { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
  81         { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
  82 };
  83
  84 struct scpi_command rigol_dp800_cmd[] = {
  85         { SCPI_CMD_KEY_UNLOCK, "SYST:KLOCK OFF" },
  86         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT? CH%s" },
  87         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR? CH%s" },
  88         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE? CH%s" },
  89         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR%s:VOLT?" },
  90         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR%s:VOLT %.6f" },
  91         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR%s:CURR?" },
  92         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR%s:CURR %.6f" },
  93         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP? CH%s" },
  94         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP CH%s,ON" },
  95         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP CH%s,OFF" },
  96         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE? CH%s" },
  97         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
  98         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
  99         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
 100         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP? CH%s" },
 101         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP CH%s,ON" },
 102         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP CH%s,OFF" },
 103         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES? CH%s" },
 104         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL? CH%s" },
 105         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL CH%s,%.6f" },
 106         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP? CH%s" },
 107         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP CH%s,ON" },
 108         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP CH%s,OFF" },
 109         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES? CH%s" },
 110         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL? CH%s" },
 111         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL CH%s,%.6f" },
 112 };
 113
 114 /* HP 663xx series */
 115 static const uint32_t hp_6632b_devopts[] = {
 116         SR_CONF_POWER_SUPPLY,
 117         SR_CONF_CONTINUOUS,
 118         SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
 119         SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
 120         SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
 121         SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 122         SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 123 };
 124
 125 struct channel_spec hp_6632b_ch[] = {
 126         { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 } },
 127 };
 128
 129 struct channel_group_spec hp_6632b_cg[] = {
 130         { "1", CH_IDX(0), 0 },
 131 };
 132
 133 struct scpi_command hp_6632b_cmd[] = {
 134         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
 135         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
 136         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
 137         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 138         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 139         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 140         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 141         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 142         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 143 };
 144
 145
 146 SR_PRIV const struct scpi_pps pps_profiles[] = {
 147         /* HP 6632B */
 148         { "HP", "6632B", 0,
 149                 ARRAY_AND_SIZE(hp_6632b_devopts),
 150                 ARRAY_AND_SIZE(devopts_none),
 151                 ARRAY_AND_SIZE(hp_6632b_ch),
 152                 ARRAY_AND_SIZE(hp_6632b_cg),
 153                 ARRAY_AND_SIZE(hp_6632b_cmd),
 154         },
 155
 156         /* Rigol DP800 series */
 157         { "Rigol", "^DP831A$", PPS_OTP,
 158                 ARRAY_AND_SIZE(rigol_dp800_devopts),
 159                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
 160                 ARRAY_AND_SIZE(rigol_dp831_ch),
 161                 ARRAY_AND_SIZE(rigol_dp800_cg),
 162                 ARRAY_AND_SIZE(rigol_dp800_cmd),
 163         },
 164         { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
 165                 ARRAY_AND_SIZE(rigol_dp800_devopts),
 166                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
 167                 ARRAY_AND_SIZE(rigol_dp832_ch),
 168                 ARRAY_AND_SIZE(rigol_dp800_cg),
 169                 ARRAY_AND_SIZE(rigol_dp800_cmd),
 170         },
 171 };
 172 SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);
 173