src/hardware/scpi-pps/profiles.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
   5  * Copyright (C) 2015 Google, Inc.
   6  * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <string.h>
  23 #include <strings.h>
  24 #include "protocol.h"
  25
  26 #define CH_IDX(x) (1 << x)
  27 #define FREQ_DC_ONLY {0, 0, 0}
  28
  29 const char *pps_vendors[][2] = {
  30         { "RIGOL TECHNOLOGIES", "Rigol" },
  31         { "HEWLETT-PACKARD", "HP" },
  32         { "PHILIPS", "Philips" },
  33         { "Chroma ATE", "Chroma" },
  34 };
  35
  36 const char *get_vendor(const char *raw_vendor)
  37 {
  38         unsigned int i;
  39
  40         for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
  41                 if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
  42                         return pps_vendors[i][1];
  43         }
  44
  45         return raw_vendor;
  46 }
  47
  48 static const uint32_t devopts_none[] = { };
  49
  50 /* Chroma 61600 series AC source */
  51 static const uint32_t chroma_61604_devopts[] = {
  52         SR_CONF_CONTINUOUS | SR_CONF_SET,
  53 };
  54
  55 static const uint32_t chroma_61604_devopts_cg[] = {
  56         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  57         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
  58         SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
  59         SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  60         SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
  61         SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  62         SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
  63         SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
  64 };
  65
  66 const struct channel_spec chroma_61604_ch[] = {
  67         { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } },
  68 };
  69
  70 const struct channel_group_spec chroma_61604_cg[] = {
  71         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
  72 };
  73
  74 const struct scpi_command chroma_61604_cmd[] = {
  75         { SCPI_CMD_REMOTE, "SYST:REM" },
  76         { SCPI_CMD_LOCAL, "SYST:LOC" },
  77         { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
  78         { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
  79         { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
  80         { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
  81         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
  82         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
  83         { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
  84         { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
  85         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
  86         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
  87         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
  88         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
  89         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
  90         /* This is not a current limit mode. It is overcurrent protection */
  91         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
  92         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
  93 };
  94
  95 /* Rigol DP800 series */
  96 static const uint32_t rigol_dp800_devopts[] = {
  97         SR_CONF_CONTINUOUS | SR_CONF_SET,
  98         SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
  99 };
 100
 101 static const uint32_t rigol_dp800_devopts_cg[] = {
 102         SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
 103         SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 104         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 105         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 106         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 107         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 108         SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 109         SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
 110         SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 111         SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
 112         SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 113         SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
 114 };
 115
 116 const struct channel_spec rigol_dp821a_ch[] = {
 117         { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
 118         { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
 119 };
 120
 121 const struct channel_spec rigol_dp831_ch[] = {
 122         { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
 123         { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
 124         { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
 125 };
 126
 127 const struct channel_spec rigol_dp832_ch[] = {
 128         { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
 129         { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
 130         { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
 131 };
 132
 133 const struct channel_group_spec rigol_dp820_cg[] = {
 134         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
 135         { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
 136 };
 137
 138 const struct channel_group_spec rigol_dp830_cg[] = {
 139         { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
 140         { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
 141         { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
 142 };
 143
 144 const struct scpi_command rigol_dp800_cmd[] = {
 145         { SCPI_CMD_REMOTE, "SYST:REMOTE" },
 146         { SCPI_CMD_LOCAL, "SYST:LOCAL" },
 147         { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
 148         { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
 149         { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
 150         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
 151         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 152         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 153         { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
 154         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 155         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 156         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 157         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 158         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 159         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
 160         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
 161         { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
 162         { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
 163         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
 164         { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
 165         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
 166         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
 167         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
 168         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
 169         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
 170         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
 171         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
 172         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
 173         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
 174         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
 175         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
 176         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
 177 };
 178
 179 /* HP 663xx series */
 180 static const uint32_t hp_6632b_devopts[] = {
 181         SR_CONF_CONTINUOUS | SR_CONF_SET,
 182         SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
 183         SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
 184         SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
 185         SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 186         SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 187 };
 188
 189 const struct channel_spec hp_6632b_ch[] = {
 190         { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
 191 };
 192
 193 const struct channel_group_spec hp_6632b_cg[] = {
 194         { "1", CH_IDX(0), 0 },
 195 };
 196
 197 const struct scpi_command hp_6632b_cmd[] = {
 198         { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
 199         { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
 200         { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
 201         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 202         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 203         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 204         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 205         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 206         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 207 };
 208
 209 /* Philips/Fluke PM2800 series */
 210 static const uint32_t philips_pm2800_devopts[] = {
 211         SR_CONF_CONTINUOUS | SR_CONF_SET,
 212 };
 213
 214 static const uint32_t philips_pm2800_devopts_cg[] = {
 215         SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
 216         SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
 217         SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 218         SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
 219         SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 220         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
 221         SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
 222         SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
 223         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
 224         SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
 225 };
 226
 227 enum philips_pm2800_modules {
 228         PM2800_MOD_30V_10A = 1,
 229         PM2800_MOD_60V_5A,
 230         PM2800_MOD_60V_10A,
 231         PM2800_MOD_8V_15A,
 232         PM2800_MOD_60V_2A,
 233         PM2800_MOD_120V_1A,
 234 };
 235
 236 static const struct philips_pm2800_module_spec {
 237         /* Min, max, programming resolution. */
 238         float voltage[3];
 239         float current[3];
 240 } philips_pm2800_module_specs[] = {
 241         /* Autoranging modules. */
 242         [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
 243         [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
 244         [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
 245         /* Linear modules. */
 246         [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
 247         [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
 248         [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
 249 };
 250
 251 static const struct philips_pm2800_model {
 252         unsigned int chassis;
 253         unsigned int num_modules;
 254         unsigned int set;
 255         unsigned int modules[3];
 256 } philips_pm2800_matrix[] = {
 257         /* Autoranging chassis. */
 258         { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
 259         { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
 260         { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
 261         { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
 262         { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
 263         { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
 264         { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
 265         { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
 266         { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
 267         { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
 268         { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
 269         /* Linear chassis. */
 270         { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
 271         { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
 272         { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
 273         { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
 274         { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
 275         { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
 276         { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
 277 };
 278
 279 static const char *philips_pm2800_names[] = { "1", "2", "3" };
 280
 281 static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
 282                 struct sr_scpi_hw_info *hw_info,
 283                 struct channel_spec **channels, unsigned int *num_channels,
 284                 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
 285 {
 286         const struct philips_pm2800_model *model;
 287         const struct philips_pm2800_module_spec *spec;
 288         unsigned int chassis, num_modules, set, module, m, i;
 289
 290         (void)sdi;
 291
 292         /*
 293          * The model number as reported by *IDN? looks like e.g. PM2813/11,
 294          * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
 295          * 3 = linear series) and the number of modules: 1-3 for autoranging,
 296          * 1-2 for linear.
 297          * After the slash, the first digit denotes the module set. The
 298          * digit after that denotes front (5) or rear (1) binding posts.
 299          */
 300         chassis = hw_info->model[4] - 0x30;
 301         num_modules = hw_info->model[5] - 0x30;
 302         set = hw_info->model[7] - 0x30;
 303         for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
 304                 model = &philips_pm2800_matrix[m];
 305                 if (model->chassis == chassis && model->num_modules == num_modules
 306                                 && model->set == set)
 307                         break;
 308         }
 309         if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
 310                 sr_dbg("Model %s not found in matrix.", hw_info->model);
 311                 return SR_ERR;
 312         }
 313
 314         sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
 315         *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
 316         *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
 317         for (i = 0; i < num_modules; i++) {
 318                 module = model->modules[i];
 319                 spec = &philips_pm2800_module_specs[module];
 320                 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
 321                                 spec->voltage[0], spec->voltage[1],
 322                                 spec->current[0], spec->current[1]);
 323                 (*channels)[i].name = (char *)philips_pm2800_names[i];
 324                 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
 325                 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
 326                 (*channel_groups)[i].channel_index_mask = 1 << i;
 327                 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
 328         }
 329         *num_channels = *num_channel_groups = num_modules;
 330
 331         return SR_OK;
 332 }
 333
 334 const struct scpi_command philips_pm2800_cmd[] = {
 335         { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
 336         { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
 337         { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
 338         { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
 339         { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
 340         { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
 341         { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
 342         { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
 343         { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
 344         { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
 345         { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
 346         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
 347         { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
 348         { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
 349         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
 350         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
 351         { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
 352         { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
 353 };
 354
 355 SR_PRIV const struct scpi_pps pps_profiles[] = {
 356         /* Chroma 61604 */
 357         { "Chroma", "61604", 0,
 358                 ARRAY_AND_SIZE(chroma_61604_devopts),
 359                 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
 360                 ARRAY_AND_SIZE(chroma_61604_ch),
 361                 ARRAY_AND_SIZE(chroma_61604_cg),
 362                 ARRAY_AND_SIZE(chroma_61604_cmd),
 363                 .probe_channels = NULL,
 364         },
 365         /* HP 6632B */
 366         { "HP", "6632B", 0,
 367                 ARRAY_AND_SIZE(hp_6632b_devopts),
 368                 ARRAY_AND_SIZE(devopts_none),
 369                 ARRAY_AND_SIZE(hp_6632b_ch),
 370                 ARRAY_AND_SIZE(hp_6632b_cg),
 371                 ARRAY_AND_SIZE(hp_6632b_cmd),
 372                 .probe_channels = NULL,
 373         },
 374
 375         /* Rigol DP800 series */
 376         { "Rigol", "^DP821A$", PPS_OTP,
 377                 ARRAY_AND_SIZE(rigol_dp800_devopts),
 378                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
 379                 ARRAY_AND_SIZE(rigol_dp821a_ch),
 380                 ARRAY_AND_SIZE(rigol_dp820_cg),
 381                 ARRAY_AND_SIZE(rigol_dp800_cmd),
 382                 .probe_channels = NULL,
 383         },
 384         { "Rigol", "^DP831A$", PPS_OTP,
 385                 ARRAY_AND_SIZE(rigol_dp800_devopts),
 386                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
 387                 ARRAY_AND_SIZE(rigol_dp831_ch),
 388                 ARRAY_AND_SIZE(rigol_dp830_cg),
 389                 ARRAY_AND_SIZE(rigol_dp800_cmd),
 390                 .probe_channels = NULL,
 391         },
 392         { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
 393                 ARRAY_AND_SIZE(rigol_dp800_devopts),
 394                 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
 395                 ARRAY_AND_SIZE(rigol_dp832_ch),
 396                 ARRAY_AND_SIZE(rigol_dp830_cg),
 397                 ARRAY_AND_SIZE(rigol_dp800_cmd),
 398                 .probe_channels = NULL,
 399         },
 400
 401         /* Philips/Fluke PM2800 series */
 402         { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
 403                 ARRAY_AND_SIZE(philips_pm2800_devopts),
 404                 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
 405                 NULL, 0,
 406                 NULL, 0,
 407                 ARRAY_AND_SIZE(philips_pm2800_cmd),
 408                 philips_pm2800_probe_channels,
 409         },
 410 };
 411
 412 SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);