src/hardware/rigol-ds/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <stdlib.h>
  23 #include <stdarg.h>
  24 #include <unistd.h>
  25 #include <errno.h>
  26 #include <string.h>
  27 #include <math.h>
  28 #include <ctype.h>
  29 #include <time.h>
  30 #include <glib.h>
  31 #include "libsigrok.h"
  32 #include "libsigrok-internal.h"
  33 #include "protocol.h"
  34
  35 /*
  36  * This is a unified protocol driver for the DS1000 and DS2000 series.
  37  *
  38  * DS1000 support tested with a Rigol DS1102D.
  39  *
  40  * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
  41  *
  42  * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
  43  * standard. If you want to read it - it costs real money...
  44  *
  45  * Every response from the scope has a linefeed appended because the
  46  * standard says so. In principle this could be ignored because sending the
  47  * next command clears the output queue of the scope. This driver tries to
  48  * avoid doing that because it may cause an error being generated inside the
  49  * scope and who knows what bugs the firmware has WRT this.
  50  *
  51  * Waveform data is transferred in a format called "arbitrary block program
  52  * data" specified in IEEE 488.2. See Agilents programming manuals for their
  53  * 2000/3000 series scopes for a nice description.
  54  *
  55  * Each data block from the scope has a header, e.g. "#900000001400".
  56  * The '#' marks the start of a block.
  57  * Next is one ASCII decimal digit between 1 and 9, this gives the number of
  58  * ASCII decimal digits following.
  59  * Last are the ASCII decimal digits giving the number of bytes (not
  60  * samples!) in the block.
  61  *
  62  * After this header as many data bytes as indicated follow.
  63  *
  64  * Each data block has a trailing linefeed too.
  65  */
  66
  67 static int parse_int(const char *str, int *ret)
  68 {
  69         char *e;
  70         long tmp;
  71
  72         errno = 0;
  73         tmp = strtol(str, &e, 10);
  74         if (e == str || *e != '\0') {
  75                 sr_dbg("Failed to parse integer: '%s'", str);
  76                 return SR_ERR;
  77         }
  78         if (errno) {
  79                 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
  80                 return SR_ERR;
  81         }
  82         if (tmp > INT_MAX || tmp < INT_MIN) {
  83                 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
  84                 return SR_ERR;
  85         }
  86
  87         *ret = (int)tmp;
  88         return SR_OK;
  89 }
  90
  91 /* Set the next event to wait for in rigol_ds_receive */
  92 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
  93 {
  94         if (event == WAIT_STOP)
  95                 devc->wait_status = 2;
  96         else
  97                 devc->wait_status = 1;
  98         devc->wait_event = event;
  99 }
 100
 101 /*
 102  * Waiting for a event will return a timeout after 2 to 3 seconds in order
 103  * to not block the application.
 104  */
 105 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
 106 {
 107         char *buf;
 108         struct dev_context *devc;
 109         time_t start;
 110
 111         if (!(devc = sdi->priv))
 112                 return SR_ERR;
 113
 114         start = time(NULL);
 115
 116         /*
 117          * Trigger status may return:
 118          * "TD" or "T'D" - triggered
 119          * "AUTO"        - autotriggered
 120          * "RUN"         - running
 121          * "WAIT"        - waiting for trigger
 122          * "STOP"        - stopped
 123          */
 124
 125         if (devc->wait_status == 1) {
 126                 do {
 127                         if (time(NULL) - start >= 3) {
 128                                 sr_dbg("Timeout waiting for trigger");
 129                                 return SR_ERR_TIMEOUT;
 130                         }
 131
 132                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 133                                 return SR_ERR;
 134                 } while (buf[0] == status1 || buf[0] == status2);
 135
 136                 devc->wait_status = 2;
 137         }
 138         if (devc->wait_status == 2) {
 139                 do {
 140                         if (time(NULL) - start >= 3) {
 141                                 sr_dbg("Timeout waiting for trigger");
 142                                 return SR_ERR_TIMEOUT;
 143                         }
 144
 145                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 146                                 return SR_ERR;
 147                 } while (buf[0] != status1 && buf[0] != status2);
 148
 149                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 150         }
 151
 152         return SR_OK;
 153 }
 154
 155 /*
 156  * For live capture we need to wait for a new trigger event to ensure that
 157  * sample data is not returned twice.
 158  *
 159  * Unfortunately this will never really work because for sufficiently fast
 160  * timebases and trigger rates it just can't catch the status changes.
 161  *
 162  * What would be needed is a trigger event register with autoreset like the
 163  * Agilents have. The Rigols don't seem to have anything like this.
 164  *
 165  * The workaround is to only wait for the trigger when the timebase is slow
 166  * enough. Of course this means that for faster timebases sample data can be
 167  * returned multiple times, this effect is mitigated somewhat by sleeping
 168  * for about one sweep time in that case.
 169  */
 170 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
 171 {
 172         struct dev_context *devc;
 173         long s;
 174
 175         if (!(devc = sdi->priv))
 176                 return SR_ERR;
 177
 178         /*
 179          * If timebase < 50 msecs/DIV just sleep about one sweep time except
 180          * for really fast sweeps.
 181          */
 182         if (devc->timebase < 0.0499) {
 183                 if (devc->timebase > 0.99e-6) {
 184                         /*
 185                          * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
 186                          * -> 85 percent of sweep time
 187                          */
 188                         s = (devc->timebase * devc->model->series->num_horizontal_divs
 189                              * 85e6) / 100L;
 190                         sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
 191                         g_usleep(s);
 192                 }
 193                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 194                 return SR_OK;
 195         } else {
 196                 return rigol_ds_event_wait(sdi, 'T', 'A');
 197         }
 198 }
 199
 200 /* Wait for scope to got to "Stop" in single shot mode */
 201 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
 202 {
 203         return rigol_ds_event_wait(sdi, 'S', 'S');
 204 }
 205
 206 /* Check that a single shot acquisition actually succeeded on the DS2000 */
 207 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
 208 {
 209         struct dev_context *devc;
 210         struct sr_channel *ch;
 211         int tmp;
 212
 213         if (!(devc = sdi->priv))
 214                 return SR_ERR;
 215
 216         ch = devc->channel_entry->data;
 217
 218         if (devc->model->series->protocol <= PROTOCOL_V2)
 219                 return SR_OK;
 220
 221         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 222                           ch->index + 1) != SR_OK)
 223                 return SR_ERR;
 224         /* Check that the number of samples will be accepted */
 225         if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
 226                 return SR_ERR;
 227         if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
 228                 return SR_ERR;
 229         /*
 230          * If we get an "Execution error" the scope went from "Single" to
 231          * "Stop" without actually triggering. There is no waveform
 232          * displayed and trying to download one will fail - the scope thinks
 233          * it has 1400 samples (like display memory) and the driver thinks
 234          * it has a different number of samples.
 235          *
 236          * In that case just try to capture something again. Might still
 237          * fail in interesting ways.
 238          *
 239          * Ain't firmware fun?
 240          */
 241         if (tmp & 0x10) {
 242                 sr_warn("Single shot acquisition failed, retrying...");
 243                 /* Sleep a bit, otherwise the single shot will often fail */
 244                 g_usleep(500000);
 245                 rigol_ds_config_set(sdi, ":SING");
 246                 rigol_ds_set_wait_event(devc, WAIT_STOP);
 247                 return SR_ERR;
 248         }
 249
 250         return SR_OK;
 251 }
 252
 253 /* Wait for enough data becoming available in scope output buffer */
 254 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
 255 {
 256         char *buf;
 257         struct dev_context *devc;
 258         time_t start;
 259         int len;
 260
 261         if (!(devc = sdi->priv))
 262                 return SR_ERR;
 263
 264         if (devc->model->series->protocol >= PROTOCOL_V3) {
 265
 266                 start = time(NULL);
 267
 268                 do {
 269                         if (time(NULL) - start >= 3) {
 270                                 sr_dbg("Timeout waiting for data block");
 271                                 return SR_ERR_TIMEOUT;
 272                         }
 273
 274                         /*
 275                          * The scope copies data really slowly from sample
 276                          * memory to its output buffer, so try not to bother
 277                          * it too much with SCPI requests but don't wait too
 278                          * long for short sample frame sizes.
 279                          */
 280                         g_usleep(devc->analog_frame_size < 15000 ? 100000 : 1000000);
 281
 282                         /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
 283                         if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
 284                                 return SR_ERR;
 285
 286                         if (parse_int(buf + 5, &len) != SR_OK)
 287                                 return SR_ERR;
 288                 } while (buf[0] == 'R' && len < 1000000);
 289         }
 290
 291         rigol_ds_set_wait_event(devc, WAIT_NONE);
 292
 293         return SR_OK;
 294 }
 295
 296 /* Send a configuration setting. */
 297 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
 298 {
 299         struct dev_context *devc = sdi->priv;
 300         va_list args;
 301         int ret;
 302
 303         va_start(args, format);
 304         ret = sr_scpi_send_variadic(sdi->conn, format, args);
 305         va_end(args);
 306
 307         if (ret != SR_OK)
 308                 return SR_ERR;
 309
 310         if (devc->model->series->protocol == PROTOCOL_V2) {
 311                 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
 312                 sr_spew("delay %dms", 100);
 313                 g_usleep(100000);
 314                 return SR_OK;
 315         } else {
 316                 return sr_scpi_get_opc(sdi->conn);
 317         }
 318 }
 319
 320 /* Start capturing a new frameset */
 321 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 322 {
 323         struct dev_context *devc;
 324         gchar *trig_mode;
 325
 326         if (!(devc = sdi->priv))
 327                 return SR_ERR;
 328
 329         sr_dbg("Starting data capture for frameset %lu of %lu",
 330                devc->num_frames + 1, devc->limit_frames);
 331
 332         switch (devc->model->series->protocol) {
 333         case PROTOCOL_V1:
 334                 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 335                 break;
 336         case PROTOCOL_V2:
 337                 if (devc->data_source == DATA_SOURCE_LIVE) {
 338                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
 339                                 return SR_ERR;
 340                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 341                 } else {
 342                         if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 343                                 return SR_ERR;
 344                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
 345                                 return SR_ERR;
 346                         if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
 347                                 return SR_ERR;
 348                         if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
 349                                 return SR_ERR;
 350                         if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 351                                 return SR_ERR;
 352                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 353                 }
 354                 break;
 355         case PROTOCOL_V3:
 356                 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
 357                         return SR_ERR;
 358                 if (devc->data_source == DATA_SOURCE_LIVE) {
 359                         if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
 360                                 return SR_ERR;
 361                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 362                 } else {
 363                         if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
 364                                 return SR_ERR;
 365                         if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
 366                                 return SR_ERR;
 367                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 368                 }
 369                 break;
 370         }
 371
 372         return SR_OK;
 373 }
 374
 375 /* Start reading data from the current channel */
 376 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 377 {
 378         struct dev_context *devc;
 379         struct sr_channel *ch;
 380
 381         if (!(devc = sdi->priv))
 382                 return SR_ERR;
 383
 384         ch = devc->channel_entry->data;
 385
 386         sr_dbg("Starting reading data from channel %d", ch->index + 1);
 387
 388         if (devc->model->series->protocol <= PROTOCOL_V2) {
 389                 if (ch->type == SR_CHANNEL_LOGIC) {
 390                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
 391                                 return SR_ERR;
 392                 } else {
 393                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
 394                                         ch->index + 1) != SR_OK)
 395                                 return SR_ERR;
 396                 }
 397                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 398         } else {
 399                 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 400                                   ch->index + 1) != SR_OK)
 401                         return SR_ERR;
 402                 if (devc->data_source != DATA_SOURCE_LIVE) {
 403                         if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
 404                                 return SR_ERR;
 405                         if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
 406                                 return SR_ERR;
 407                 }
 408         }
 409
 410         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 411
 412         devc->num_channel_bytes = 0;
 413         devc->num_header_bytes = 0;
 414         devc->num_block_bytes = 0;
 415
 416         return SR_OK;
 417 }
 418
 419 /* Read the header of a data block */
 420 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
 421 {
 422         struct sr_scpi_dev_inst *scpi = sdi->conn;
 423         struct dev_context *devc = sdi->priv;
 424         char *buf = (char *) devc->buffer;
 425         size_t header_length;
 426         int ret;
 427
 428         /* Try to read the hashsign and length digit. */
 429         if (devc->num_header_bytes < 2) {
 430                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 431                                 2 - devc->num_header_bytes);
 432                 if (ret < 0) {
 433                         sr_err("Read error while reading data header.");
 434                         return SR_ERR;
 435                 }
 436                 devc->num_header_bytes += ret;
 437         }
 438
 439         if (devc->num_header_bytes < 2)
 440                 return 0;
 441
 442         if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
 443                 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
 444                 return SR_ERR;
 445         }
 446
 447         header_length = 2 + buf[1] - '0';
 448
 449         /* Try to read the length. */
 450         if (devc->num_header_bytes < header_length) {
 451                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 452                                 header_length - devc->num_header_bytes);
 453                 if (ret < 0) {
 454                         sr_err("Read error while reading data header.");
 455                         return SR_ERR;
 456                 }
 457                 devc->num_header_bytes += ret;
 458         }
 459
 460         if (devc->num_header_bytes < header_length)
 461                 return 0;
 462
 463         /* Read the data length. */
 464         buf[header_length] = '\0';
 465
 466         if (parse_int(buf + 2, &ret) != SR_OK) {
 467                 sr_err("Received invalid data block length '%s'.", buf + 2);
 468                 return -1;
 469         }
 470
 471         sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
 472
 473         return ret;
 474 }
 475
 476 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 477 {
 478         struct sr_dev_inst *sdi;
 479         struct sr_scpi_dev_inst *scpi;
 480         struct dev_context *devc;
 481         struct sr_datafeed_packet packet;
 482         struct sr_datafeed_analog analog;
 483         struct sr_datafeed_logic logic;
 484         double vdiv, offset;
 485         int len, i, vref;
 486         struct sr_channel *ch;
 487         gsize expected_data_bytes;
 488
 489         (void)fd;
 490
 491         if (!(sdi = cb_data))
 492                 return TRUE;
 493
 494         if (!(devc = sdi->priv))
 495                 return TRUE;
 496
 497         scpi = sdi->conn;
 498
 499         if (revents == G_IO_IN || revents == 0) {
 500                 switch(devc->wait_event) {
 501                 case WAIT_NONE:
 502                         break;
 503                 case WAIT_TRIGGER:
 504                         if (rigol_ds_trigger_wait(sdi) != SR_OK)
 505                                 return TRUE;
 506                         if (rigol_ds_channel_start(sdi) != SR_OK)
 507                                 return TRUE;
 508                         return TRUE;
 509                 case WAIT_BLOCK:
 510                         if (rigol_ds_block_wait(sdi) != SR_OK)
 511                                 return TRUE;
 512                         break;
 513                 case WAIT_STOP:
 514                         if (rigol_ds_stop_wait(sdi) != SR_OK)
 515                                 return TRUE;
 516                         if (rigol_ds_check_stop(sdi) != SR_OK)
 517                                 return TRUE;
 518                         if (rigol_ds_channel_start(sdi) != SR_OK)
 519                                 return TRUE;
 520                         return TRUE;
 521                 default:
 522                         sr_err("BUG: Unknown event target encountered");
 523                         break;
 524                 }
 525
 526                 ch = devc->channel_entry->data;
 527
 528                 expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
 529                                 devc->analog_frame_size : devc->digital_frame_size;
 530
 531                 if (devc->num_block_bytes == 0) {
 532                         if (devc->model->series->protocol >= PROTOCOL_V3)
 533                                 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
 534                                         return TRUE;
 535
 536                         if (sr_scpi_read_begin(scpi) != SR_OK)
 537                                 return TRUE;
 538
 539                         if (devc->format == FORMAT_IEEE488_2) {
 540                                 sr_dbg("New block header expected");
 541                                 len = rigol_ds_read_header(sdi);
 542                                 if (len == 0)
 543                                         /* Still reading the header. */
 544                                         return TRUE;
 545                                 if (len == -1) {
 546                                         sr_err("Read error, aborting capture.");
 547                                         packet.type = SR_DF_FRAME_END;
 548                                         sr_session_send(cb_data, &packet);
 549                                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 550                                         return TRUE;
 551                                 }
 552                                 /* At slow timebases in live capture the DS2072
 553                                  * sometimes returns "short" data blocks, with
 554                                  * apparently no way to get the rest of the data.
 555                                  * Discard these, the complete data block will
 556                                  * appear eventually.
 557                                  */
 558                                 if (devc->data_source == DATA_SOURCE_LIVE
 559                                                 && (unsigned)len < expected_data_bytes) {
 560                                         sr_dbg("Discarding short data block");
 561                                         sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
 562                                         return TRUE;
 563                                 }
 564                                 devc->num_block_bytes = len;
 565                         } else {
 566                                 devc->num_block_bytes = expected_data_bytes;
 567                         }
 568                         devc->num_block_read = 0;
 569                 }
 570
 571                 len = devc->num_block_bytes - devc->num_block_read;
 572                 if (len > ACQ_BUFFER_SIZE)
 573                         len = ACQ_BUFFER_SIZE;
 574                 sr_dbg("Requesting read of %d bytes", len);
 575
 576                 len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
 577
 578                 if (len == -1) {
 579                         sr_err("Read error, aborting capture.");
 580                         packet.type = SR_DF_FRAME_END;
 581                         sr_session_send(cb_data, &packet);
 582                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 583                         return TRUE;
 584                 }
 585
 586                 sr_dbg("Received %d bytes.", len);
 587
 588                 devc->num_block_read += len;
 589
 590                 if (ch->type == SR_CHANNEL_ANALOG) {
 591                         vref = devc->vert_reference[ch->index];
 592                         vdiv = devc->vdiv[ch->index] / 25.6;
 593                         offset = devc->vert_offset[ch->index];
 594                         if (devc->model->series->protocol >= PROTOCOL_V3)
 595                                 for (i = 0; i < len; i++)
 596                                         devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
 597                         else
 598                                 for (i = 0; i < len; i++)
 599                                         devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
 600                         analog.channels = g_slist_append(NULL, ch);
 601                         analog.num_samples = len;
 602                         analog.data = devc->data;
 603                         analog.mq = SR_MQ_VOLTAGE;
 604                         analog.unit = SR_UNIT_VOLT;
 605                         analog.mqflags = 0;
 606                         packet.type = SR_DF_ANALOG;
 607                         packet.payload = &analog;
 608                         sr_session_send(cb_data, &packet);
 609                         g_slist_free(analog.channels);
 610                 } else {
 611                         logic.length = len;
 612                         logic.unitsize = 2;
 613                         logic.data = devc->buffer;
 614                         packet.type = SR_DF_LOGIC;
 615                         packet.payload = &logic;
 616                         sr_session_send(cb_data, &packet);
 617                 }
 618
 619                 if (devc->num_block_read == devc->num_block_bytes) {
 620                         sr_dbg("Block has been completed");
 621                         if (devc->model->series->protocol >= PROTOCOL_V3) {
 622                                 /* Discard the terminating linefeed */
 623                                 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
 624                         }
 625                         if (devc->format == FORMAT_IEEE488_2) {
 626                                 /* Prepare for possible next block */
 627                                 devc->num_header_bytes = 0;
 628                                 devc->num_block_bytes = 0;
 629                                 if (devc->data_source != DATA_SOURCE_LIVE)
 630                                         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 631                         }
 632                         if (!sr_scpi_read_complete(scpi)) {
 633                                 sr_err("Read should have been completed");
 634                                 packet.type = SR_DF_FRAME_END;
 635                                 sr_session_send(cb_data, &packet);
 636                                 sdi->driver->dev_acquisition_stop(sdi, cb_data);
 637                                 return TRUE;
 638                         }
 639                         devc->num_block_read = 0;
 640                 } else {
 641                         sr_dbg("%d of %d block bytes read", devc->num_block_read, devc->num_block_bytes);
 642                 }
 643
 644                 devc->num_channel_bytes += len;
 645
 646                 if (devc->num_channel_bytes < expected_data_bytes)
 647                         /* Don't have the full data for this channel yet, re-run. */
 648                         return TRUE;
 649
 650                 /* End of data for this channel. */
 651                 if (devc->model->series->protocol >= PROTOCOL_V3) {
 652                         /* Signal end of data download to scope */
 653                         if (devc->data_source != DATA_SOURCE_LIVE)
 654                                 /*
 655                                  * This causes a query error, without it switching
 656                                  * to the next channel causes an error. Fun with
 657                                  * firmware...
 658                                  */
 659                                 rigol_ds_config_set(sdi, ":WAV:END");
 660                 }
 661
 662                 if (ch->type == SR_CHANNEL_ANALOG
 663                                 && devc->channel_entry->next != NULL) {
 664                         /* We got the frame for this analog channel, but
 665                          * there's another analog channel. */
 666                         devc->channel_entry = devc->channel_entry->next;
 667                         rigol_ds_channel_start(sdi);
 668                 } else {
 669                         /* Done with all analog channels in this frame. */
 670                         if (devc->enabled_digital_channels
 671                                         && devc->channel_entry != devc->enabled_digital_channels) {
 672                                 /* Now we need to get the digital data. */
 673                                 devc->channel_entry = devc->enabled_digital_channels;
 674                                 rigol_ds_channel_start(sdi);
 675                         } else {
 676                                 /* Done with this frame. */
 677                                 packet.type = SR_DF_FRAME_END;
 678                                 sr_session_send(cb_data, &packet);
 679
 680                                 if (++devc->num_frames == devc->limit_frames) {
 681                                         /* Last frame, stop capture. */
 682                                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 683                                 } else {
 684                                         /* Get the next frame, starting with the first analog channel. */
 685                                         if (devc->enabled_analog_channels)
 686                                                 devc->channel_entry = devc->enabled_analog_channels;
 687                                         else
 688                                                 devc->channel_entry = devc->enabled_digital_channels;
 689
 690                                         rigol_ds_capture_start(sdi);
 691
 692                                         /* Start of next frame. */
 693                                         packet.type = SR_DF_FRAME_BEGIN;
 694                                         sr_session_send(cb_data, &packet);
 695                                 }
 696                         }
 697                 }
 698         }
 699
 700         return TRUE;
 701 }
 702
 703 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 704 {
 705         struct dev_context *devc;
 706         char *t_s, *cmd;
 707         unsigned int i;
 708         int res;
 709
 710         devc = sdi->priv;
 711
 712         /* Analog channel state. */
 713         for (i = 0; i < devc->model->analog_channels; i++) {
 714                 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
 715                 res = sr_scpi_get_string(sdi->conn, cmd, &t_s);
 716                 g_free(cmd);
 717                 if (res != SR_OK)
 718                         return SR_ERR;
 719                 devc->analog_channels[i] = !strcmp(t_s, "ON") || !strcmp(t_s, "1");
 720         }
 721         sr_dbg("Current analog channel state:");
 722         for (i = 0; i < devc->model->analog_channels; i++)
 723                 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
 724
 725         /* Digital channel state. */
 726         if (devc->model->has_digital) {
 727                 if (sr_scpi_get_string(sdi->conn, ":LA:DISP?", &t_s) != SR_OK)
 728                         return SR_ERR;
 729                 devc->la_enabled = !strcmp(t_s, "ON") ? TRUE : FALSE;
 730                 sr_dbg("Logic analyzer %s, current digital channel state:",
 731                                 devc->la_enabled ? "enabled" : "disabled");
 732                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 733                         cmd = g_strdup_printf(":DIG%d:TURN?", i);
 734                         res = sr_scpi_get_string(sdi->conn, cmd, &t_s);
 735                         g_free(cmd);
 736                         if (res != SR_OK)
 737                                 return SR_ERR;
 738                         devc->digital_channels[i] = !strcmp(t_s, "ON") ? TRUE : FALSE;
 739                         g_free(t_s);
 740                         sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
 741                 }
 742         }
 743
 744         /* Timebase. */
 745         if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
 746                 return SR_ERR;
 747         sr_dbg("Current timebase %g", devc->timebase);
 748
 749         /* Vertical gain. */
 750         for (i = 0; i < devc->model->analog_channels; i++) {
 751                 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
 752                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
 753                 g_free(cmd);
 754                 if (res != SR_OK)
 755                         return SR_ERR;
 756         }
 757         sr_dbg("Current vertical gain:");
 758         for (i = 0; i < devc->model->analog_channels; i++)
 759                 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
 760
 761         sr_dbg("Current vertical reference:");
 762         if (devc->model->series->protocol >= PROTOCOL_V3) {
 763                 /* Vertical reference - not certain if this is the place to read it. */
 764                 for (i = 0; i < devc->model->analog_channels; i++) {
 765                         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", i + 1) != SR_OK)
 766                                 return SR_ERR;
 767                         if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?", &devc->vert_reference[i]) != SR_OK)
 768                                 return SR_ERR;
 769                         sr_dbg("CH%d %d", i + 1, devc->vert_reference[i]);
 770                 }
 771         }
 772
 773         /* Vertical offset. */
 774         for (i = 0; i < devc->model->analog_channels; i++) {
 775                 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
 776                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
 777                 g_free(cmd);
 778                 if (res != SR_OK)
 779                         return SR_ERR;
 780         }
 781         sr_dbg("Current vertical offset:");
 782         for (i = 0; i < devc->model->analog_channels; i++)
 783                 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);
 784
 785         /* Coupling. */
 786         for (i = 0; i < devc->model->analog_channels; i++) {
 787                 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
 788                 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
 789                 g_free(cmd);
 790                 if (res != SR_OK)
 791                         return SR_ERR;
 792         }
 793         sr_dbg("Current coupling:");
 794         for (i = 0; i < devc->model->analog_channels; i++)
 795                 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
 796
 797         /* Trigger source. */
 798         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
 799                 return SR_ERR;
 800         sr_dbg("Current trigger source %s", devc->trigger_source);
 801
 802         /* Horizontal trigger position. */
 803         if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
 804                 return SR_ERR;
 805         sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
 806
 807         /* Trigger slope. */
 808         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
 809                 return SR_ERR;
 810         sr_dbg("Current trigger slope %s", devc->trigger_slope);
 811
 812         return SR_OK;
 813 }