src/hardware/rigol-ds/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <config.h>
  23 #include <stdlib.h>
  24 #include <stdarg.h>
  25 #include <unistd.h>
  26 #include <errno.h>
  27 #include <string.h>
  28 #include <math.h>
  29 #include <ctype.h>
  30 #include <time.h>
  31 #include <glib.h>
  32 #include <libsigrok/libsigrok.h>
  33 #include "libsigrok-internal.h"
  34 #include "scpi.h"
  35 #include "protocol.h"
  36
  37 /*
  38  * This is a unified protocol driver for the DS1000 and DS2000 series.
  39  *
  40  * DS1000 support tested with a Rigol DS1102D.
  41  *
  42  * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
  43  *
  44  * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
  45  * standard. If you want to read it - it costs real money...
  46  *
  47  * Every response from the scope has a linefeed appended because the
  48  * standard says so. In principle this could be ignored because sending the
  49  * next command clears the output queue of the scope. This driver tries to
  50  * avoid doing that because it may cause an error being generated inside the
  51  * scope and who knows what bugs the firmware has WRT this.
  52  *
  53  * Waveform data is transferred in a format called "arbitrary block program
  54  * data" specified in IEEE 488.2. See Agilents programming manuals for their
  55  * 2000/3000 series scopes for a nice description.
  56  *
  57  * Each data block from the scope has a header, e.g. "#900000001400".
  58  * The '#' marks the start of a block.
  59  * Next is one ASCII decimal digit between 1 and 9, this gives the number of
  60  * ASCII decimal digits following.
  61  * Last are the ASCII decimal digits giving the number of bytes (not
  62  * samples!) in the block.
  63  *
  64  * After this header as many data bytes as indicated follow.
  65  *
  66  * Each data block has a trailing linefeed too.
  67  */
  68
  69 static int parse_int(const char *str, int *ret)
  70 {
  71         char *e;
  72         long tmp;
  73
  74         errno = 0;
  75         tmp = strtol(str, &e, 10);
  76         if (e == str || *e != '\0') {
  77                 sr_dbg("Failed to parse integer: '%s'", str);
  78                 return SR_ERR;
  79         }
  80         if (errno) {
  81                 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
  82                 return SR_ERR;
  83         }
  84         if (tmp > INT_MAX || tmp < INT_MIN) {
  85                 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
  86                 return SR_ERR;
  87         }
  88
  89         *ret = (int)tmp;
  90         return SR_OK;
  91 }
  92
  93 /* Set the next event to wait for in rigol_ds_receive */
  94 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
  95 {
  96         if (event == WAIT_STOP)
  97                 devc->wait_status = 2;
  98         else
  99                 devc->wait_status = 1;
 100         devc->wait_event = event;
 101 }
 102
 103 /*
 104  * Waiting for a event will return a timeout after 2 to 3 seconds in order
 105  * to not block the application.
 106  */
 107 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
 108 {
 109         char *buf;
 110         struct dev_context *devc;
 111         time_t start;
 112
 113         if (!(devc = sdi->priv))
 114                 return SR_ERR;
 115
 116         start = time(NULL);
 117
 118         /*
 119          * Trigger status may return:
 120          * "TD" or "T'D" - triggered
 121          * "AUTO"        - autotriggered
 122          * "RUN"         - running
 123          * "WAIT"        - waiting for trigger
 124          * "STOP"        - stopped
 125          */
 126
 127         if (devc->wait_status == 1) {
 128                 do {
 129                         if (time(NULL) - start >= 3) {
 130                                 sr_dbg("Timeout waiting for trigger");
 131                                 return SR_ERR_TIMEOUT;
 132                         }
 133
 134                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 135                                 return SR_ERR;
 136                 } while (buf[0] == status1 || buf[0] == status2);
 137
 138                 devc->wait_status = 2;
 139         }
 140         if (devc->wait_status == 2) {
 141                 do {
 142                         if (time(NULL) - start >= 3) {
 143                                 sr_dbg("Timeout waiting for trigger");
 144                                 return SR_ERR_TIMEOUT;
 145                         }
 146
 147                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 148                                 return SR_ERR;
 149                 } while (buf[0] != status1 && buf[0] != status2);
 150
 151                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 152         }
 153
 154         return SR_OK;
 155 }
 156
 157 /*
 158  * For live capture we need to wait for a new trigger event to ensure that
 159  * sample data is not returned twice.
 160  *
 161  * Unfortunately this will never really work because for sufficiently fast
 162  * timebases and trigger rates it just can't catch the status changes.
 163  *
 164  * What would be needed is a trigger event register with autoreset like the
 165  * Agilents have. The Rigols don't seem to have anything like this.
 166  *
 167  * The workaround is to only wait for the trigger when the timebase is slow
 168  * enough. Of course this means that for faster timebases sample data can be
 169  * returned multiple times, this effect is mitigated somewhat by sleeping
 170  * for about one sweep time in that case.
 171  */
 172 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
 173 {
 174         struct dev_context *devc;
 175         long s;
 176
 177         if (!(devc = sdi->priv))
 178                 return SR_ERR;
 179
 180         /*
 181          * If timebase < 50 msecs/DIV just sleep about one sweep time except
 182          * for really fast sweeps.
 183          */
 184         if (devc->timebase < 0.0499) {
 185                 if (devc->timebase > 0.99e-6) {
 186                         /*
 187                          * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
 188                          * -> 85 percent of sweep time
 189                          */
 190                         s = (devc->timebase * devc->model->series->num_horizontal_divs
 191                              * 85e6) / 100L;
 192                         sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
 193                         g_usleep(s);
 194                 }
 195                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 196                 return SR_OK;
 197         } else {
 198                 return rigol_ds_event_wait(sdi, 'T', 'A');
 199         }
 200 }
 201
 202 /* Wait for scope to got to "Stop" in single shot mode */
 203 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
 204 {
 205         return rigol_ds_event_wait(sdi, 'S', 'S');
 206 }
 207
 208 /* Check that a single shot acquisition actually succeeded on the DS2000 */
 209 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
 210 {
 211         struct dev_context *devc;
 212         struct sr_channel *ch;
 213         int tmp;
 214
 215         if (!(devc = sdi->priv))
 216                 return SR_ERR;
 217
 218         ch = devc->channel_entry->data;
 219
 220         if (devc->model->series->protocol != PROTOCOL_V3)
 221                 return SR_OK;
 222
 223         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 224                           ch->index + 1) != SR_OK)
 225                 return SR_ERR;
 226         /* Check that the number of samples will be accepted */
 227         if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
 228                 return SR_ERR;
 229         if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
 230                 return SR_ERR;
 231         /*
 232          * If we get an "Execution error" the scope went from "Single" to
 233          * "Stop" without actually triggering. There is no waveform
 234          * displayed and trying to download one will fail - the scope thinks
 235          * it has 1400 samples (like display memory) and the driver thinks
 236          * it has a different number of samples.
 237          *
 238          * In that case just try to capture something again. Might still
 239          * fail in interesting ways.
 240          *
 241          * Ain't firmware fun?
 242          */
 243         if (tmp & 0x10) {
 244                 sr_warn("Single shot acquisition failed, retrying...");
 245                 /* Sleep a bit, otherwise the single shot will often fail */
 246                 g_usleep(500 * 1000);
 247                 rigol_ds_config_set(sdi, ":SING");
 248                 rigol_ds_set_wait_event(devc, WAIT_STOP);
 249                 return SR_ERR;
 250         }
 251
 252         return SR_OK;
 253 }
 254
 255 /* Wait for enough data becoming available in scope output buffer */
 256 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
 257 {
 258         char *buf;
 259         struct dev_context *devc;
 260         time_t start;
 261         int len;
 262
 263         if (!(devc = sdi->priv))
 264                 return SR_ERR;
 265
 266         if (devc->model->series->protocol == PROTOCOL_V3) {
 267
 268                 start = time(NULL);
 269
 270                 do {
 271                         if (time(NULL) - start >= 3) {
 272                                 sr_dbg("Timeout waiting for data block");
 273                                 return SR_ERR_TIMEOUT;
 274                         }
 275
 276                         /*
 277                          * The scope copies data really slowly from sample
 278                          * memory to its output buffer, so try not to bother
 279                          * it too much with SCPI requests but don't wait too
 280                          * long for short sample frame sizes.
 281                          */
 282                         g_usleep(devc->analog_frame_size < (15 * 1000) ? (100 * 1000) : (1000 * 1000));
 283
 284                         /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
 285                         if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
 286                                 return SR_ERR;
 287
 288                         if (parse_int(buf + 5, &len) != SR_OK)
 289                                 return SR_ERR;
 290                 } while (buf[0] == 'R' && len < (1000 * 1000));
 291         }
 292
 293         rigol_ds_set_wait_event(devc, WAIT_NONE);
 294
 295         return SR_OK;
 296 }
 297
 298 /* Send a configuration setting. */
 299 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
 300 {
 301         struct dev_context *devc = sdi->priv;
 302         va_list args;
 303         int ret;
 304
 305         va_start(args, format);
 306         ret = sr_scpi_send_variadic(sdi->conn, format, args);
 307         va_end(args);
 308
 309         if (ret != SR_OK)
 310                 return SR_ERR;
 311
 312         if (devc->model->series->protocol == PROTOCOL_V2) {
 313                 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
 314                 sr_spew("delay %dms", 100);
 315                 g_usleep(100 * 1000);
 316                 return SR_OK;
 317         } else {
 318                 return sr_scpi_get_opc(sdi->conn);
 319         }
 320 }
 321
 322 /* Start capturing a new frameset */
 323 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 324 {
 325         struct dev_context *devc;
 326         gchar *trig_mode;
 327         unsigned int num_channels, i, j;
 328
 329         if (!(devc = sdi->priv))
 330                 return SR_ERR;
 331
 332         sr_dbg("Starting data capture for frameset %" PRIu64 " of %" PRIu64,
 333                devc->num_frames + 1, devc->limit_frames);
 334
 335         switch (devc->model->series->protocol) {
 336         case PROTOCOL_V1:
 337                 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 338                 break;
 339         case PROTOCOL_V2:
 340                 if (devc->data_source == DATA_SOURCE_LIVE) {
 341                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
 342                                 return SR_ERR;
 343                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 344                 } else {
 345                         if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 346                                 return SR_ERR;
 347                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
 348                                 return SR_ERR;
 349                         if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
 350                                 return SR_ERR;
 351                         if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
 352                                 return SR_ERR;
 353                         if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 354                                 return SR_ERR;
 355                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 356                 }
 357                 break;
 358         case PROTOCOL_V3:
 359         case PROTOCOL_V4:
 360                 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
 361                         return SR_ERR;
 362                 if (devc->data_source == DATA_SOURCE_LIVE) {
 363                         if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
 364                                 return SR_ERR;
 365                         devc->analog_frame_size = devc->model->series->live_samples;
 366                         devc->digital_frame_size = devc->model->series->live_samples;
 367                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 368                 } else {
 369                         if (devc->model->series->protocol == PROTOCOL_V3) {
 370                                 if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
 371                                         return SR_ERR;
 372                         } else if (devc->model->series->protocol == PROTOCOL_V4) {
 373                                 num_channels = 0;
 374
 375                                 /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
 376                                 for (i = 0; i < devc->model->analog_channels; i++) {
 377                                         if (devc->analog_channels[i]) {
 378                                                 num_channels++;
 379                                         } else if (i >= 2 && devc->model->has_digital) {
 380                                                 for (j = 0; j < 8; j++) {
 381                                                         if (devc->digital_channels[8 * (i - 2) + j]) {
 382                                                                 num_channels++;
 383                                                                 break;
 384                                                         }
 385                                                 }
 386                                         }
 387                                 }
 388
 389                                 devc->analog_frame_size = devc->digital_frame_size =
 390                                         num_channels == 1 ?
 391                                                 devc->model->series->buffer_samples :
 392                                                         num_channels == 2 ?
 393                                                                 devc->model->series->buffer_samples / 2 :
 394                                                                 devc->model->series->buffer_samples / 4;
 395                         }
 396
 397                         if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
 398                                 return SR_ERR;
 399                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 400                 }
 401                 break;
 402         }
 403
 404         return SR_OK;
 405 }
 406
 407 /* Start reading data from the current channel */
 408 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 409 {
 410         struct dev_context *devc;
 411         struct sr_channel *ch;
 412
 413         if (!(devc = sdi->priv))
 414                 return SR_ERR;
 415
 416         ch = devc->channel_entry->data;
 417
 418         sr_dbg("Starting reading data from channel %d", ch->index + 1);
 419
 420         switch (devc->model->series->protocol) {
 421         case PROTOCOL_V1:
 422         case PROTOCOL_V2:
 423                 if (ch->type == SR_CHANNEL_LOGIC) {
 424                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
 425                                 return SR_ERR;
 426                 } else {
 427                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
 428                                         ch->index + 1) != SR_OK)
 429                                 return SR_ERR;
 430                 }
 431                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 432                 break;
 433         case PROTOCOL_V3:
 434                 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 435                                   ch->index + 1) != SR_OK)
 436                         return SR_ERR;
 437                 if (devc->data_source != DATA_SOURCE_LIVE) {
 438                         if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
 439                                 return SR_ERR;
 440                         if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
 441                                 return SR_ERR;
 442                 }
 443                 break;
 444         case PROTOCOL_V4:
 445                 if (ch->type == SR_CHANNEL_ANALOG) {
 446                         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 447                                         ch->index + 1) != SR_OK)
 448                                 return SR_ERR;
 449                 } else {
 450                         if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d",
 451                                         ch->index) != SR_OK)
 452                                 return SR_ERR;
 453                 }
 454
 455                 if (rigol_ds_config_set(sdi,
 456                                         devc->data_source == DATA_SOURCE_LIVE ?
 457                                                 ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
 458                         return SR_ERR;
 459                 break;
 460         }
 461
 462         if (devc->model->series->protocol >= PROTOCOL_V3 &&
 463                         ch->type == SR_CHANNEL_ANALOG) {
 464                 /* Vertical reference. */
 465                 if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
 466                                 &devc->vert_reference[ch->index]) != SR_OK)
 467                         return SR_ERR;
 468         }
 469
 470         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 471
 472         devc->num_channel_bytes = 0;
 473         devc->num_header_bytes = 0;
 474         devc->num_block_bytes = 0;
 475
 476         return SR_OK;
 477 }
 478
 479 /* Read the header of a data block */
 480 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
 481 {
 482         struct sr_scpi_dev_inst *scpi = sdi->conn;
 483         struct dev_context *devc = sdi->priv;
 484         char *buf = (char *) devc->buffer;
 485         size_t header_length;
 486         int ret;
 487
 488         /* Try to read the hashsign and length digit. */
 489         if (devc->num_header_bytes < 2) {
 490                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 491                                 2 - devc->num_header_bytes);
 492                 if (ret < 0) {
 493                         sr_err("Read error while reading data header.");
 494                         return SR_ERR;
 495                 }
 496                 devc->num_header_bytes += ret;
 497         }
 498
 499         if (devc->num_header_bytes < 2)
 500                 return 0;
 501
 502         if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
 503                 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
 504                 return SR_ERR;
 505         }
 506
 507         header_length = 2 + buf[1] - '0';
 508
 509         /* Try to read the length. */
 510         if (devc->num_header_bytes < header_length) {
 511                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 512                                 header_length - devc->num_header_bytes);
 513                 if (ret < 0) {
 514                         sr_err("Read error while reading data header.");
 515                         return SR_ERR;
 516                 }
 517                 devc->num_header_bytes += ret;
 518         }
 519
 520         if (devc->num_header_bytes < header_length)
 521                 return 0;
 522
 523         /* Read the data length. */
 524         buf[header_length] = '\0';
 525
 526         if (parse_int(buf + 2, &ret) != SR_OK) {
 527                 sr_err("Received invalid data block length '%s'.", buf + 2);
 528                 return -1;
 529         }
 530
 531         sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
 532
 533         return ret;
 534 }
 535
 536 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 537 {
 538         struct sr_dev_inst *sdi;
 539         struct sr_scpi_dev_inst *scpi;
 540         struct dev_context *devc;
 541         struct sr_datafeed_packet packet;
 542         struct sr_datafeed_analog analog;
 543         struct sr_analog_encoding encoding;
 544         struct sr_analog_meaning meaning;
 545         struct sr_analog_spec spec;
 546         struct sr_datafeed_logic logic;
 547         double vdiv, offset;
 548         int len, i, vref;
 549         struct sr_channel *ch;
 550         gsize expected_data_bytes;
 551
 552         (void)fd;
 553
 554         if (!(sdi = cb_data))
 555                 return TRUE;
 556
 557         if (!(devc = sdi->priv))
 558                 return TRUE;
 559
 560         scpi = sdi->conn;
 561
 562         if (!(revents == G_IO_IN || revents == 0))
 563                 return TRUE;
 564
 565         switch (devc->wait_event) {
 566         case WAIT_NONE:
 567                 break;
 568         case WAIT_TRIGGER:
 569                 if (rigol_ds_trigger_wait(sdi) != SR_OK)
 570                         return TRUE;
 571                 if (rigol_ds_channel_start(sdi) != SR_OK)
 572                         return TRUE;
 573                 return TRUE;
 574         case WAIT_BLOCK:
 575                 if (rigol_ds_block_wait(sdi) != SR_OK)
 576                         return TRUE;
 577                 break;
 578         case WAIT_STOP:
 579                 if (rigol_ds_stop_wait(sdi) != SR_OK)
 580                         return TRUE;
 581                 if (rigol_ds_check_stop(sdi) != SR_OK)
 582                         return TRUE;
 583                 if (rigol_ds_channel_start(sdi) != SR_OK)
 584                         return TRUE;
 585                 return TRUE;
 586         default:
 587                 sr_err("BUG: Unknown event target encountered");
 588                 break;
 589         }
 590
 591         ch = devc->channel_entry->data;
 592
 593         expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
 594                         devc->analog_frame_size : devc->digital_frame_size;
 595
 596         if (devc->num_block_bytes == 0) {
 597                 if (devc->model->series->protocol >= PROTOCOL_V4) {
 598                         if (sr_scpi_send(sdi->conn, ":WAV:START %d",
 599                                         devc->num_channel_bytes + 1) != SR_OK)
 600                                 return TRUE;
 601                         if (sr_scpi_send(sdi->conn, ":WAV:STOP %d",
 602                                         MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
 603                                                 devc->analog_frame_size)) != SR_OK)
 604                                 return TRUE;
 605                 }
 606
 607                 if (devc->model->series->protocol >= PROTOCOL_V3)
 608                         if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
 609                                 return TRUE;
 610
 611                 if (sr_scpi_read_begin(scpi) != SR_OK)
 612                         return TRUE;
 613
 614                 if (devc->format == FORMAT_IEEE488_2) {
 615                         sr_dbg("New block header expected");
 616                         len = rigol_ds_read_header(sdi);
 617                         if (len == 0)
 618                                 /* Still reading the header. */
 619                                 return TRUE;
 620                         if (len == -1) {
 621                                 sr_err("Read error, aborting capture.");
 622                                 packet.type = SR_DF_FRAME_END;
 623                                 sr_session_send(sdi, &packet);
 624                                 sdi->driver->dev_acquisition_stop(sdi);
 625                                 return TRUE;
 626                         }
 627                         /* At slow timebases in live capture the DS2072
 628                          * sometimes returns "short" data blocks, with
 629                          * apparently no way to get the rest of the data.
 630                          * Discard these, the complete data block will
 631                          * appear eventually.
 632                          */
 633                         if (devc->data_source == DATA_SOURCE_LIVE
 634                                         && (unsigned)len < expected_data_bytes) {
 635                                 sr_dbg("Discarding short data block");
 636                                 sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
 637                                 return TRUE;
 638                         }
 639                         devc->num_block_bytes = len;
 640                 } else {
 641                         devc->num_block_bytes = expected_data_bytes;
 642                 }
 643                 devc->num_block_read = 0;
 644         }
 645
 646         len = devc->num_block_bytes - devc->num_block_read;
 647         if (len > ACQ_BUFFER_SIZE)
 648                 len = ACQ_BUFFER_SIZE;
 649         sr_dbg("Requesting read of %d bytes", len);
 650
 651         len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
 652
 653         if (len == -1) {
 654                 sr_err("Read error, aborting capture.");
 655                 packet.type = SR_DF_FRAME_END;
 656                 sr_session_send(sdi, &packet);
 657                 sdi->driver->dev_acquisition_stop(sdi);
 658                 return TRUE;
 659         }
 660
 661         sr_dbg("Received %d bytes.", len);
 662
 663         devc->num_block_read += len;
 664
 665         if (ch->type == SR_CHANNEL_ANALOG) {
 666                 vref = devc->vert_reference[ch->index];
 667                 vdiv = devc->vdiv[ch->index] / 25.6;
 668                 offset = devc->vert_offset[ch->index];
 669                 if (devc->model->series->protocol >= PROTOCOL_V3)
 670                         for (i = 0; i < len; i++)
 671                                 devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
 672                 else
 673                         for (i = 0; i < len; i++)
 674                                 devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
 675                 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
 676                 analog.meaning->channels = g_slist_append(NULL, ch);
 677                 analog.num_samples = len;
 678                 analog.data = devc->data;
 679                 analog.meaning->mq = SR_MQ_VOLTAGE;
 680                 analog.meaning->unit = SR_UNIT_VOLT;
 681                 analog.meaning->mqflags = 0;
 682                 packet.type = SR_DF_ANALOG;
 683                 packet.payload = &analog;
 684                 sr_session_send(sdi, &packet);
 685                 g_slist_free(analog.meaning->channels);
 686         } else {
 687                 logic.length = len;
 688                 // TODO: For the MSO1000Z series, we need a way to express that
 689                 // this data is in fact just for a single channel, with the valid
 690                 // data for that channel in the LSB of each byte.
 691                 logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
 692                 logic.data = devc->buffer;
 693                 packet.type = SR_DF_LOGIC;
 694                 packet.payload = &logic;
 695                 sr_session_send(sdi, &packet);
 696         }
 697
 698         if (devc->num_block_read == devc->num_block_bytes) {
 699                 sr_dbg("Block has been completed");
 700                 if (devc->model->series->protocol >= PROTOCOL_V3) {
 701                         /* Discard the terminating linefeed */
 702                         sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
 703                 }
 704                 if (devc->format == FORMAT_IEEE488_2) {
 705                         /* Prepare for possible next block */
 706                         devc->num_header_bytes = 0;
 707                         devc->num_block_bytes = 0;
 708                         if (devc->data_source != DATA_SOURCE_LIVE)
 709                                 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 710                 }
 711                 if (!sr_scpi_read_complete(scpi)) {
 712                         sr_err("Read should have been completed");
 713                         packet.type = SR_DF_FRAME_END;
 714                         sr_session_send(sdi, &packet);
 715                         sdi->driver->dev_acquisition_stop(sdi);
 716                         return TRUE;
 717                 }
 718                 devc->num_block_read = 0;
 719         } else {
 720                 sr_dbg("%" PRIu64 " of %" PRIu64 " block bytes read",
 721                         devc->num_block_read, devc->num_block_bytes);
 722         }
 723
 724         devc->num_channel_bytes += len;
 725
 726         if (devc->num_channel_bytes < expected_data_bytes)
 727                 /* Don't have the full data for this channel yet, re-run. */
 728                 return TRUE;
 729
 730         /* End of data for this channel. */
 731         if (devc->model->series->protocol == PROTOCOL_V3) {
 732                 /* Signal end of data download to scope */
 733                 if (devc->data_source != DATA_SOURCE_LIVE)
 734                         /*
 735                          * This causes a query error, without it switching
 736                          * to the next channel causes an error. Fun with
 737                          * firmware...
 738                          */
 739                         rigol_ds_config_set(sdi, ":WAV:END");
 740         }
 741
 742         if (devc->channel_entry->next) {
 743                 /* We got the frame for this channel, now get the next channel. */
 744                 devc->channel_entry = devc->channel_entry->next;
 745                 rigol_ds_channel_start(sdi);
 746         } else {
 747                 /* Done with this frame. */
 748                 packet.type = SR_DF_FRAME_END;
 749                 sr_session_send(sdi, &packet);
 750
 751                 if (++devc->num_frames == devc->limit_frames) {
 752                         /* Last frame, stop capture. */
 753                         sdi->driver->dev_acquisition_stop(sdi);
 754                 } else {
 755                         /* Get the next frame, starting with the first channel. */
 756                         devc->channel_entry = devc->enabled_channels;
 757
 758                         rigol_ds_capture_start(sdi);
 759
 760                         /* Start of next frame. */
 761                         packet.type = SR_DF_FRAME_BEGIN;
 762                         sr_session_send(sdi, &packet);
 763                 }
 764         }
 765
 766         return TRUE;
 767 }
 768
 769 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 770 {
 771         struct dev_context *devc;
 772         char *cmd;
 773         unsigned int i;
 774         int res;
 775
 776         devc = sdi->priv;
 777
 778         /* Analog channel state. */
 779         for (i = 0; i < devc->model->analog_channels; i++) {
 780                 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
 781                 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]);
 782                 g_free(cmd);
 783                 if (res != SR_OK)
 784                         return SR_ERR;
 785         }
 786         sr_dbg("Current analog channel state:");
 787         for (i = 0; i < devc->model->analog_channels; i++)
 788                 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
 789
 790         /* Digital channel state. */
 791         if (devc->model->has_digital) {
 792                 if (sr_scpi_get_bool(sdi->conn,
 793                                 devc->model->series->protocol >= PROTOCOL_V4 ?
 794                                         ":LA:STAT?" : ":LA:DISP?",
 795                                 &devc->la_enabled) != SR_OK)
 796                         return SR_ERR;
 797                 sr_dbg("Logic analyzer %s, current digital channel state:",
 798                                 devc->la_enabled ? "enabled" : "disabled");
 799                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 800                         cmd = g_strdup_printf(
 801                                 devc->model->series->protocol >= PROTOCOL_V4 ?
 802                                         ":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
 803                         res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
 804                         g_free(cmd);
 805                         if (res != SR_OK)
 806                                 return SR_ERR;
 807                         sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
 808                 }
 809         }
 810
 811         /* Timebase. */
 812         if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
 813                 return SR_ERR;
 814         sr_dbg("Current timebase %g", devc->timebase);
 815
 816         /* Probe attenuation. */
 817         for (i = 0; i < devc->model->analog_channels; i++) {
 818                 cmd = g_strdup_printf(":CHAN%d:PROB?", i + 1);
 819                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->attenuation[i]);
 820                 g_free(cmd);
 821                 if (res != SR_OK)
 822                         return SR_ERR;
 823         }
 824         sr_dbg("Current probe attenuation:");
 825         for (i = 0; i < devc->model->analog_channels; i++)
 826                 sr_dbg("CH%d %g", i + 1, devc->attenuation[i]);
 827
 828         /* Vertical gain and offset. */
 829         if (rigol_ds_get_dev_cfg_vertical(sdi) != SR_OK)
 830                 return SR_ERR;
 831
 832         /* Coupling. */
 833         for (i = 0; i < devc->model->analog_channels; i++) {
 834                 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
 835                 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
 836                 g_free(cmd);
 837                 if (res != SR_OK)
 838                         return SR_ERR;
 839         }
 840         sr_dbg("Current coupling:");
 841         for (i = 0; i < devc->model->analog_channels; i++)
 842                 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
 843
 844         /* Trigger source. */
 845         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
 846                 return SR_ERR;
 847         sr_dbg("Current trigger source %s", devc->trigger_source);
 848
 849         /* Horizontal trigger position. */
 850         if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
 851                 return SR_ERR;
 852         sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
 853
 854         /* Trigger slope. */
 855         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
 856                 return SR_ERR;
 857         sr_dbg("Current trigger slope %s", devc->trigger_slope);
 858
 859         /* Trigger level. */
 860         if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK)
 861                 return SR_ERR;
 862         sr_dbg("Current trigger level %g", devc->trigger_level);
 863
 864         return SR_OK;
 865 }
 866
 867 SR_PRIV int rigol_ds_get_dev_cfg_vertical(const struct sr_dev_inst *sdi)
 868 {
 869         struct dev_context *devc;
 870         char *cmd;
 871         unsigned int i;
 872         int res;
 873
 874         devc = sdi->priv;
 875
 876         /* Vertical gain. */
 877         for (i = 0; i < devc->model->analog_channels; i++) {
 878                 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
 879                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
 880                 g_free(cmd);
 881                 if (res != SR_OK)
 882                         return SR_ERR;
 883         }
 884         sr_dbg("Current vertical gain:");
 885         for (i = 0; i < devc->model->analog_channels; i++)
 886                 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
 887
 888         /* Vertical offset. */
 889         for (i = 0; i < devc->model->analog_channels; i++) {
 890                 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
 891                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
 892                 g_free(cmd);
 893                 if (res != SR_OK)
 894                         return SR_ERR;
 895         }
 896         sr_dbg("Current vertical offset:");
 897         for (i = 0; i < devc->model->analog_channels; i++)
 898                 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);
 899
 900         return SR_OK;
 901 }