src/hardware/rigol-ds/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <stdlib.h>
  23 #include <stdarg.h>
  24 #include <unistd.h>
  25 #include <errno.h>
  26 #include <string.h>
  27 #include <math.h>
  28 #include <ctype.h>
  29 #include <time.h>
  30 #include <glib.h>
  31 #include "libsigrok.h"
  32 #include "libsigrok-internal.h"
  33 #include "protocol.h"
  34
  35 /*
  36  * This is a unified protocol driver for the DS1000 and DS2000 series.
  37  *
  38  * DS1000 support tested with a Rigol DS1102D.
  39  *
  40  * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
  41  *
  42  * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
  43  * standard. If you want to read it - it costs real money...
  44  *
  45  * Every response from the scope has a linefeed appended because the
  46  * standard says so. In principle this could be ignored because sending the
  47  * next command clears the output queue of the scope. This driver tries to
  48  * avoid doing that because it may cause an error being generated inside the
  49  * scope and who knows what bugs the firmware has WRT this.
  50  *
  51  * Waveform data is transferred in a format called "arbitrary block program
  52  * data" specified in IEEE 488.2. See Agilents programming manuals for their
  53  * 2000/3000 series scopes for a nice description.
  54  *
  55  * Each data block from the scope has a header, e.g. "#900000001400".
  56  * The '#' marks the start of a block.
  57  * Next is one ASCII decimal digit between 1 and 9, this gives the number of
  58  * ASCII decimal digits following.
  59  * Last are the ASCII decimal digits giving the number of bytes (not
  60  * samples!) in the block.
  61  *
  62  * After this header as many data bytes as indicated follow.
  63  *
  64  * Each data block has a trailing linefeed too.
  65  */
  66
  67 static int parse_int(const char *str, int *ret)
  68 {
  69         char *e;
  70         long tmp;
  71
  72         errno = 0;
  73         tmp = strtol(str, &e, 10);
  74         if (e == str || *e != '\0') {
  75                 sr_dbg("Failed to parse integer: '%s'", str);
  76                 return SR_ERR;
  77         }
  78         if (errno) {
  79                 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
  80                 return SR_ERR;
  81         }
  82         if (tmp > INT_MAX || tmp < INT_MIN) {
  83                 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
  84                 return SR_ERR;
  85         }
  86
  87         *ret = (int)tmp;
  88         return SR_OK;
  89 }
  90
  91 /* Set the next event to wait for in rigol_ds_receive */
  92 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
  93 {
  94         if (event == WAIT_STOP)
  95                 devc->wait_status = 2;
  96         else
  97                 devc->wait_status = 1;
  98         devc->wait_event = event;
  99 }
 100
 101 /*
 102  * Waiting for a event will return a timeout after 2 to 3 seconds in order
 103  * to not block the application.
 104  */
 105 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
 106 {
 107         char *buf;
 108         struct dev_context *devc;
 109         time_t start;
 110
 111         if (!(devc = sdi->priv))
 112                 return SR_ERR;
 113
 114         start = time(NULL);
 115
 116         /*
 117          * Trigger status may return:
 118          * "TD" or "T'D" - triggered
 119          * "AUTO"        - autotriggered
 120          * "RUN"         - running
 121          * "WAIT"        - waiting for trigger
 122          * "STOP"        - stopped
 123          */
 124
 125         if (devc->wait_status == 1) {
 126                 do {
 127                         if (time(NULL) - start >= 3) {
 128                                 sr_dbg("Timeout waiting for trigger");
 129                                 return SR_ERR_TIMEOUT;
 130                         }
 131
 132                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 133                                 return SR_ERR;
 134                 } while (buf[0] == status1 || buf[0] == status2);
 135
 136                 devc->wait_status = 2;
 137         }
 138         if (devc->wait_status == 2) {
 139                 do {
 140                         if (time(NULL) - start >= 3) {
 141                                 sr_dbg("Timeout waiting for trigger");
 142                                 return SR_ERR_TIMEOUT;
 143                         }
 144
 145                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 146                                 return SR_ERR;
 147                 } while (buf[0] != status1 && buf[0] != status2);
 148
 149                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 150         }
 151
 152         return SR_OK;
 153 }
 154
 155 /*
 156  * For live capture we need to wait for a new trigger event to ensure that
 157  * sample data is not returned twice.
 158  *
 159  * Unfortunately this will never really work because for sufficiently fast
 160  * timebases and trigger rates it just can't catch the status changes.
 161  *
 162  * What would be needed is a trigger event register with autoreset like the
 163  * Agilents have. The Rigols don't seem to have anything like this.
 164  *
 165  * The workaround is to only wait for the trigger when the timebase is slow
 166  * enough. Of course this means that for faster timebases sample data can be
 167  * returned multiple times, this effect is mitigated somewhat by sleeping
 168  * for about one sweep time in that case.
 169  */
 170 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
 171 {
 172         struct dev_context *devc;
 173         long s;
 174
 175         if (!(devc = sdi->priv))
 176                 return SR_ERR;
 177
 178         /*
 179          * If timebase < 50 msecs/DIV just sleep about one sweep time except
 180          * for really fast sweeps.
 181          */
 182         if (devc->timebase < 0.0499) {
 183                 if (devc->timebase > 0.99e-6) {
 184                         /*
 185                          * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
 186                          * -> 85 percent of sweep time
 187                          */
 188                         s = (devc->timebase * devc->model->series->num_horizontal_divs
 189                              * 85e6) / 100L;
 190                         sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
 191                         g_usleep(s);
 192                 }
 193                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 194                 return SR_OK;
 195         } else {
 196                 return rigol_ds_event_wait(sdi, 'T', 'A');
 197         }
 198 }
 199
 200 /* Wait for scope to got to "Stop" in single shot mode */
 201 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
 202 {
 203         return rigol_ds_event_wait(sdi, 'S', 'S');
 204 }
 205
 206 /* Check that a single shot acquisition actually succeeded on the DS2000 */
 207 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
 208 {
 209         struct dev_context *devc;
 210         struct sr_channel *ch;
 211         int tmp;
 212
 213         if (!(devc = sdi->priv))
 214                 return SR_ERR;
 215
 216         ch = devc->channel_entry->data;
 217
 218         if (devc->model->series->protocol != PROTOCOL_V3)
 219                 return SR_OK;
 220
 221         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 222                           ch->index + 1) != SR_OK)
 223                 return SR_ERR;
 224         /* Check that the number of samples will be accepted */
 225         if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
 226                 return SR_ERR;
 227         if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
 228                 return SR_ERR;
 229         /*
 230          * If we get an "Execution error" the scope went from "Single" to
 231          * "Stop" without actually triggering. There is no waveform
 232          * displayed and trying to download one will fail - the scope thinks
 233          * it has 1400 samples (like display memory) and the driver thinks
 234          * it has a different number of samples.
 235          *
 236          * In that case just try to capture something again. Might still
 237          * fail in interesting ways.
 238          *
 239          * Ain't firmware fun?
 240          */
 241         if (tmp & 0x10) {
 242                 sr_warn("Single shot acquisition failed, retrying...");
 243                 /* Sleep a bit, otherwise the single shot will often fail */
 244                 g_usleep(500 * 1000);
 245                 rigol_ds_config_set(sdi, ":SING");
 246                 rigol_ds_set_wait_event(devc, WAIT_STOP);
 247                 return SR_ERR;
 248         }
 249
 250         return SR_OK;
 251 }
 252
 253 /* Wait for enough data becoming available in scope output buffer */
 254 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
 255 {
 256         char *buf;
 257         struct dev_context *devc;
 258         time_t start;
 259         int len;
 260
 261         if (!(devc = sdi->priv))
 262                 return SR_ERR;
 263
 264         if (devc->model->series->protocol == PROTOCOL_V3) {
 265
 266                 start = time(NULL);
 267
 268                 do {
 269                         if (time(NULL) - start >= 3) {
 270                                 sr_dbg("Timeout waiting for data block");
 271                                 return SR_ERR_TIMEOUT;
 272                         }
 273
 274                         /*
 275                          * The scope copies data really slowly from sample
 276                          * memory to its output buffer, so try not to bother
 277                          * it too much with SCPI requests but don't wait too
 278                          * long for short sample frame sizes.
 279                          */
 280                         g_usleep(devc->analog_frame_size < (15 * 1000) ? (100 * 1000) : (1000 * 1000));
 281
 282                         /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
 283                         if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
 284                                 return SR_ERR;
 285
 286                         if (parse_int(buf + 5, &len) != SR_OK)
 287                                 return SR_ERR;
 288                 } while (buf[0] == 'R' && len < (1000 * 1000));
 289         }
 290
 291         rigol_ds_set_wait_event(devc, WAIT_NONE);
 292
 293         return SR_OK;
 294 }
 295
 296 /* Send a configuration setting. */
 297 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
 298 {
 299         struct dev_context *devc = sdi->priv;
 300         va_list args;
 301         int ret;
 302
 303         va_start(args, format);
 304         ret = sr_scpi_send_variadic(sdi->conn, format, args);
 305         va_end(args);
 306
 307         if (ret != SR_OK)
 308                 return SR_ERR;
 309
 310         if (devc->model->series->protocol == PROTOCOL_V2) {
 311                 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
 312                 sr_spew("delay %dms", 100);
 313                 g_usleep(100 * 1000);
 314                 return SR_OK;
 315         } else {
 316                 return sr_scpi_get_opc(sdi->conn);
 317         }
 318 }
 319
 320 /* Start capturing a new frameset */
 321 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 322 {
 323         struct dev_context *devc;
 324         gchar *trig_mode;
 325         unsigned int num_channels, i, j;
 326
 327         if (!(devc = sdi->priv))
 328                 return SR_ERR;
 329
 330         sr_dbg("Starting data capture for frameset %lu of %lu",
 331                devc->num_frames + 1, devc->limit_frames);
 332
 333         switch (devc->model->series->protocol) {
 334         case PROTOCOL_V1:
 335                 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 336                 break;
 337         case PROTOCOL_V2:
 338                 if (devc->data_source == DATA_SOURCE_LIVE) {
 339                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
 340                                 return SR_ERR;
 341                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 342                 } else {
 343                         if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 344                                 return SR_ERR;
 345                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
 346                                 return SR_ERR;
 347                         if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
 348                                 return SR_ERR;
 349                         if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
 350                                 return SR_ERR;
 351                         if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 352                                 return SR_ERR;
 353                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 354                 }
 355                 break;
 356         case PROTOCOL_V3:
 357         case PROTOCOL_V4:
 358                 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
 359                         return SR_ERR;
 360                 if (devc->data_source == DATA_SOURCE_LIVE) {
 361                         if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
 362                                 return SR_ERR;
 363                         devc->analog_frame_size = devc->model->series->live_samples;
 364                         devc->digital_frame_size = devc->model->series->live_samples;
 365                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 366                 } else {
 367                         if (devc->model->series->protocol == PROTOCOL_V3) {
 368                                 if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
 369                                         return SR_ERR;
 370                         } else if (devc->model->series->protocol == PROTOCOL_V4) {
 371                                 num_channels = 0;
 372
 373                                 /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
 374                                 for (i = 0; i < devc->model->analog_channels; i++) {
 375                                         if (devc->analog_channels[i]) {
 376                                                 num_channels++;
 377                                         } else if (i >= 2 && devc->model->has_digital) {
 378                                                 for (j = 0; j < 8; j++) {
 379                                                         if (devc->digital_channels[8 * (i - 2) + j]) {
 380                                                                 num_channels++;
 381                                                                 break;
 382                                                         }
 383                                                 }
 384                                         }
 385                                 }
 386
 387                                 devc->analog_frame_size = devc->digital_frame_size =
 388                                         num_channels == 1 ?
 389                                                 devc->model->series->buffer_samples :
 390                                                         num_channels == 2 ?
 391                                                                 devc->model->series->buffer_samples / 2 :
 392                                                                 devc->model->series->buffer_samples / 4;
 393                         }
 394
 395                         if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
 396                                 return SR_ERR;
 397                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 398                 }
 399                 break;
 400         }
 401
 402         return SR_OK;
 403 }
 404
 405 /* Start reading data from the current channel */
 406 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 407 {
 408         struct dev_context *devc;
 409         struct sr_channel *ch;
 410
 411         if (!(devc = sdi->priv))
 412                 return SR_ERR;
 413
 414         ch = devc->channel_entry->data;
 415
 416         sr_dbg("Starting reading data from channel %d", ch->index + 1);
 417
 418         switch (devc->model->series->protocol) {
 419         case PROTOCOL_V1:
 420         case PROTOCOL_V2:
 421                 if (ch->type == SR_CHANNEL_LOGIC) {
 422                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
 423                                 return SR_ERR;
 424                 } else {
 425                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
 426                                         ch->index + 1) != SR_OK)
 427                                 return SR_ERR;
 428                 }
 429                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 430                 break;
 431         case PROTOCOL_V3:
 432                 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 433                                   ch->index + 1) != SR_OK)
 434                         return SR_ERR;
 435                 if (devc->data_source != DATA_SOURCE_LIVE) {
 436                         if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
 437                                 return SR_ERR;
 438                         if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
 439                                 return SR_ERR;
 440                 }
 441                 break;
 442         case PROTOCOL_V4:
 443                 if (ch->type == SR_CHANNEL_ANALOG) {
 444                         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 445                                         ch->index + 1) != SR_OK)
 446                                 return SR_ERR;
 447                 } else {
 448                         if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d",
 449                                         ch->index) != SR_OK)
 450                                 return SR_ERR;
 451                 }
 452
 453                 if (rigol_ds_config_set(sdi,
 454                                         devc->data_source == DATA_SOURCE_LIVE ?
 455                                                 ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
 456                         return SR_ERR;
 457                 break;
 458         }
 459
 460         if (devc->model->series->protocol >= PROTOCOL_V3 &&
 461                         ch->type == SR_CHANNEL_ANALOG) {
 462                 /* Vertical reference. */
 463                 if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
 464                                 &devc->vert_reference[ch->index]) != SR_OK)
 465                         return SR_ERR;
 466         }
 467
 468         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 469
 470         devc->num_channel_bytes = 0;
 471         devc->num_header_bytes = 0;
 472         devc->num_block_bytes = 0;
 473
 474         return SR_OK;
 475 }
 476
 477 /* Read the header of a data block */
 478 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
 479 {
 480         struct sr_scpi_dev_inst *scpi = sdi->conn;
 481         struct dev_context *devc = sdi->priv;
 482         char *buf = (char *) devc->buffer;
 483         size_t header_length;
 484         int ret;
 485
 486         /* Try to read the hashsign and length digit. */
 487         if (devc->num_header_bytes < 2) {
 488                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 489                                 2 - devc->num_header_bytes);
 490                 if (ret < 0) {
 491                         sr_err("Read error while reading data header.");
 492                         return SR_ERR;
 493                 }
 494                 devc->num_header_bytes += ret;
 495         }
 496
 497         if (devc->num_header_bytes < 2)
 498                 return 0;
 499
 500         if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
 501                 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
 502                 return SR_ERR;
 503         }
 504
 505         header_length = 2 + buf[1] - '0';
 506
 507         /* Try to read the length. */
 508         if (devc->num_header_bytes < header_length) {
 509                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 510                                 header_length - devc->num_header_bytes);
 511                 if (ret < 0) {
 512                         sr_err("Read error while reading data header.");
 513                         return SR_ERR;
 514                 }
 515                 devc->num_header_bytes += ret;
 516         }
 517
 518         if (devc->num_header_bytes < header_length)
 519                 return 0;
 520
 521         /* Read the data length. */
 522         buf[header_length] = '\0';
 523
 524         if (parse_int(buf + 2, &ret) != SR_OK) {
 525                 sr_err("Received invalid data block length '%s'.", buf + 2);
 526                 return -1;
 527         }
 528
 529         sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
 530
 531         return ret;
 532 }
 533
 534 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 535 {
 536         struct sr_dev_inst *sdi;
 537         struct sr_scpi_dev_inst *scpi;
 538         struct dev_context *devc;
 539         struct sr_datafeed_packet packet;
 540         struct sr_datafeed_analog analog;
 541         struct sr_datafeed_logic logic;
 542         double vdiv, offset;
 543         int len, i, vref;
 544         struct sr_channel *ch;
 545         gsize expected_data_bytes;
 546
 547         (void)fd;
 548
 549         if (!(sdi = cb_data))
 550                 return TRUE;
 551
 552         if (!(devc = sdi->priv))
 553                 return TRUE;
 554
 555         scpi = sdi->conn;
 556
 557         if (revents == G_IO_IN || revents == 0) {
 558                 switch (devc->wait_event) {
 559                 case WAIT_NONE:
 560                         break;
 561                 case WAIT_TRIGGER:
 562                         if (rigol_ds_trigger_wait(sdi) != SR_OK)
 563                                 return TRUE;
 564                         if (rigol_ds_channel_start(sdi) != SR_OK)
 565                                 return TRUE;
 566                         return TRUE;
 567                 case WAIT_BLOCK:
 568                         if (rigol_ds_block_wait(sdi) != SR_OK)
 569                                 return TRUE;
 570                         break;
 571                 case WAIT_STOP:
 572                         if (rigol_ds_stop_wait(sdi) != SR_OK)
 573                                 return TRUE;
 574                         if (rigol_ds_check_stop(sdi) != SR_OK)
 575                                 return TRUE;
 576                         if (rigol_ds_channel_start(sdi) != SR_OK)
 577                                 return TRUE;
 578                         return TRUE;
 579                 default:
 580                         sr_err("BUG: Unknown event target encountered");
 581                         break;
 582                 }
 583
 584                 ch = devc->channel_entry->data;
 585
 586                 expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
 587                                 devc->analog_frame_size : devc->digital_frame_size;
 588
 589                 if (devc->num_block_bytes == 0) {
 590                         if (devc->model->series->protocol >= PROTOCOL_V4) {
 591                                 if (sr_scpi_send(sdi->conn, ":WAV:START %d",
 592                                                 devc->num_channel_bytes + 1) != SR_OK)
 593                                         return TRUE;
 594                                 if (sr_scpi_send(sdi->conn, ":WAV:STOP %d",
 595                                                 MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
 596                                                         devc->analog_frame_size)) != SR_OK)
 597                                         return TRUE;
 598                         }
 599
 600                         if (devc->model->series->protocol >= PROTOCOL_V3)
 601                                 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
 602                                         return TRUE;
 603
 604                         if (sr_scpi_read_begin(scpi) != SR_OK)
 605                                 return TRUE;
 606
 607                         if (devc->format == FORMAT_IEEE488_2) {
 608                                 sr_dbg("New block header expected");
 609                                 len = rigol_ds_read_header(sdi);
 610                                 if (len == 0)
 611                                         /* Still reading the header. */
 612                                         return TRUE;
 613                                 if (len == -1) {
 614                                         sr_err("Read error, aborting capture.");
 615                                         packet.type = SR_DF_FRAME_END;
 616                                         sr_session_send(cb_data, &packet);
 617                                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 618                                         return TRUE;
 619                                 }
 620                                 /* At slow timebases in live capture the DS2072
 621                                  * sometimes returns "short" data blocks, with
 622                                  * apparently no way to get the rest of the data.
 623                                  * Discard these, the complete data block will
 624                                  * appear eventually.
 625                                  */
 626                                 if (devc->data_source == DATA_SOURCE_LIVE
 627                                                 && (unsigned)len < expected_data_bytes) {
 628                                         sr_dbg("Discarding short data block");
 629                                         sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
 630                                         return TRUE;
 631                                 }
 632                                 devc->num_block_bytes = len;
 633                         } else {
 634                                 devc->num_block_bytes = expected_data_bytes;
 635                         }
 636                         devc->num_block_read = 0;
 637                 }
 638
 639                 len = devc->num_block_bytes - devc->num_block_read;
 640                 if (len > ACQ_BUFFER_SIZE)
 641                         len = ACQ_BUFFER_SIZE;
 642                 sr_dbg("Requesting read of %d bytes", len);
 643
 644                 len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
 645
 646                 if (len == -1) {
 647                         sr_err("Read error, aborting capture.");
 648                         packet.type = SR_DF_FRAME_END;
 649                         sr_session_send(cb_data, &packet);
 650                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 651                         return TRUE;
 652                 }
 653
 654                 sr_dbg("Received %d bytes.", len);
 655
 656                 devc->num_block_read += len;
 657
 658                 if (ch->type == SR_CHANNEL_ANALOG) {
 659                         vref = devc->vert_reference[ch->index];
 660                         vdiv = devc->vdiv[ch->index] / 25.6;
 661                         offset = devc->vert_offset[ch->index];
 662                         if (devc->model->series->protocol >= PROTOCOL_V3)
 663                                 for (i = 0; i < len; i++)
 664                                         devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
 665                         else
 666                                 for (i = 0; i < len; i++)
 667                                         devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
 668                         analog.channels = g_slist_append(NULL, ch);
 669                         analog.num_samples = len;
 670                         analog.data = devc->data;
 671                         analog.mq = SR_MQ_VOLTAGE;
 672                         analog.unit = SR_UNIT_VOLT;
 673                         analog.mqflags = 0;
 674                         packet.type = SR_DF_ANALOG;
 675                         packet.payload = &analog;
 676                         sr_session_send(cb_data, &packet);
 677                         g_slist_free(analog.channels);
 678                 } else {
 679                         logic.length = len;
 680                         // TODO: For the MSO1000Z series, we need a way to express that
 681                         // this data is in fact just for a single channel, with the valid
 682                         // data for that channel in the LSB of each byte.
 683                         logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
 684                         logic.data = devc->buffer;
 685                         packet.type = SR_DF_LOGIC;
 686                         packet.payload = &logic;
 687                         sr_session_send(cb_data, &packet);
 688                 }
 689
 690                 if (devc->num_block_read == devc->num_block_bytes) {
 691                         sr_dbg("Block has been completed");
 692                         if (devc->model->series->protocol >= PROTOCOL_V3) {
 693                                 /* Discard the terminating linefeed */
 694                                 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
 695                         }
 696                         if (devc->format == FORMAT_IEEE488_2) {
 697                                 /* Prepare for possible next block */
 698                                 devc->num_header_bytes = 0;
 699                                 devc->num_block_bytes = 0;
 700                                 if (devc->data_source != DATA_SOURCE_LIVE)
 701                                         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 702                         }
 703                         if (!sr_scpi_read_complete(scpi)) {
 704                                 sr_err("Read should have been completed");
 705                                 packet.type = SR_DF_FRAME_END;
 706                                 sr_session_send(cb_data, &packet);
 707                                 sdi->driver->dev_acquisition_stop(sdi, cb_data);
 708                                 return TRUE;
 709                         }
 710                         devc->num_block_read = 0;
 711                 } else {
 712                         sr_dbg("%d of %d block bytes read", devc->num_block_read, devc->num_block_bytes);
 713                 }
 714
 715                 devc->num_channel_bytes += len;
 716
 717                 if (devc->num_channel_bytes < expected_data_bytes)
 718                         /* Don't have the full data for this channel yet, re-run. */
 719                         return TRUE;
 720
 721                 /* End of data for this channel. */
 722                 if (devc->model->series->protocol == PROTOCOL_V3) {
 723                         /* Signal end of data download to scope */
 724                         if (devc->data_source != DATA_SOURCE_LIVE)
 725                                 /*
 726                                  * This causes a query error, without it switching
 727                                  * to the next channel causes an error. Fun with
 728                                  * firmware...
 729                                  */
 730                                 rigol_ds_config_set(sdi, ":WAV:END");
 731                 }
 732
 733                 if (devc->channel_entry->next) {
 734                         /* We got the frame for this channel, now get the next channel. */
 735                         devc->channel_entry = devc->channel_entry->next;
 736                         rigol_ds_channel_start(sdi);
 737                 } else {
 738                         /* Done with this frame. */
 739                         packet.type = SR_DF_FRAME_END;
 740                         sr_session_send(cb_data, &packet);
 741
 742                         if (++devc->num_frames == devc->limit_frames) {
 743                                 /* Last frame, stop capture. */
 744                                 sdi->driver->dev_acquisition_stop(sdi, cb_data);
 745                         } else {
 746                                 /* Get the next frame, starting with the first channel. */
 747                                 devc->channel_entry = devc->enabled_channels;
 748
 749                                 rigol_ds_capture_start(sdi);
 750
 751                                 /* Start of next frame. */
 752                                 packet.type = SR_DF_FRAME_BEGIN;
 753                                 sr_session_send(cb_data, &packet);
 754                         }
 755                 }
 756         }
 757
 758         return TRUE;
 759 }
 760
 761 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 762 {
 763         struct dev_context *devc;
 764         char *cmd;
 765         unsigned int i;
 766         int res;
 767
 768         devc = sdi->priv;
 769
 770         /* Analog channel state. */
 771         for (i = 0; i < devc->model->analog_channels; i++) {
 772                 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
 773                 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]);
 774                 g_free(cmd);
 775                 if (res != SR_OK)
 776                         return SR_ERR;
 777         }
 778         sr_dbg("Current analog channel state:");
 779         for (i = 0; i < devc->model->analog_channels; i++)
 780                 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
 781
 782         /* Digital channel state. */
 783         if (devc->model->has_digital) {
 784                 if (sr_scpi_get_bool(sdi->conn,
 785                                 devc->model->series->protocol >= PROTOCOL_V4 ?
 786                                         ":LA:STAT?" : ":LA:DISP?",
 787                                 &devc->la_enabled) != SR_OK)
 788                         return SR_ERR;
 789                 sr_dbg("Logic analyzer %s, current digital channel state:",
 790                                 devc->la_enabled ? "enabled" : "disabled");
 791                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 792                         cmd = g_strdup_printf(
 793                                 devc->model->series->protocol >= PROTOCOL_V4 ?
 794                                         ":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
 795                         res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
 796                         g_free(cmd);
 797                         if (res != SR_OK)
 798                                 return SR_ERR;
 799                         sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
 800                 }
 801         }
 802
 803         /* Timebase. */
 804         if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
 805                 return SR_ERR;
 806         sr_dbg("Current timebase %g", devc->timebase);
 807
 808         /* Vertical gain. */
 809         for (i = 0; i < devc->model->analog_channels; i++) {
 810                 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
 811                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
 812                 g_free(cmd);
 813                 if (res != SR_OK)
 814                         return SR_ERR;
 815         }
 816         sr_dbg("Current vertical gain:");
 817         for (i = 0; i < devc->model->analog_channels; i++)
 818                 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
 819
 820         /* Vertical offset. */
 821         for (i = 0; i < devc->model->analog_channels; i++) {
 822                 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
 823                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
 824                 g_free(cmd);
 825                 if (res != SR_OK)
 826                         return SR_ERR;
 827         }
 828         sr_dbg("Current vertical offset:");
 829         for (i = 0; i < devc->model->analog_channels; i++)
 830                 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);
 831
 832         /* Coupling. */
 833         for (i = 0; i < devc->model->analog_channels; i++) {
 834                 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
 835                 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
 836                 g_free(cmd);
 837                 if (res != SR_OK)
 838                         return SR_ERR;
 839         }
 840         sr_dbg("Current coupling:");
 841         for (i = 0; i < devc->model->analog_channels; i++)
 842                 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
 843
 844         /* Trigger source. */
 845         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
 846                 return SR_ERR;
 847         sr_dbg("Current trigger source %s", devc->trigger_source);
 848
 849         /* Horizontal trigger position. */
 850         if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
 851                 return SR_ERR;
 852         sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
 853
 854         /* Trigger slope. */
 855         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
 856                 return SR_ERR;
 857         sr_dbg("Current trigger slope %s", devc->trigger_slope);
 858
 859         return SR_OK;
 860 }