src/hardware/rigol-ds/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <stdlib.h>
  23 #include <stdarg.h>
  24 #include <unistd.h>
  25 #include <errno.h>
  26 #include <string.h>
  27 #include <math.h>
  28 #include <ctype.h>
  29 #include <time.h>
  30 #include <glib.h>
  31 #include "libsigrok.h"
  32 #include "libsigrok-internal.h"
  33 #include "protocol.h"
  34
  35 /*
  36  * This is a unified protocol driver for the DS1000 and DS2000 series.
  37  *
  38  * DS1000 support tested with a Rigol DS1102D.
  39  *
  40  * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
  41  *
  42  * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
  43  * standard. If you want to read it - it costs real money...
  44  *
  45  * Every response from the scope has a linefeed appended because the
  46  * standard says so. In principle this could be ignored because sending the
  47  * next command clears the output queue of the scope. This driver tries to
  48  * avoid doing that because it may cause an error being generated inside the
  49  * scope and who knows what bugs the firmware has WRT this.
  50  *
  51  * Waveform data is transferred in a format called "arbitrary block program
  52  * data" specified in IEEE 488.2. See Agilents programming manuals for their
  53  * 2000/3000 series scopes for a nice description.
  54  *
  55  * Each data block from the scope has a header, e.g. "#900000001400".
  56  * The '#' marks the start of a block.
  57  * Next is one ASCII decimal digit between 1 and 9, this gives the number of
  58  * ASCII decimal digits following.
  59  * Last are the ASCII decimal digits giving the number of bytes (not
  60  * samples!) in the block.
  61  *
  62  * After this header as many data bytes as indicated follow.
  63  *
  64  * Each data block has a trailing linefeed too.
  65  */
  66
  67 static int parse_int(const char *str, int *ret)
  68 {
  69         char *e;
  70         long tmp;
  71
  72         errno = 0;
  73         tmp = strtol(str, &e, 10);
  74         if (e == str || *e != '\0') {
  75                 sr_dbg("Failed to parse integer: '%s'", str);
  76                 return SR_ERR;
  77         }
  78         if (errno) {
  79                 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
  80                 return SR_ERR;
  81         }
  82         if (tmp > INT_MAX || tmp < INT_MIN) {
  83                 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
  84                 return SR_ERR;
  85         }
  86
  87         *ret = (int)tmp;
  88         return SR_OK;
  89 }
  90
  91 /* Set the next event to wait for in rigol_ds_receive */
  92 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
  93 {
  94         if (event == WAIT_STOP)
  95                 devc->wait_status = 2;
  96         else
  97                 devc->wait_status = 1;
  98         devc->wait_event = event;
  99 }
 100
 101 /*
 102  * Waiting for a event will return a timeout after 2 to 3 seconds in order
 103  * to not block the application.
 104  */
 105 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
 106 {
 107         char *buf;
 108         struct dev_context *devc;
 109         time_t start;
 110
 111         if (!(devc = sdi->priv))
 112                 return SR_ERR;
 113
 114         start = time(NULL);
 115
 116         /*
 117          * Trigger status may return:
 118          * "TD" or "T'D" - triggered
 119          * "AUTO"        - autotriggered
 120          * "RUN"         - running
 121          * "WAIT"        - waiting for trigger
 122          * "STOP"        - stopped
 123          */
 124
 125         if (devc->wait_status == 1) {
 126                 do {
 127                         if (time(NULL) - start >= 3) {
 128                                 sr_dbg("Timeout waiting for trigger");
 129                                 return SR_ERR_TIMEOUT;
 130                         }
 131
 132                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 133                                 return SR_ERR;
 134                 } while (buf[0] == status1 || buf[0] == status2);
 135
 136                 devc->wait_status = 2;
 137         }
 138         if (devc->wait_status == 2) {
 139                 do {
 140                         if (time(NULL) - start >= 3) {
 141                                 sr_dbg("Timeout waiting for trigger");
 142                                 return SR_ERR_TIMEOUT;
 143                         }
 144
 145                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 146                                 return SR_ERR;
 147                 } while (buf[0] != status1 && buf[0] != status2);
 148
 149                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 150         }
 151
 152         return SR_OK;
 153 }
 154
 155 /*
 156  * For live capture we need to wait for a new trigger event to ensure that
 157  * sample data is not returned twice.
 158  *
 159  * Unfortunately this will never really work because for sufficiently fast
 160  * timebases and trigger rates it just can't catch the status changes.
 161  *
 162  * What would be needed is a trigger event register with autoreset like the
 163  * Agilents have. The Rigols don't seem to have anything like this.
 164  *
 165  * The workaround is to only wait for the trigger when the timebase is slow
 166  * enough. Of course this means that for faster timebases sample data can be
 167  * returned multiple times, this effect is mitigated somewhat by sleeping
 168  * for about one sweep time in that case.
 169  */
 170 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
 171 {
 172         struct dev_context *devc;
 173         long s;
 174
 175         if (!(devc = sdi->priv))
 176                 return SR_ERR;
 177
 178         /*
 179          * If timebase < 50 msecs/DIV just sleep about one sweep time except
 180          * for really fast sweeps.
 181          */
 182         if (devc->timebase < 0.0499) {
 183                 if (devc->timebase > 0.99e-6) {
 184                         /*
 185                          * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
 186                          * -> 85 percent of sweep time
 187                          */
 188                         s = (devc->timebase * devc->model->series->num_horizontal_divs
 189                              * 85e6) / 100L;
 190                         sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
 191                         g_usleep(s);
 192                 }
 193                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 194                 return SR_OK;
 195         } else {
 196                 return rigol_ds_event_wait(sdi, 'T', 'A');
 197         }
 198 }
 199
 200 /* Wait for scope to got to "Stop" in single shot mode */
 201 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
 202 {
 203         return rigol_ds_event_wait(sdi, 'S', 'S');
 204 }
 205
 206 /* Check that a single shot acquisition actually succeeded on the DS2000 */
 207 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
 208 {
 209         struct dev_context *devc;
 210         struct sr_channel *ch;
 211         int tmp;
 212
 213         if (!(devc = sdi->priv))
 214                 return SR_ERR;
 215
 216         ch = devc->channel_entry->data;
 217
 218         if (devc->model->series->protocol != PROTOCOL_V3)
 219                 return SR_OK;
 220
 221         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 222                           ch->index + 1) != SR_OK)
 223                 return SR_ERR;
 224         /* Check that the number of samples will be accepted */
 225         if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
 226                 return SR_ERR;
 227         if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
 228                 return SR_ERR;
 229         /*
 230          * If we get an "Execution error" the scope went from "Single" to
 231          * "Stop" without actually triggering. There is no waveform
 232          * displayed and trying to download one will fail - the scope thinks
 233          * it has 1400 samples (like display memory) and the driver thinks
 234          * it has a different number of samples.
 235          *
 236          * In that case just try to capture something again. Might still
 237          * fail in interesting ways.
 238          *
 239          * Ain't firmware fun?
 240          */
 241         if (tmp & 0x10) {
 242                 sr_warn("Single shot acquisition failed, retrying...");
 243                 /* Sleep a bit, otherwise the single shot will often fail */
 244                 g_usleep(500000);
 245                 rigol_ds_config_set(sdi, ":SING");
 246                 rigol_ds_set_wait_event(devc, WAIT_STOP);
 247                 return SR_ERR;
 248         }
 249
 250         return SR_OK;
 251 }
 252
 253 /* Wait for enough data becoming available in scope output buffer */
 254 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
 255 {
 256         char *buf;
 257         struct dev_context *devc;
 258         time_t start;
 259         int len;
 260
 261         if (!(devc = sdi->priv))
 262                 return SR_ERR;
 263
 264         if (devc->model->series->protocol == PROTOCOL_V3) {
 265
 266                 start = time(NULL);
 267
 268                 do {
 269                         if (time(NULL) - start >= 3) {
 270                                 sr_dbg("Timeout waiting for data block");
 271                                 return SR_ERR_TIMEOUT;
 272                         }
 273
 274                         /*
 275                          * The scope copies data really slowly from sample
 276                          * memory to its output buffer, so try not to bother
 277                          * it too much with SCPI requests but don't wait too
 278                          * long for short sample frame sizes.
 279                          */
 280                         g_usleep(devc->analog_frame_size < 15000 ? 100000 : 1000000);
 281
 282                         /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
 283                         if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
 284                                 return SR_ERR;
 285
 286                         if (parse_int(buf + 5, &len) != SR_OK)
 287                                 return SR_ERR;
 288                 } while (buf[0] == 'R' && len < 1000000);
 289         }
 290
 291         rigol_ds_set_wait_event(devc, WAIT_NONE);
 292
 293         return SR_OK;
 294 }
 295
 296 /* Send a configuration setting. */
 297 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
 298 {
 299         struct dev_context *devc = sdi->priv;
 300         va_list args;
 301         int ret;
 302
 303         va_start(args, format);
 304         ret = sr_scpi_send_variadic(sdi->conn, format, args);
 305         va_end(args);
 306
 307         if (ret != SR_OK)
 308                 return SR_ERR;
 309
 310         if (devc->model->series->protocol == PROTOCOL_V2) {
 311                 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
 312                 sr_spew("delay %dms", 100);
 313                 g_usleep(100000);
 314                 return SR_OK;
 315         } else {
 316                 return sr_scpi_get_opc(sdi->conn);
 317         }
 318 }
 319
 320 /* Start capturing a new frameset */
 321 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 322 {
 323         struct dev_context *devc;
 324         gchar *trig_mode;
 325         unsigned int num_channels, i, j;
 326
 327         if (!(devc = sdi->priv))
 328                 return SR_ERR;
 329
 330         sr_dbg("Starting data capture for frameset %lu of %lu",
 331                devc->num_frames + 1, devc->limit_frames);
 332
 333         switch (devc->model->series->protocol) {
 334         case PROTOCOL_V1:
 335                 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 336                 break;
 337         case PROTOCOL_V2:
 338                 if (devc->data_source == DATA_SOURCE_LIVE) {
 339                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
 340                                 return SR_ERR;
 341                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 342                 } else {
 343                         if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 344                                 return SR_ERR;
 345                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
 346                                 return SR_ERR;
 347                         if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
 348                                 return SR_ERR;
 349                         if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
 350                                 return SR_ERR;
 351                         if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 352                                 return SR_ERR;
 353                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 354                 }
 355                 break;
 356         case PROTOCOL_V3:
 357         case PROTOCOL_V4:
 358                 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
 359                         return SR_ERR;
 360                 if (devc->data_source == DATA_SOURCE_LIVE) {
 361                         if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
 362                                 return SR_ERR;
 363                         devc->analog_frame_size = devc->model->series->live_samples;
 364                         devc->digital_frame_size = devc->model->series->live_samples;
 365                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 366                 } else {
 367                         if (devc->model->series->protocol == PROTOCOL_V3) {
 368                                 if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
 369                                         return SR_ERR;
 370                         } else if (devc->model->series->protocol == PROTOCOL_V4) {
 371                                 num_channels = 0;
 372
 373                                 /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
 374                                 for (i = 0; i < devc->model->analog_channels; i++) {
 375                                         if (devc->analog_channels[i]) {
 376                                                 num_channels++;
 377                                         } else if (i >= 2 && devc->model->has_digital) {
 378                                                 for (j = 0; j < 8; j++) {
 379                                                         if (devc->digital_channels[8 * (i - 2) + j]) {
 380                                                                 num_channels++;
 381                                                                 break;
 382                                                         }
 383                                                 }
 384                                         }
 385                                 }
 386
 387                                 devc->analog_frame_size = devc->digital_frame_size =
 388                                         num_channels == 1 ?
 389                                                 devc->model->series->buffer_samples :
 390                                                         num_channels == 2 ?
 391                                                                 devc->model->series->buffer_samples / 2 :
 392                                                                 devc->model->series->buffer_samples / 4;
 393                         }
 394
 395                         if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
 396                                 return SR_ERR;
 397                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 398                 }
 399                 break;
 400         }
 401
 402         return SR_OK;
 403 }
 404
 405 /* Start reading data from the current channel */
 406 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 407 {
 408         struct dev_context *devc;
 409         struct sr_channel *ch;
 410
 411         if (!(devc = sdi->priv))
 412                 return SR_ERR;
 413
 414         ch = devc->channel_entry->data;
 415
 416         sr_dbg("Starting reading data from channel %d", ch->index + 1);
 417
 418         switch (devc->model->series->protocol)
 419         {
 420         case PROTOCOL_V1:
 421         case PROTOCOL_V2:
 422                 if (ch->type == SR_CHANNEL_LOGIC) {
 423                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
 424                                 return SR_ERR;
 425                 } else {
 426                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
 427                                         ch->index + 1) != SR_OK)
 428                                 return SR_ERR;
 429                 }
 430                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 431                 break;
 432         case PROTOCOL_V3:
 433                 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 434                                   ch->index + 1) != SR_OK)
 435                         return SR_ERR;
 436                 if (devc->data_source != DATA_SOURCE_LIVE) {
 437                         if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
 438                                 return SR_ERR;
 439                         if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
 440                                 return SR_ERR;
 441                 }
 442                 break;
 443         case PROTOCOL_V4:
 444                 if (ch->type == SR_CHANNEL_ANALOG) {
 445                         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 446                                         ch->index + 1) != SR_OK)
 447                                 return SR_ERR;
 448                 } else {
 449                         if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d",
 450                                         ch->index) != SR_OK)
 451                                 return SR_ERR;
 452                 }
 453
 454                 if (rigol_ds_config_set(sdi,
 455                                         devc->data_source == DATA_SOURCE_LIVE ?
 456                                                 ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
 457                         return SR_ERR;
 458                 break;
 459         }
 460
 461         if (devc->model->series->protocol >= PROTOCOL_V3 &&
 462                         ch->type == SR_CHANNEL_ANALOG) {
 463                 /* Vertical reference. */
 464                 if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
 465                                 &devc->vert_reference[ch->index]) != SR_OK)
 466                         return SR_ERR;
 467         }
 468
 469         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 470
 471         devc->num_channel_bytes = 0;
 472         devc->num_header_bytes = 0;
 473         devc->num_block_bytes = 0;
 474
 475         return SR_OK;
 476 }
 477
 478 /* Read the header of a data block */
 479 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
 480 {
 481         struct sr_scpi_dev_inst *scpi = sdi->conn;
 482         struct dev_context *devc = sdi->priv;
 483         char *buf = (char *) devc->buffer;
 484         size_t header_length;
 485         int ret;
 486
 487         /* Try to read the hashsign and length digit. */
 488         if (devc->num_header_bytes < 2) {
 489                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 490                                 2 - devc->num_header_bytes);
 491                 if (ret < 0) {
 492                         sr_err("Read error while reading data header.");
 493                         return SR_ERR;
 494                 }
 495                 devc->num_header_bytes += ret;
 496         }
 497
 498         if (devc->num_header_bytes < 2)
 499                 return 0;
 500
 501         if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
 502                 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
 503                 return SR_ERR;
 504         }
 505
 506         header_length = 2 + buf[1] - '0';
 507
 508         /* Try to read the length. */
 509         if (devc->num_header_bytes < header_length) {
 510                 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
 511                                 header_length - devc->num_header_bytes);
 512                 if (ret < 0) {
 513                         sr_err("Read error while reading data header.");
 514                         return SR_ERR;
 515                 }
 516                 devc->num_header_bytes += ret;
 517         }
 518
 519         if (devc->num_header_bytes < header_length)
 520                 return 0;
 521
 522         /* Read the data length. */
 523         buf[header_length] = '\0';
 524
 525         if (parse_int(buf + 2, &ret) != SR_OK) {
 526                 sr_err("Received invalid data block length '%s'.", buf + 2);
 527                 return -1;
 528         }
 529
 530         sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
 531
 532         return ret;
 533 }
 534
 535 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 536 {
 537         struct sr_dev_inst *sdi;
 538         struct sr_scpi_dev_inst *scpi;
 539         struct dev_context *devc;
 540         struct sr_datafeed_packet packet;
 541         struct sr_datafeed_analog analog;
 542         struct sr_datafeed_logic logic;
 543         double vdiv, offset;
 544         int len, i, vref;
 545         struct sr_channel *ch;
 546         gsize expected_data_bytes;
 547
 548         (void)fd;
 549
 550         if (!(sdi = cb_data))
 551                 return TRUE;
 552
 553         if (!(devc = sdi->priv))
 554                 return TRUE;
 555
 556         scpi = sdi->conn;
 557
 558         if (revents == G_IO_IN || revents == 0) {
 559                 switch (devc->wait_event) {
 560                 case WAIT_NONE:
 561                         break;
 562                 case WAIT_TRIGGER:
 563                         if (rigol_ds_trigger_wait(sdi) != SR_OK)
 564                                 return TRUE;
 565                         if (rigol_ds_channel_start(sdi) != SR_OK)
 566                                 return TRUE;
 567                         return TRUE;
 568                 case WAIT_BLOCK:
 569                         if (rigol_ds_block_wait(sdi) != SR_OK)
 570                                 return TRUE;
 571                         break;
 572                 case WAIT_STOP:
 573                         if (rigol_ds_stop_wait(sdi) != SR_OK)
 574                                 return TRUE;
 575                         if (rigol_ds_check_stop(sdi) != SR_OK)
 576                                 return TRUE;
 577                         if (rigol_ds_channel_start(sdi) != SR_OK)
 578                                 return TRUE;
 579                         return TRUE;
 580                 default:
 581                         sr_err("BUG: Unknown event target encountered");
 582                         break;
 583                 }
 584
 585                 ch = devc->channel_entry->data;
 586
 587                 expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
 588                                 devc->analog_frame_size : devc->digital_frame_size;
 589
 590                 if (devc->num_block_bytes == 0) {
 591                         if (devc->model->series->protocol >= PROTOCOL_V4) {
 592                                 if (sr_scpi_send(sdi->conn, ":WAV:START %d",
 593                                                 devc->num_channel_bytes + 1) != SR_OK)
 594                                         return TRUE;
 595                                 if (sr_scpi_send(sdi->conn, ":WAV:STOP %d",
 596                                                 MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
 597                                                         devc->analog_frame_size)) != SR_OK)
 598                                         return TRUE;
 599                         }
 600
 601                         if (devc->model->series->protocol >= PROTOCOL_V3)
 602                                 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
 603                                         return TRUE;
 604
 605                         if (sr_scpi_read_begin(scpi) != SR_OK)
 606                                 return TRUE;
 607
 608                         if (devc->format == FORMAT_IEEE488_2) {
 609                                 sr_dbg("New block header expected");
 610                                 len = rigol_ds_read_header(sdi);
 611                                 if (len == 0)
 612                                         /* Still reading the header. */
 613                                         return TRUE;
 614                                 if (len == -1) {
 615                                         sr_err("Read error, aborting capture.");
 616                                         packet.type = SR_DF_FRAME_END;
 617                                         sr_session_send(cb_data, &packet);
 618                                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 619                                         return TRUE;
 620                                 }
 621                                 /* At slow timebases in live capture the DS2072
 622                                  * sometimes returns "short" data blocks, with
 623                                  * apparently no way to get the rest of the data.
 624                                  * Discard these, the complete data block will
 625                                  * appear eventually.
 626                                  */
 627                                 if (devc->data_source == DATA_SOURCE_LIVE
 628                                                 && (unsigned)len < expected_data_bytes) {
 629                                         sr_dbg("Discarding short data block");
 630                                         sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
 631                                         return TRUE;
 632                                 }
 633                                 devc->num_block_bytes = len;
 634                         } else {
 635                                 devc->num_block_bytes = expected_data_bytes;
 636                         }
 637                         devc->num_block_read = 0;
 638                 }
 639
 640                 len = devc->num_block_bytes - devc->num_block_read;
 641                 if (len > ACQ_BUFFER_SIZE)
 642                         len = ACQ_BUFFER_SIZE;
 643                 sr_dbg("Requesting read of %d bytes", len);
 644
 645                 len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
 646
 647                 if (len == -1) {
 648                         sr_err("Read error, aborting capture.");
 649                         packet.type = SR_DF_FRAME_END;
 650                         sr_session_send(cb_data, &packet);
 651                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 652                         return TRUE;
 653                 }
 654
 655                 sr_dbg("Received %d bytes.", len);
 656
 657                 devc->num_block_read += len;
 658
 659                 if (ch->type == SR_CHANNEL_ANALOG) {
 660                         vref = devc->vert_reference[ch->index];
 661                         vdiv = devc->vdiv[ch->index] / 25.6;
 662                         offset = devc->vert_offset[ch->index];
 663                         if (devc->model->series->protocol >= PROTOCOL_V3)
 664                                 for (i = 0; i < len; i++)
 665                                         devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
 666                         else
 667                                 for (i = 0; i < len; i++)
 668                                         devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
 669                         analog.channels = g_slist_append(NULL, ch);
 670                         analog.num_samples = len;
 671                         analog.data = devc->data;
 672                         analog.mq = SR_MQ_VOLTAGE;
 673                         analog.unit = SR_UNIT_VOLT;
 674                         analog.mqflags = 0;
 675                         packet.type = SR_DF_ANALOG;
 676                         packet.payload = &analog;
 677                         sr_session_send(cb_data, &packet);
 678                         g_slist_free(analog.channels);
 679                 } else {
 680                         logic.length = len;
 681                         // TODO: For the MSO1000Z series, we need a way to express that
 682                         // this data is in fact just for a single channel, with the valid
 683                         // data for that channel in the LSB of each byte.
 684                         logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
 685                         logic.data = devc->buffer;
 686                         packet.type = SR_DF_LOGIC;
 687                         packet.payload = &logic;
 688                         sr_session_send(cb_data, &packet);
 689                 }
 690
 691                 if (devc->num_block_read == devc->num_block_bytes) {
 692                         sr_dbg("Block has been completed");
 693                         if (devc->model->series->protocol >= PROTOCOL_V3) {
 694                                 /* Discard the terminating linefeed */
 695                                 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
 696                         }
 697                         if (devc->format == FORMAT_IEEE488_2) {
 698                                 /* Prepare for possible next block */
 699                                 devc->num_header_bytes = 0;
 700                                 devc->num_block_bytes = 0;
 701                                 if (devc->data_source != DATA_SOURCE_LIVE)
 702                                         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 703                         }
 704                         if (!sr_scpi_read_complete(scpi)) {
 705                                 sr_err("Read should have been completed");
 706                                 packet.type = SR_DF_FRAME_END;
 707                                 sr_session_send(cb_data, &packet);
 708                                 sdi->driver->dev_acquisition_stop(sdi, cb_data);
 709                                 return TRUE;
 710                         }
 711                         devc->num_block_read = 0;
 712                 } else {
 713                         sr_dbg("%d of %d block bytes read", devc->num_block_read, devc->num_block_bytes);
 714                 }
 715
 716                 devc->num_channel_bytes += len;
 717
 718                 if (devc->num_channel_bytes < expected_data_bytes)
 719                         /* Don't have the full data for this channel yet, re-run. */
 720                         return TRUE;
 721
 722                 /* End of data for this channel. */
 723                 if (devc->model->series->protocol == PROTOCOL_V3) {
 724                         /* Signal end of data download to scope */
 725                         if (devc->data_source != DATA_SOURCE_LIVE)
 726                                 /*
 727                                  * This causes a query error, without it switching
 728                                  * to the next channel causes an error. Fun with
 729                                  * firmware...
 730                                  */
 731                                 rigol_ds_config_set(sdi, ":WAV:END");
 732                 }
 733
 734                 if (devc->channel_entry->next) {
 735                         /* We got the frame for this channel, now get the next channel. */
 736                         devc->channel_entry = devc->channel_entry->next;
 737                         rigol_ds_channel_start(sdi);
 738                 } else {
 739                         /* Done with this frame. */
 740                         packet.type = SR_DF_FRAME_END;
 741                         sr_session_send(cb_data, &packet);
 742
 743                         if (++devc->num_frames == devc->limit_frames) {
 744                                 /* Last frame, stop capture. */
 745                                 sdi->driver->dev_acquisition_stop(sdi, cb_data);
 746                         } else {
 747                                 /* Get the next frame, starting with the first channel. */
 748                                 devc->channel_entry = devc->enabled_channels;
 749
 750                                 rigol_ds_capture_start(sdi);
 751
 752                                 /* Start of next frame. */
 753                                 packet.type = SR_DF_FRAME_BEGIN;
 754                                 sr_session_send(cb_data, &packet);
 755                         }
 756                 }
 757         }
 758
 759         return TRUE;
 760 }
 761
 762 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 763 {
 764         struct dev_context *devc;
 765         char *cmd;
 766         unsigned int i;
 767         int res;
 768
 769         devc = sdi->priv;
 770
 771         /* Analog channel state. */
 772         for (i = 0; i < devc->model->analog_channels; i++) {
 773                 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
 774                 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]);
 775                 g_free(cmd);
 776                 if (res != SR_OK)
 777                         return SR_ERR;
 778         }
 779         sr_dbg("Current analog channel state:");
 780         for (i = 0; i < devc->model->analog_channels; i++)
 781                 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
 782
 783         /* Digital channel state. */
 784         if (devc->model->has_digital) {
 785                 if (sr_scpi_get_bool(sdi->conn,
 786                                 devc->model->series->protocol >= PROTOCOL_V4 ?
 787                                         ":LA:STAT?" : ":LA:DISP?",
 788                                 &devc->la_enabled) != SR_OK)
 789                         return SR_ERR;
 790                 sr_dbg("Logic analyzer %s, current digital channel state:",
 791                                 devc->la_enabled ? "enabled" : "disabled");
 792                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 793                         cmd = g_strdup_printf(
 794                                 devc->model->series->protocol >= PROTOCOL_V4 ?
 795                                         ":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
 796                         res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
 797                         g_free(cmd);
 798                         if (res != SR_OK)
 799                                 return SR_ERR;
 800                         sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
 801                 }
 802         }
 803
 804         /* Timebase. */
 805         if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
 806                 return SR_ERR;
 807         sr_dbg("Current timebase %g", devc->timebase);
 808
 809         /* Vertical gain. */
 810         for (i = 0; i < devc->model->analog_channels; i++) {
 811                 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
 812                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
 813                 g_free(cmd);
 814                 if (res != SR_OK)
 815                         return SR_ERR;
 816         }
 817         sr_dbg("Current vertical gain:");
 818         for (i = 0; i < devc->model->analog_channels; i++)
 819                 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
 820
 821         /* Vertical offset. */
 822         for (i = 0; i < devc->model->analog_channels; i++) {
 823                 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
 824                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
 825                 g_free(cmd);
 826                 if (res != SR_OK)
 827                         return SR_ERR;
 828         }
 829         sr_dbg("Current vertical offset:");
 830         for (i = 0; i < devc->model->analog_channels; i++)
 831                 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);
 832
 833         /* Coupling. */
 834         for (i = 0; i < devc->model->analog_channels; i++) {
 835                 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
 836                 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
 837                 g_free(cmd);
 838                 if (res != SR_OK)
 839                         return SR_ERR;
 840         }
 841         sr_dbg("Current coupling:");
 842         for (i = 0; i < devc->model->analog_channels; i++)
 843                 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
 844
 845         /* Trigger source. */
 846         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
 847                 return SR_ERR;
 848         sr_dbg("Current trigger source %s", devc->trigger_source);
 849
 850         /* Horizontal trigger position. */
 851         if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
 852                 return SR_ERR;
 853         sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
 854
 855         /* Trigger slope. */
 856         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
 857                 return SR_ERR;
 858         sr_dbg("Current trigger slope %s", devc->trigger_slope);
 859
 860         return SR_OK;
 861 }