]> sigrok.org Git - libsigrok.git/blob - src/hardware/rigol-ds/api.c
rigol-ds: Add initial Rigol MSO5000 support.
[libsigrok.git] / src / hardware / rigol-ds / api.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7  *
8  * This program is free software: you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation, either version 3 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20  */
21
22 #include <config.h>
23 #include <fcntl.h>
24 #include <unistd.h>
25 #include <stdlib.h>
26 #include <string.h>
27 #include <strings.h>
28 #include <math.h>
29 #include <glib.h>
30 #include <libsigrok/libsigrok.h>
31 #include "libsigrok-internal.h"
32 #include "scpi.h"
33 #include "protocol.h"
34
35 static const uint32_t scanopts[] = {
36         SR_CONF_CONN,
37         SR_CONF_SERIALCOMM,
38 };
39
40 static const uint32_t drvopts[] = {
41         SR_CONF_OSCILLOSCOPE,
42 };
43
44 static const uint32_t devopts[] = {
45         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46         SR_CONF_SAMPLERATE | SR_CONF_GET,
47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48         SR_CONF_NUM_HDIV | SR_CONF_GET,
49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 };
55
56 static const uint32_t devopts_cg_analog[] = {
57         SR_CONF_NUM_VDIV | SR_CONF_GET,
58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61 };
62
63 static const uint64_t timebases[][2] = {
64         /* nanoseconds */
65         { 1, 1000000000 },
66         { 2, 1000000000 },
67         { 5, 1000000000 },
68         { 10, 1000000000 },
69         { 20, 1000000000 },
70         { 50, 1000000000 },
71         { 100, 1000000000 },
72         { 500, 1000000000 },
73         /* microseconds */
74         { 1, 1000000 },
75         { 2, 1000000 },
76         { 5, 1000000 },
77         { 10, 1000000 },
78         { 20, 1000000 },
79         { 50, 1000000 },
80         { 100, 1000000 },
81         { 200, 1000000 },
82         { 500, 1000000 },
83         /* milliseconds */
84         { 1, 1000 },
85         { 2, 1000 },
86         { 5, 1000 },
87         { 10, 1000 },
88         { 20, 1000 },
89         { 50, 1000 },
90         { 100, 1000 },
91         { 200, 1000 },
92         { 500, 1000 },
93         /* seconds */
94         { 1, 1 },
95         { 2, 1 },
96         { 5, 1 },
97         { 10, 1 },
98         { 20, 1 },
99         { 50, 1 },
100         { 100, 1 },
101         { 200, 1 },
102         { 500, 1 },
103         { 1000, 1 },
104 };
105
106 static const uint64_t vdivs[][2] = {
107         /* microvolts */
108         { 500, 1000000 },
109         /* millivolts */
110         { 1, 1000 },
111         { 2, 1000 },
112         { 5, 1000 },
113         { 10, 1000 },
114         { 20, 1000 },
115         { 50, 1000 },
116         { 100, 1000 },
117         { 200, 1000 },
118         { 500, 1000 },
119         /* volts */
120         { 1, 1 },
121         { 2, 1 },
122         { 5, 1 },
123         { 10, 1 },
124         { 20, 1 },
125         { 50, 1 },
126         { 100, 1 },
127 };
128
129 static const char *trigger_sources_2_chans[] = {
130         "CH1", "CH2",
131         "EXT", "AC Line",
132         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
134 };
135
136 static const char *trigger_sources_4_chans[] = {
137         "CH1", "CH2", "CH3", "CH4",
138         "EXT", "AC Line",
139         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
140         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
141 };
142
143 static const char *trigger_slopes[] = {
144         "r", "f",
145 };
146
147 static const char *coupling[] = {
148         "AC", "DC", "GND",
149 };
150
151 static const uint64_t probe_factor[] = {
152         1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
153 };
154
155 /* Do not change the order of entries */
156 static const char *data_sources[] = {
157         "Live",
158         "Memory",
159         "Segmented",
160 };
161
162 static const struct rigol_ds_command std_cmd[] = {
163         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
164         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
165 };
166
167 static const struct rigol_ds_command mso7000a_cmd[] = {
168         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
169         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
170 };
171
172 enum vendor {
173         RIGOL,
174         AGILENT,
175 };
176
177 enum series {
178         VS5000,
179         DS1000,
180         DS2000,
181         DS2000A,
182         DSO1000,
183         DSO1000B,
184         DS1000Z,
185         DS4000,
186         MSO5000,
187         MSO7000A,
188 };
189
190 /* short name, full name */
191 static const struct rigol_ds_vendor supported_vendors[] = {
192         [RIGOL] = {"Rigol", "Rigol Technologies"},
193         [AGILENT] = {"Agilent", "Agilent Technologies"},
194 };
195
196 #define VENDOR(x) &supported_vendors[x]
197 /* vendor, series/name, protocol, data format, max timebase, min vdiv,
198  * number of horizontal divs, live waveform samples, memory buffer samples */
199 static const struct rigol_ds_series supported_series[] = {
200         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
201                 {50, 1}, {2, 1000}, 14, 2048, 0},
202         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
203                 {50, 1}, {2, 1000}, 12, 600, 1048576},
204         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
205                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
206         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
207                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
208         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
209                 {50, 1}, {2, 1000}, 12, 600, 20480},
210         [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
211                 {50, 1}, {2, 1000}, 12, 600, 20480},
212         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
213                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
214         [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
215                 {1000, 1}, {1, 1000}, 14, 1400, 0},
216         [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2,
217                 {1000, 1}, {500, 1000000}, 10, 1000, 0},
218         [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
219                 {50, 1}, {2, 1000}, 10, 1000, 8000000},
220 };
221
222 #define SERIES(x) &supported_series[x]
223 /*
224  * Use a macro to select the correct list of trigger sources and its length
225  * based on the number of analog channels and presence of digital channels.
226  */
227 #define CH_INFO(num, digital) \
228         num, digital, trigger_sources_##num##_chans, \
229         digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
230 /* series, model, min timebase, analog channels, digital */
231 static const struct rigol_ds_model supported_models[] = {
232         {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
233         {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
234         {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
235         {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
236         {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
237         {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
238         {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
239         {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
240         {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
241         {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
242         {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
243         {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
244         {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
245         {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
246         {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
247         {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
248         {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
249         {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
250         {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
251         {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
252         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
253         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
254         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
255         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
256         {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
257         {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
258         {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
259         {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
260         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
261         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
262         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
263         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
264         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
265         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
266         {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
267         {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
268         {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
269         {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
270         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
271         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
272         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
273         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
274         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
275         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
276         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
277         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
278         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
279         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
280         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
281         {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
282         {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd},
283         {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd},
284         {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd},
285         {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd},
286         {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd},
287         {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd},
288         /* TODO: Digital channels are not yet supported on MSO7000A. */
289         {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
290 };
291
292 static struct sr_dev_driver rigol_ds_driver_info;
293
294 static void clear_helper(struct dev_context *devc)
295 {
296         unsigned int i;
297
298         g_free(devc->data);
299         g_free(devc->buffer);
300         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
301                 g_free(devc->coupling[i]);
302         g_free(devc->trigger_source);
303         g_free(devc->trigger_slope);
304         g_free(devc->analog_groups);
305 }
306
307 static int dev_clear(const struct sr_dev_driver *di)
308 {
309         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
310 }
311
312 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
313 {
314         struct dev_context *devc;
315         struct sr_dev_inst *sdi;
316         struct sr_scpi_hw_info *hw_info;
317         struct sr_channel *ch;
318         long n[3];
319         unsigned int i;
320         const struct rigol_ds_model *model = NULL;
321         gchar *channel_name, **version;
322
323         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
324                 sr_info("Couldn't get IDN response, retrying.");
325                 sr_scpi_close(scpi);
326                 sr_scpi_open(scpi);
327                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
328                         sr_info("Couldn't get IDN response.");
329                         return NULL;
330                 }
331         }
332
333         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
334                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
335                                         supported_models[i].series->vendor->full_name) &&
336                                 !strcmp(hw_info->model, supported_models[i].name)) {
337                         model = &supported_models[i];
338                         break;
339                 }
340         }
341
342         if (!model) {
343                 sr_scpi_hw_info_free(hw_info);
344                 return NULL;
345         }
346
347         sdi = g_malloc0(sizeof(struct sr_dev_inst));
348         sdi->vendor = g_strdup(model->series->vendor->name);
349         sdi->model = g_strdup(model->name);
350         sdi->version = g_strdup(hw_info->firmware_version);
351         sdi->conn = scpi;
352         sdi->driver = &rigol_ds_driver_info;
353         sdi->inst_type = SR_INST_SCPI;
354         sdi->serial_num = g_strdup(hw_info->serial_number);
355         devc = g_malloc0(sizeof(struct dev_context));
356         devc->limit_frames = 0;
357         devc->model = model;
358         devc->format = model->series->format;
359
360         /* DS1000 models with firmware before 0.2.4 used the old data format. */
361         if (model->series == SERIES(DS1000)) {
362                 version = g_strsplit(hw_info->firmware_version, ".", 0);
363                 do {
364                         if (!version[0] || !version[1] || !version[2])
365                                 break;
366                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
367                                 break;
368                         for (i = 0; i < 3; i++) {
369                                 if (sr_atol(version[i], &n[i]) != SR_OK)
370                                         break;
371                         }
372                         if (i != 3)
373                                 break;
374                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
375                         if (scpi->firmware_version < 24) {
376                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
377                                 devc->format = FORMAT_RAW;
378                         }
379                         break;
380                 } while (0);
381                 g_strfreev(version);
382         }
383
384         sr_scpi_hw_info_free(hw_info);
385
386         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
387                                         model->analog_channels);
388
389         for (i = 0; i < model->analog_channels; i++) {
390                 channel_name = g_strdup_printf("CH%d", i + 1);
391                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
392
393                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
394
395                 devc->analog_groups[i]->name = channel_name;
396                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
397                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
398                                 devc->analog_groups[i]);
399         }
400
401         if (devc->model->has_digital) {
402                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
403
404                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
405                         channel_name = g_strdup_printf("D%d", i);
406                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
407                         g_free(channel_name);
408                         devc->digital_group->channels = g_slist_append(
409                                         devc->digital_group->channels, ch);
410                 }
411                 devc->digital_group->name = g_strdup("LA");
412                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
413                                 devc->digital_group);
414         }
415
416         for (i = 0; i < ARRAY_SIZE(timebases); i++) {
417                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
418                         devc->timebases = &timebases[i];
419                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
420                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
421         }
422
423         for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
424                 if (!memcmp(&devc->model->series->min_vdiv,
425                                         &vdivs[i], sizeof(uint64_t[2]))) {
426                         devc->vdivs = &vdivs[i];
427                         devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
428                 }
429         }
430
431         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
432         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
433
434         devc->data_source = DATA_SOURCE_LIVE;
435
436         sdi->priv = devc;
437
438         return sdi;
439 }
440
441 static GSList *scan(struct sr_dev_driver *di, GSList *options)
442 {
443         return sr_scpi_scan(di->context, options, probe_device);
444 }
445
446 static int dev_open(struct sr_dev_inst *sdi)
447 {
448         int ret;
449         struct sr_scpi_dev_inst *scpi = sdi->conn;
450
451         if ((ret = sr_scpi_open(scpi)) < 0) {
452                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
453                 return SR_ERR;
454         }
455
456         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
457                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
458                 return SR_ERR;
459         }
460
461         return SR_OK;
462 }
463
464 static int dev_close(struct sr_dev_inst *sdi)
465 {
466         struct sr_scpi_dev_inst *scpi;
467         struct dev_context *devc;
468
469         scpi = sdi->conn;
470         devc = sdi->priv;
471
472         if (!scpi)
473                 return SR_ERR_BUG;
474
475         if (devc->model->series->protocol == PROTOCOL_V2)
476                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
477
478         return sr_scpi_close(scpi);
479 }
480
481 static int analog_frame_size(const struct sr_dev_inst *sdi)
482 {
483         struct dev_context *devc = sdi->priv;
484         struct sr_channel *ch;
485         int analog_channels = 0;
486         GSList *l;
487
488         for (l = sdi->channels; l; l = l->next) {
489                 ch = l->data;
490                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
491                         analog_channels++;
492         }
493
494         if (analog_channels == 0)
495                 return 0;
496
497         switch (devc->data_source) {
498         case DATA_SOURCE_LIVE:
499                 return devc->model->series->live_samples;
500         case DATA_SOURCE_MEMORY:
501                 return devc->model->series->buffer_samples / analog_channels;
502         default:
503                 return 0;
504         }
505 }
506
507 static int digital_frame_size(const struct sr_dev_inst *sdi)
508 {
509         struct dev_context *devc = sdi->priv;
510
511         switch (devc->data_source) {
512         case DATA_SOURCE_LIVE:
513                 return devc->model->series->live_samples * 2;
514         case DATA_SOURCE_MEMORY:
515                 return devc->model->series->buffer_samples * 2;
516         default:
517                 return 0;
518         }
519 }
520
521 static int config_get(uint32_t key, GVariant **data,
522         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
523 {
524         struct dev_context *devc;
525         struct sr_channel *ch;
526         const char *tmp_str;
527         uint64_t samplerate;
528         int analog_channel = -1;
529         float smallest_diff = INFINITY;
530         int idx = -1;
531         unsigned i;
532
533         if (!sdi)
534                 return SR_ERR_ARG;
535
536         devc = sdi->priv;
537
538         /* If a channel group is specified, it must be a valid one. */
539         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
540                 sr_err("Invalid channel group specified.");
541                 return SR_ERR;
542         }
543
544         if (cg) {
545                 ch = g_slist_nth_data(cg->channels, 0);
546                 if (!ch)
547                         return SR_ERR;
548                 if (ch->type == SR_CHANNEL_ANALOG) {
549                         if (ch->name[2] < '1' || ch->name[2] > '4')
550                                 return SR_ERR;
551                         analog_channel = ch->name[2] - '1';
552                 }
553         }
554
555         switch (key) {
556         case SR_CONF_NUM_HDIV:
557                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
558                 break;
559         case SR_CONF_NUM_VDIV:
560                 *data = g_variant_new_int32(devc->num_vdivs);
561                 break;
562         case SR_CONF_DATA_SOURCE:
563                 if (devc->data_source == DATA_SOURCE_LIVE)
564                         *data = g_variant_new_string("Live");
565                 else if (devc->data_source == DATA_SOURCE_MEMORY)
566                         *data = g_variant_new_string("Memory");
567                 else
568                         *data = g_variant_new_string("Segmented");
569                 break;
570         case SR_CONF_SAMPLERATE:
571                 if (devc->data_source == DATA_SOURCE_LIVE) {
572                         samplerate = analog_frame_size(sdi) /
573                                 (devc->timebase * devc->model->series->num_horizontal_divs);
574                         *data = g_variant_new_uint64(samplerate);
575                 } else {
576                         sr_dbg("Unknown data source: %d.", devc->data_source);
577                         return SR_ERR_NA;
578                 }
579                 break;
580         case SR_CONF_TRIGGER_SOURCE:
581                 if (!strcmp(devc->trigger_source, "ACL"))
582                         tmp_str = "AC Line";
583                 else if (!strcmp(devc->trigger_source, "CHAN1"))
584                         tmp_str = "CH1";
585                 else if (!strcmp(devc->trigger_source, "CHAN2"))
586                         tmp_str = "CH2";
587                 else if (!strcmp(devc->trigger_source, "CHAN3"))
588                         tmp_str = "CH3";
589                 else if (!strcmp(devc->trigger_source, "CHAN4"))
590                         tmp_str = "CH4";
591                 else
592                         tmp_str = devc->trigger_source;
593                 *data = g_variant_new_string(tmp_str);
594                 break;
595         case SR_CONF_TRIGGER_SLOPE:
596                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
597                         tmp_str = "r";
598                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
599                         tmp_str = "f";
600                 } else {
601                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
602                         return SR_ERR_NA;
603                 }
604                 *data = g_variant_new_string(tmp_str);
605                 break;
606         case SR_CONF_TRIGGER_LEVEL:
607                 *data = g_variant_new_double(devc->trigger_level);
608                 break;
609         case SR_CONF_TIMEBASE:
610                 for (i = 0; i < devc->num_timebases; i++) {
611                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
612                         float diff = fabs(devc->timebase - tb);
613                         if (diff < smallest_diff) {
614                                 smallest_diff = diff;
615                                 idx = i;
616                         }
617                 }
618                 if (idx < 0) {
619                         sr_dbg("Negative timebase index: %d.", idx);
620                         return SR_ERR_NA;
621                 }
622                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
623                                               devc->timebases[idx][1]);
624                 break;
625         case SR_CONF_VDIV:
626                 if (analog_channel < 0) {
627                         sr_dbg("Negative analog channel: %d.", analog_channel);
628                         return SR_ERR_NA;
629                 }
630                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
631                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
632                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
633                         if (diff < smallest_diff) {
634                                 smallest_diff = diff;
635                                 idx = i;
636                         }
637                 }
638                 if (idx < 0) {
639                         sr_dbg("Negative vdiv index: %d.", idx);
640                         return SR_ERR_NA;
641                 }
642                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
643                 break;
644         case SR_CONF_COUPLING:
645                 if (analog_channel < 0) {
646                         sr_dbg("Negative analog channel: %d.", analog_channel);
647                         return SR_ERR_NA;
648                 }
649                 *data = g_variant_new_string(devc->coupling[analog_channel]);
650                 break;
651         case SR_CONF_PROBE_FACTOR:
652                 if (analog_channel < 0) {
653                         sr_dbg("Negative analog channel: %d.", analog_channel);
654                         return SR_ERR_NA;
655                 }
656                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
657                 break;
658         default:
659                 return SR_ERR_NA;
660         }
661
662         return SR_OK;
663 }
664
665 static int config_set(uint32_t key, GVariant *data,
666         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
667 {
668         struct dev_context *devc;
669         uint64_t p;
670         double t_dbl;
671         int ret, idx, i;
672         const char *tmp_str;
673         char buffer[16];
674
675         devc = sdi->priv;
676
677         /* If a channel group is specified, it must be a valid one. */
678         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
679                 sr_err("Invalid channel group specified.");
680                 return SR_ERR;
681         }
682
683         switch (key) {
684         case SR_CONF_LIMIT_FRAMES:
685                 devc->limit_frames = g_variant_get_uint64(data);
686                 break;
687         case SR_CONF_TRIGGER_SLOPE:
688                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
689                         return SR_ERR_ARG;
690                 g_free(devc->trigger_slope);
691                 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
692                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
693         case SR_CONF_HORIZ_TRIGGERPOS:
694                 t_dbl = g_variant_get_double(data);
695                 if (t_dbl < 0.0 || t_dbl > 1.0) {
696                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
697                         return SR_ERR;
698                 }
699                 devc->horiz_triggerpos = t_dbl;
700                 /* We have the trigger offset as a percentage of the frame, but
701                  * need to express this in seconds. */
702                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
703                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
704                 return rigol_ds_config_set(sdi,
705                         devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
706         case SR_CONF_TRIGGER_LEVEL:
707                 t_dbl = g_variant_get_double(data);
708                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
709                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
710                 if (ret == SR_OK)
711                         devc->trigger_level = t_dbl;
712                 return ret;
713         case SR_CONF_TIMEBASE:
714                 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
715                         return SR_ERR_ARG;
716                 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
717                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
718                                 devc->timebase);
719                 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
720         case SR_CONF_TRIGGER_SOURCE:
721                 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
722                         return SR_ERR_ARG;
723                 g_free(devc->trigger_source);
724                 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
725                 if (!strcmp(devc->trigger_source, "AC Line"))
726                         tmp_str = "ACL";
727                 else if (!strcmp(devc->trigger_source, "CH1"))
728                         tmp_str = "CHAN1";
729                 else if (!strcmp(devc->trigger_source, "CH2"))
730                         tmp_str = "CHAN2";
731                 else if (!strcmp(devc->trigger_source, "CH3"))
732                         tmp_str = "CHAN3";
733                 else if (!strcmp(devc->trigger_source, "CH4"))
734                         tmp_str = "CHAN4";
735                 else
736                         tmp_str = (char *)devc->trigger_source;
737                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
738         case SR_CONF_VDIV:
739                 if (!cg)
740                         return SR_ERR_CHANNEL_GROUP;
741                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
742                         return SR_ERR_ARG;
743                 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
744                         return SR_ERR_ARG;
745                 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
746                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
747                 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
748         case SR_CONF_COUPLING:
749                 if (!cg)
750                         return SR_ERR_CHANNEL_GROUP;
751                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
752                         return SR_ERR_ARG;
753                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
754                         return SR_ERR_ARG;
755                 g_free(devc->coupling[i]);
756                 devc->coupling[i] = g_strdup(coupling[idx]);
757                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
758         case SR_CONF_PROBE_FACTOR:
759                 if (!cg)
760                         return SR_ERR_CHANNEL_GROUP;
761                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
762                         return SR_ERR_ARG;
763                 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
764                         return SR_ERR_ARG;
765                 p = g_variant_get_uint64(data);
766                 devc->attenuation[i] = probe_factor[idx];
767                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
768                 if (ret == SR_OK)
769                         rigol_ds_get_dev_cfg_vertical(sdi);
770                 return ret;
771         case SR_CONF_DATA_SOURCE:
772                 tmp_str = g_variant_get_string(data, NULL);
773                 if (!strcmp(tmp_str, "Live"))
774                         devc->data_source = DATA_SOURCE_LIVE;
775                 else if (devc->model->series->protocol >= PROTOCOL_V2
776                         && !strcmp(tmp_str, "Memory"))
777                         devc->data_source = DATA_SOURCE_MEMORY;
778                 else if (devc->model->series->protocol >= PROTOCOL_V3
779                          && !strcmp(tmp_str, "Segmented"))
780                         devc->data_source = DATA_SOURCE_SEGMENTED;
781                 else {
782                         sr_err("Unknown data source: '%s'.", tmp_str);
783                         return SR_ERR;
784                 }
785                 break;
786         default:
787                 return SR_ERR_NA;
788         }
789
790         return SR_OK;
791 }
792
793 static int config_list(uint32_t key, GVariant **data,
794         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
795 {
796         struct dev_context *devc;
797
798         devc = (sdi) ? sdi->priv : NULL;
799
800         switch (key) {
801         case SR_CONF_SCAN_OPTIONS:
802         case SR_CONF_DEVICE_OPTIONS:
803                 if (!cg)
804                         return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
805                 if (!devc)
806                         return SR_ERR_ARG;
807                 if (cg == devc->digital_group) {
808                         *data = std_gvar_array_u32(NULL, 0);
809                         return SR_OK;
810                 } else {
811                         if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
812                                 return SR_ERR_ARG;
813                         *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
814                         return SR_OK;
815                 }
816                 break;
817         case SR_CONF_COUPLING:
818                 if (!cg)
819                         return SR_ERR_CHANNEL_GROUP;
820                 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
821                 break;
822         case SR_CONF_PROBE_FACTOR:
823                 if (!cg)
824                         return SR_ERR_CHANNEL_GROUP;
825                 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
826                 break;
827         case SR_CONF_VDIV:
828                 if (!devc)
829                         /* Can't know this until we have the exact model. */
830                         return SR_ERR_ARG;
831                 if (!cg)
832                         return SR_ERR_CHANNEL_GROUP;
833                 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
834                 break;
835         case SR_CONF_TIMEBASE:
836                 if (!devc)
837                         /* Can't know this until we have the exact model. */
838                         return SR_ERR_ARG;
839                 if (devc->num_timebases <= 0)
840                         return SR_ERR_NA;
841                 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
842                 break;
843         case SR_CONF_TRIGGER_SOURCE:
844                 if (!devc)
845                         /* Can't know this until we have the exact model. */
846                         return SR_ERR_ARG;
847                 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
848                 break;
849         case SR_CONF_TRIGGER_SLOPE:
850                 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
851                 break;
852         case SR_CONF_DATA_SOURCE:
853                 if (!devc)
854                         /* Can't know this until we have the exact model. */
855                         return SR_ERR_ARG;
856                 switch (devc->model->series->protocol) {
857                 case PROTOCOL_V1:
858                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
859                         break;
860                 case PROTOCOL_V2:
861                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
862                         break;
863                 default:
864                         *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
865                         break;
866                 }
867                 break;
868         default:
869                 return SR_ERR_NA;
870         }
871
872         return SR_OK;
873 }
874
875 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
876 {
877         struct sr_scpi_dev_inst *scpi;
878         struct dev_context *devc;
879         struct sr_channel *ch;
880         struct sr_datafeed_packet packet;
881         gboolean some_digital;
882         GSList *l;
883         char *cmd;
884
885         scpi = sdi->conn;
886         devc = sdi->priv;
887
888         devc->num_frames = 0;
889
890         some_digital = FALSE;
891         for (l = sdi->channels; l; l = l->next) {
892                 ch = l->data;
893                 sr_dbg("handling channel %s", ch->name);
894                 if (ch->type == SR_CHANNEL_ANALOG) {
895                         if (ch->enabled)
896                                 devc->enabled_channels = g_slist_append(
897                                                 devc->enabled_channels, ch);
898                         if (ch->enabled != devc->analog_channels[ch->index]) {
899                                 /* Enabled channel is currently disabled, or vice versa. */
900                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
901                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
902                                         return SR_ERR;
903                                 devc->analog_channels[ch->index] = ch->enabled;
904                         }
905                 } else if (ch->type == SR_CHANNEL_LOGIC) {
906                         /* Only one list entry for older protocols. All channels are
907                          * retrieved together when this entry is processed. */
908                         if (ch->enabled && (
909                                                 devc->model->series->protocol > PROTOCOL_V3 ||
910                                                 !some_digital))
911                                 devc->enabled_channels = g_slist_append(
912                                                 devc->enabled_channels, ch);
913                         if (ch->enabled) {
914                                 some_digital = TRUE;
915                                 /* Turn on LA module if currently off. */
916                                 if (!devc->la_enabled) {
917                                         if (rigol_ds_config_set(sdi,
918                                                         devc->model->series->protocol >= PROTOCOL_V3 ?
919                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
920                                                 return SR_ERR;
921                                         devc->la_enabled = TRUE;
922                                 }
923                         }
924                         if (ch->enabled != devc->digital_channels[ch->index]) {
925                                 /* Enabled channel is currently disabled, or vice versa. */
926                                 if (devc->model->series->protocol >= PROTOCOL_V5)
927                                         cmd = ":LA:DISP D%d,%s";
928                                 else if (devc->model->series->protocol >= PROTOCOL_V3)
929                                         cmd = ":LA:DIG%d:DISP %s";
930                                 else
931                                         cmd = ":DIG%d:TURN %s";
932
933                                 if (rigol_ds_config_set(sdi, cmd, ch->index,
934                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
935                                         return SR_ERR;
936                                 devc->digital_channels[ch->index] = ch->enabled;
937                         }
938                 }
939         }
940
941         if (!devc->enabled_channels)
942                 return SR_ERR;
943
944         /* Turn off LA module if on and no digital channels selected. */
945         if (devc->la_enabled && !some_digital)
946                 if (rigol_ds_config_set(sdi,
947                                 devc->model->series->protocol >= PROTOCOL_V3 ?
948                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
949                         return SR_ERR;
950
951         /* Set memory mode. */
952         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
953                 sr_err("Data source 'Segmented' not yet supported");
954                 return SR_ERR;
955         }
956
957         devc->analog_frame_size = analog_frame_size(sdi);
958         devc->digital_frame_size = digital_frame_size(sdi);
959
960         switch (devc->model->series->protocol) {
961         case PROTOCOL_V2:
962                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
963                         return SR_ERR;
964                 break;
965         case PROTOCOL_V3:
966                 /* Apparently for the DS2000 the memory
967                  * depth can only be set in Running state -
968                  * this matches the behaviour of the UI. */
969                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
970                         return SR_ERR;
971                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
972                                         devc->analog_frame_size) != SR_OK)
973                         return SR_ERR;
974                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
975                         return SR_ERR;
976                 break;
977         default:
978                 break;
979         }
980
981         if (devc->data_source == DATA_SOURCE_LIVE)
982                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
983                         return SR_ERR;
984
985         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
986                         rigol_ds_receive, (void *)sdi);
987
988         std_session_send_df_header(sdi);
989
990         devc->channel_entry = devc->enabled_channels;
991
992         if (rigol_ds_capture_start(sdi) != SR_OK)
993                 return SR_ERR;
994
995         /* Start of first frame. */
996         packet.type = SR_DF_FRAME_BEGIN;
997         sr_session_send(sdi, &packet);
998
999         return SR_OK;
1000 }
1001
1002 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1003 {
1004         struct dev_context *devc;
1005         struct sr_scpi_dev_inst *scpi;
1006
1007         devc = sdi->priv;
1008
1009         std_session_send_df_end(sdi);
1010
1011         g_slist_free(devc->enabled_channels);
1012         devc->enabled_channels = NULL;
1013         scpi = sdi->conn;
1014         sr_scpi_source_remove(sdi->session, scpi);
1015
1016         return SR_OK;
1017 }
1018
1019 static struct sr_dev_driver rigol_ds_driver_info = {
1020         .name = "rigol-ds",
1021         .longname = "Rigol DS",
1022         .api_version = 1,
1023         .init = std_init,
1024         .cleanup = std_cleanup,
1025         .scan = scan,
1026         .dev_list = std_dev_list,
1027         .dev_clear = dev_clear,
1028         .config_get = config_get,
1029         .config_set = config_set,
1030         .config_list = config_list,
1031         .dev_open = dev_open,
1032         .dev_close = dev_close,
1033         .dev_acquisition_start = dev_acquisition_start,
1034         .dev_acquisition_stop = dev_acquisition_stop,
1035         .context = NULL,
1036 };
1037 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);