src/hardware/rigol-ds/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <config.h>
  23 #include <fcntl.h>
  24 #include <unistd.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27 #include <strings.h>
  28 #include <math.h>
  29 #include <glib.h>
  30 #include <libsigrok/libsigrok.h>
  31 #include "libsigrok-internal.h"
  32 #include "scpi.h"
  33 #include "protocol.h"
  34
  35 static const uint32_t scanopts[] = {
  36         SR_CONF_CONN,
  37         SR_CONF_SERIALCOMM
  38 };
  39
  40 static const uint32_t drvopts[] = {
  41         SR_CONF_OSCILLOSCOPE,
  42 };
  43
  44 static const uint32_t devopts[] = {
  45         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
  46         SR_CONF_SAMPLERATE | SR_CONF_GET,
  47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  48         SR_CONF_NUM_HDIV | SR_CONF_GET,
  49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
  50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
  53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  54 };
  55
  56 static const uint32_t analog_devopts[] = {
  57         SR_CONF_NUM_VDIV | SR_CONF_GET,
  58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  61 };
  62
  63 static const uint64_t timebases[][2] = {
  64         /* nanoseconds */
  65         { 1, 1000000000 },
  66         { 2, 1000000000 },
  67         { 5, 1000000000 },
  68         { 10, 1000000000 },
  69         { 20, 1000000000 },
  70         { 50, 1000000000 },
  71         { 100, 1000000000 },
  72         { 500, 1000000000 },
  73         /* microseconds */
  74         { 1, 1000000 },
  75         { 2, 1000000 },
  76         { 5, 1000000 },
  77         { 10, 1000000 },
  78         { 20, 1000000 },
  79         { 50, 1000000 },
  80         { 100, 1000000 },
  81         { 200, 1000000 },
  82         { 500, 1000000 },
  83         /* milliseconds */
  84         { 1, 1000 },
  85         { 2, 1000 },
  86         { 5, 1000 },
  87         { 10, 1000 },
  88         { 20, 1000 },
  89         { 50, 1000 },
  90         { 100, 1000 },
  91         { 200, 1000 },
  92         { 500, 1000 },
  93         /* seconds */
  94         { 1, 1 },
  95         { 2, 1 },
  96         { 5, 1 },
  97         { 10, 1 },
  98         { 20, 1 },
  99         { 50, 1 },
 100         { 100, 1 },
 101         { 200, 1 },
 102         { 500, 1 },
 103         { 1000, 1 },
 104 };
 105
 106 static const uint64_t vdivs[][2] = {
 107         /* microvolts */
 108         { 500, 1000000 },
 109         /* millivolts */
 110         { 1, 1000 },
 111         { 2, 1000 },
 112         { 5, 1000 },
 113         { 10, 1000 },
 114         { 20, 1000 },
 115         { 50, 1000 },
 116         { 100, 1000 },
 117         { 200, 1000 },
 118         { 500, 1000 },
 119         /* volts */
 120         { 1, 1 },
 121         { 2, 1 },
 122         { 5, 1 },
 123         { 10, 1 },
 124         { 20, 1 },
 125         { 50, 1 },
 126         { 100, 1 },
 127 };
 128
 129 #define NUM_TIMEBASE  ARRAY_SIZE(timebases)
 130 #define NUM_VDIV      ARRAY_SIZE(vdivs)
 131
 132 static const char *trigger_sources[] = {
 133         "CH1",
 134         "CH2",
 135         "CH3",
 136         "CH4",
 137         "EXT",
 138         "AC Line",
 139         "D0",
 140         "D1",
 141         "D2",
 142         "D3",
 143         "D4",
 144         "D5",
 145         "D6",
 146         "D7",
 147         "D8",
 148         "D9",
 149         "D10",
 150         "D11",
 151         "D12",
 152         "D13",
 153         "D14",
 154         "D15",
 155 };
 156
 157 static const char *trigger_slopes[] = {
 158         "r",
 159         "f",
 160 };
 161
 162 static const char *coupling[] = {
 163         "AC",
 164         "DC",
 165         "GND",
 166 };
 167
 168 static const uint64_t probe_factor[] = {
 169         1,
 170         2,
 171         5,
 172         10,
 173         20,
 174         50,
 175         100,
 176         200,
 177         500,
 178         1000,
 179 };
 180
 181 /* Do not change the order of entries */
 182 static const char *data_sources[] = {
 183         "Live",
 184         "Memory",
 185         "Segmented",
 186 };
 187
 188 enum vendor {
 189         RIGOL,
 190         AGILENT,
 191 };
 192
 193 enum series {
 194         VS5000,
 195         DS1000,
 196         DS2000,
 197         DS2000A,
 198         DSO1000,
 199         DS1000Z,
 200 };
 201
 202 /* short name, full name */
 203 static const struct rigol_ds_vendor supported_vendors[] = {
 204         [RIGOL] = {"Rigol", "Rigol Technologies"},
 205         [AGILENT] = {"Agilent", "Agilent Technologies"},
 206 };
 207
 208 #define VENDOR(x) &supported_vendors[x]
 209 /* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
 210  * live waveform samples, memory buffer samples */
 211 static const struct rigol_ds_series supported_series[] = {
 212         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
 213                 {50, 1}, {2, 1000}, 14, 2048, 0},
 214         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
 215                 {50, 1}, {2, 1000}, 12, 600, 1048576},
 216         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
 217                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
 218         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
 219                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
 220         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 221                 {50, 1}, {2, 1000}, 12, 600, 20480},
 222         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
 223                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
 224 };
 225
 226 #define SERIES(x) &supported_series[x]
 227 /* series, model, min timebase, analog channels, digital */
 228 static const struct rigol_ds_model supported_models[] = {
 229         {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
 230         {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
 231         {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
 232         {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
 233         {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
 234         {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
 235         {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
 236         {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
 237         {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
 238         {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
 239         {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
 240         {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
 241         {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
 242         {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
 243         {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
 244         {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
 245         {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
 246         {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
 247         {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
 248         {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
 249         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
 250         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
 251         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
 252         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
 253         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
 254         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
 255         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
 256         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
 257         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
 258         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
 259         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
 260         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
 261         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
 262         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
 263         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
 264         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
 265         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
 266         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
 267         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
 268         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
 269         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
 270 };
 271
 272 static struct sr_dev_driver rigol_ds_driver_info;
 273
 274 static void clear_helper(void *priv)
 275 {
 276         struct dev_context *devc;
 277         unsigned int i;
 278
 279         devc = priv;
 280         g_free(devc->data);
 281         g_free(devc->buffer);
 282         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
 283                 g_free(devc->coupling[i]);
 284         g_free(devc->trigger_source);
 285         g_free(devc->trigger_slope);
 286         g_free(devc->analog_groups);
 287         g_free(devc);
 288 }
 289
 290 static int dev_clear(const struct sr_dev_driver *di)
 291 {
 292         return std_dev_clear(di, clear_helper);
 293 }
 294
 295 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
 296 {
 297         struct dev_context *devc;
 298         struct sr_dev_inst *sdi;
 299         struct sr_scpi_hw_info *hw_info;
 300         struct sr_channel *ch;
 301         long n[3];
 302         unsigned int i;
 303         const struct rigol_ds_model *model = NULL;
 304         gchar *channel_name, **version;
 305
 306         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 307                 sr_info("Couldn't get IDN response, retrying.");
 308                 sr_scpi_close(scpi);
 309                 sr_scpi_open(scpi);
 310                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 311                         sr_info("Couldn't get IDN response.");
 312                         return NULL;
 313                 }
 314         }
 315
 316         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
 317                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
 318                                         supported_models[i].series->vendor->full_name) &&
 319                                 !strcmp(hw_info->model, supported_models[i].name)) {
 320                         model = &supported_models[i];
 321                         break;
 322                 }
 323         }
 324
 325         if (!model) {
 326                 sr_scpi_hw_info_free(hw_info);
 327                 return NULL;
 328         }
 329
 330         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 331         sdi->vendor = g_strdup(model->series->vendor->name);
 332         sdi->model = g_strdup(model->name);
 333         sdi->version = g_strdup(hw_info->firmware_version);
 334         sdi->conn = scpi;
 335         sdi->driver = &rigol_ds_driver_info;
 336         sdi->inst_type = SR_INST_SCPI;
 337         sdi->serial_num = g_strdup(hw_info->serial_number);
 338         devc = g_malloc0(sizeof(struct dev_context));
 339         devc->limit_frames = 0;
 340         devc->model = model;
 341         devc->format = model->series->format;
 342
 343         /* DS1000 models with firmware before 0.2.4 used the old data format. */
 344         if (model->series == SERIES(DS1000)) {
 345                 version = g_strsplit(hw_info->firmware_version, ".", 0);
 346                 do {
 347                         if (!version[0] || !version[1] || !version[2])
 348                                 break;
 349                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
 350                                 break;
 351                         for (i = 0; i < 3; i++) {
 352                                 if (sr_atol(version[i], &n[i]) != SR_OK)
 353                                         break;
 354                         }
 355                         if (i != 3)
 356                                 break;
 357                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
 358                         if (scpi->firmware_version < 24) {
 359                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
 360                                 devc->format = FORMAT_RAW;
 361                         }
 362                         break;
 363                 } while (0);
 364                 g_strfreev(version);
 365         }
 366
 367         sr_scpi_hw_info_free(hw_info);
 368
 369         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
 370                                         model->analog_channels);
 371
 372         for (i = 0; i < model->analog_channels; i++) {
 373                 channel_name = g_strdup_printf("CH%d", i + 1);
 374                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
 375
 376                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
 377
 378                 devc->analog_groups[i]->name = channel_name;
 379                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
 380                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 381                                 devc->analog_groups[i]);
 382         }
 383
 384         if (devc->model->has_digital) {
 385                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
 386
 387                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 388                         channel_name = g_strdup_printf("D%d", i);
 389                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
 390                         g_free(channel_name);
 391                         devc->digital_group->channels = g_slist_append(
 392                                         devc->digital_group->channels, ch);
 393                 }
 394                 devc->digital_group->name = g_strdup("LA");
 395                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 396                                 devc->digital_group);
 397         }
 398
 399         for (i = 0; i < NUM_TIMEBASE; i++) {
 400                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
 401                         devc->timebases = &timebases[i];
 402                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
 403                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
 404         }
 405
 406         for (i = 0; i < NUM_VDIV; i++) {
 407                 if (!memcmp(&devc->model->series->min_vdiv,
 408                                         &vdivs[i], sizeof(uint64_t[2]))) {
 409                         devc->vdivs = &vdivs[i];
 410                         devc->num_vdivs = NUM_VDIV - i;
 411                 }
 412         }
 413
 414         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
 415         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
 416
 417         devc->data_source = DATA_SOURCE_LIVE;
 418
 419         sdi->priv = devc;
 420
 421         return sdi;
 422 }
 423
 424 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 425 {
 426         return sr_scpi_scan(di->context, options, probe_device);
 427 }
 428
 429 static int dev_open(struct sr_dev_inst *sdi)
 430 {
 431         int ret;
 432         struct sr_scpi_dev_inst *scpi = sdi->conn;
 433
 434         if ((ret = sr_scpi_open(scpi)) < 0) {
 435                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
 436                 return SR_ERR;
 437         }
 438
 439         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
 440                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
 441                 return SR_ERR;
 442         }
 443
 444         sdi->status = SR_ST_ACTIVE;
 445
 446         return SR_OK;
 447 }
 448
 449 static int dev_close(struct sr_dev_inst *sdi)
 450 {
 451         struct sr_scpi_dev_inst *scpi;
 452         struct dev_context *devc;
 453
 454         if (sdi->status != SR_ST_ACTIVE)
 455                 return SR_ERR_DEV_CLOSED;
 456
 457         scpi = sdi->conn;
 458         devc = sdi->priv;
 459
 460         if (devc->model->series->protocol == PROTOCOL_V2)
 461                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
 462
 463         if (scpi) {
 464                 if (sr_scpi_close(scpi) < 0)
 465                         return SR_ERR;
 466                 sdi->status = SR_ST_INACTIVE;
 467         }
 468
 469         return SR_OK;
 470 }
 471
 472 static int analog_frame_size(const struct sr_dev_inst *sdi)
 473 {
 474         struct dev_context *devc = sdi->priv;
 475         struct sr_channel *ch;
 476         int analog_channels = 0;
 477         GSList *l;
 478
 479         for (l = sdi->channels; l; l = l->next) {
 480                 ch = l->data;
 481                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
 482                         analog_channels++;
 483         }
 484
 485         if (analog_channels == 0)
 486                 return 0;
 487
 488         switch (devc->data_source) {
 489         case DATA_SOURCE_LIVE:
 490                 return devc->model->series->live_samples;
 491         case DATA_SOURCE_MEMORY:
 492                 return devc->model->series->buffer_samples / analog_channels;
 493         default:
 494                 return 0;
 495         }
 496 }
 497
 498 static int digital_frame_size(const struct sr_dev_inst *sdi)
 499 {
 500         struct dev_context *devc = sdi->priv;
 501
 502         switch (devc->data_source) {
 503         case DATA_SOURCE_LIVE:
 504                 return devc->model->series->live_samples * 2;
 505         case DATA_SOURCE_MEMORY:
 506                 return devc->model->series->buffer_samples * 2;
 507         default:
 508                 return 0;
 509         }
 510 }
 511
 512 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 513                 const struct sr_channel_group *cg)
 514 {
 515         struct dev_context *devc;
 516         struct sr_channel *ch;
 517         const char *tmp_str;
 518         uint64_t samplerate;
 519         int analog_channel = -1;
 520         float smallest_diff = INFINITY;
 521         int idx = -1;
 522         unsigned i;
 523
 524         if (!sdi)
 525                 return SR_ERR_ARG;
 526
 527         devc = sdi->priv;
 528
 529         /* If a channel group is specified, it must be a valid one. */
 530         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 531                 sr_err("Invalid channel group specified.");
 532                 return SR_ERR;
 533         }
 534
 535         if (cg) {
 536                 ch = g_slist_nth_data(cg->channels, 0);
 537                 if (!ch)
 538                         return SR_ERR;
 539                 if (ch->type == SR_CHANNEL_ANALOG) {
 540                         if (ch->name[2] < '1' || ch->name[2] > '4')
 541                                 return SR_ERR;
 542                         analog_channel = ch->name[2] - '1';
 543                 }
 544         }
 545
 546         switch (key) {
 547         case SR_CONF_NUM_HDIV:
 548                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
 549                 break;
 550         case SR_CONF_NUM_VDIV:
 551                 *data = g_variant_new_int32(devc->num_vdivs);
 552                 break;
 553         case SR_CONF_DATA_SOURCE:
 554                 if (devc->data_source == DATA_SOURCE_LIVE)
 555                         *data = g_variant_new_string("Live");
 556                 else if (devc->data_source == DATA_SOURCE_MEMORY)
 557                         *data = g_variant_new_string("Memory");
 558                 else
 559                         *data = g_variant_new_string("Segmented");
 560                 break;
 561         case SR_CONF_SAMPLERATE:
 562                 if (devc->data_source == DATA_SOURCE_LIVE) {
 563                         samplerate = analog_frame_size(sdi) /
 564                                 (devc->timebase * devc->model->series->num_horizontal_divs);
 565                         *data = g_variant_new_uint64(samplerate);
 566                 } else {
 567                         sr_dbg("Unknown data source: %d.", devc->data_source);
 568                         return SR_ERR_NA;
 569                 }
 570                 break;
 571         case SR_CONF_TRIGGER_SOURCE:
 572                 if (!strcmp(devc->trigger_source, "ACL"))
 573                         tmp_str = "AC Line";
 574                 else if (!strcmp(devc->trigger_source, "CHAN1"))
 575                         tmp_str = "CH1";
 576                 else if (!strcmp(devc->trigger_source, "CHAN2"))
 577                         tmp_str = "CH2";
 578                 else if (!strcmp(devc->trigger_source, "CHAN3"))
 579                         tmp_str = "CH3";
 580                 else if (!strcmp(devc->trigger_source, "CHAN4"))
 581                         tmp_str = "CH4";
 582                 else
 583                         tmp_str = devc->trigger_source;
 584                 *data = g_variant_new_string(tmp_str);
 585                 break;
 586         case SR_CONF_TRIGGER_SLOPE:
 587                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
 588                         tmp_str = "r";
 589                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
 590                         tmp_str = "f";
 591                 } else {
 592                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
 593                         return SR_ERR_NA;
 594                 }
 595                 *data = g_variant_new_string(tmp_str);
 596                 break;
 597         case SR_CONF_TRIGGER_LEVEL:
 598                 *data = g_variant_new_double(devc->trigger_level);
 599                 break;
 600         case SR_CONF_TIMEBASE:
 601                 for (i = 0; i < devc->num_timebases; i++) {
 602                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
 603                         float diff = fabs(devc->timebase - tb);
 604                         if (diff < smallest_diff) {
 605                                 smallest_diff = diff;
 606                                 idx = i;
 607                         }
 608                 }
 609                 if (idx < 0) {
 610                         sr_dbg("Negative timebase index: %d.", idx);
 611                         return SR_ERR_NA;
 612                 }
 613                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
 614                                               devc->timebases[idx][1]);
 615                 break;
 616         case SR_CONF_VDIV:
 617                 if (analog_channel < 0) {
 618                         sr_dbg("Negative analog channel: %d.", analog_channel);
 619                         return SR_ERR_NA;
 620                 }
 621                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 622                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
 623                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
 624                         if (diff < smallest_diff) {
 625                                 smallest_diff = diff;
 626                                 idx = i;
 627                         }
 628                 }
 629                 if (idx < 0) {
 630                         sr_dbg("Negative vdiv index: %d.", idx);
 631                         return SR_ERR_NA;
 632                 }
 633                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
 634                 break;
 635         case SR_CONF_COUPLING:
 636                 if (analog_channel < 0) {
 637                         sr_dbg("Negative analog channel: %d.", analog_channel);
 638                         return SR_ERR_NA;
 639                 }
 640                 *data = g_variant_new_string(devc->coupling[analog_channel]);
 641                 break;
 642         case SR_CONF_PROBE_FACTOR:
 643                 if (analog_channel < 0) {
 644                         sr_dbg("Negative analog channel: %d.", analog_channel);
 645                         return SR_ERR_NA;
 646                 }
 647                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
 648                 break;
 649         default:
 650                 return SR_ERR_NA;
 651         }
 652
 653         return SR_OK;
 654 }
 655
 656 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
 657                 const struct sr_channel_group *cg)
 658 {
 659         struct dev_context *devc;
 660         uint64_t p, q;
 661         double t_dbl;
 662         unsigned int i, j;
 663         int ret;
 664         const char *tmp_str;
 665         char buffer[16];
 666
 667         devc = sdi->priv;
 668
 669         if (sdi->status != SR_ST_ACTIVE)
 670                 return SR_ERR_DEV_CLOSED;
 671
 672         /* If a channel group is specified, it must be a valid one. */
 673         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 674                 sr_err("Invalid channel group specified.");
 675                 return SR_ERR;
 676         }
 677
 678         ret = SR_OK;
 679         switch (key) {
 680         case SR_CONF_LIMIT_FRAMES:
 681                 devc->limit_frames = g_variant_get_uint64(data);
 682                 break;
 683         case SR_CONF_TRIGGER_SLOPE:
 684                 tmp_str = g_variant_get_string(data, NULL);
 685
 686                 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
 687                         sr_err("Unknown trigger slope: '%s'.",
 688                                (tmp_str) ? tmp_str : "NULL");
 689                         return SR_ERR_ARG;
 690                 }
 691
 692                 g_free(devc->trigger_slope);
 693                 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
 694                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
 695                 break;
 696         case SR_CONF_HORIZ_TRIGGERPOS:
 697                 t_dbl = g_variant_get_double(data);
 698                 if (t_dbl < 0.0 || t_dbl > 1.0) {
 699                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
 700                         return SR_ERR;
 701                 }
 702                 devc->horiz_triggerpos = t_dbl;
 703                 /* We have the trigger offset as a percentage of the frame, but
 704                  * need to express this in seconds. */
 705                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
 706                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
 707                 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
 708                 break;
 709         case SR_CONF_TRIGGER_LEVEL:
 710                 t_dbl = g_variant_get_double(data);
 711                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
 712                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
 713                 if (ret == SR_OK)
 714                         devc->trigger_level = t_dbl;
 715                 break;
 716         case SR_CONF_TIMEBASE:
 717                 g_variant_get(data, "(tt)", &p, &q);
 718                 for (i = 0; i < devc->num_timebases; i++) {
 719                         if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
 720                                 devc->timebase = (float)p / q;
 721                                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
 722                                                 devc->timebase);
 723                                 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
 724                                 break;
 725                         }
 726                 }
 727                 if (i == devc->num_timebases) {
 728                         sr_err("Invalid timebase index: %d.", i);
 729                         ret = SR_ERR_ARG;
 730                 }
 731                 break;
 732         case SR_CONF_TRIGGER_SOURCE:
 733                 tmp_str = g_variant_get_string(data, NULL);
 734                 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
 735                         if (!strcmp(trigger_sources[i], tmp_str)) {
 736                                 g_free(devc->trigger_source);
 737                                 devc->trigger_source = g_strdup(trigger_sources[i]);
 738                                 if (!strcmp(devc->trigger_source, "AC Line"))
 739                                         tmp_str = "ACL";
 740                                 else if (!strcmp(devc->trigger_source, "CH1"))
 741                                         tmp_str = "CHAN1";
 742                                 else if (!strcmp(devc->trigger_source, "CH2"))
 743                                         tmp_str = "CHAN2";
 744                                 else if (!strcmp(devc->trigger_source, "CH3"))
 745                                         tmp_str = "CHAN3";
 746                                 else if (!strcmp(devc->trigger_source, "CH4"))
 747                                         tmp_str = "CHAN4";
 748                                 else
 749                                         tmp_str = (char *)devc->trigger_source;
 750                                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
 751                                 break;
 752                         }
 753                 }
 754                 if (i == ARRAY_SIZE(trigger_sources)) {
 755                         sr_err("Invalid trigger source index: %d.", i);
 756                         ret = SR_ERR_ARG;
 757                 }
 758                 break;
 759         case SR_CONF_VDIV:
 760                 if (!cg) {
 761                         sr_err("No channel group specified.");
 762                         return SR_ERR_CHANNEL_GROUP;
 763                 }
 764                 g_variant_get(data, "(tt)", &p, &q);
 765                 for (i = 0; i < devc->model->analog_channels; i++) {
 766                         if (cg == devc->analog_groups[i]) {
 767                                 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
 768                                         if (vdivs[j][0] != p || vdivs[j][1] != q)
 769                                                 continue;
 770                                         devc->vdiv[i] = (float)p / q;
 771                                         g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
 772                                                         devc->vdiv[i]);
 773                                         return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
 774                                                         buffer);
 775                                 }
 776                                 sr_err("Invalid vdiv index: %d.", j);
 777                                 return SR_ERR_ARG;
 778                         }
 779                 }
 780                 sr_dbg("Didn't set vdiv, unknown channel(group).");
 781                 return SR_ERR_NA;
 782         case SR_CONF_COUPLING:
 783                 if (!cg) {
 784                         sr_err("No channel group specified.");
 785                         return SR_ERR_CHANNEL_GROUP;
 786                 }
 787                 tmp_str = g_variant_get_string(data, NULL);
 788                 for (i = 0; i < devc->model->analog_channels; i++) {
 789                         if (cg == devc->analog_groups[i]) {
 790                                 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
 791                                         if (!strcmp(tmp_str, coupling[j])) {
 792                                                 g_free(devc->coupling[i]);
 793                                                 devc->coupling[i] = g_strdup(coupling[j]);
 794                                                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
 795                                                                 devc->coupling[i]);
 796                                         }
 797                                 }
 798                                 sr_err("Invalid coupling index: %d.", j);
 799                                 return SR_ERR_ARG;
 800                         }
 801                 }
 802                 sr_dbg("Didn't set coupling, unknown channel(group).");
 803                 return SR_ERR_NA;
 804         case SR_CONF_PROBE_FACTOR:
 805                 if (!cg) {
 806                         sr_err("No channel group specified.");
 807                         return SR_ERR_CHANNEL_GROUP;
 808                 }
 809                 p = g_variant_get_uint64(data);
 810                 for (i = 0; i < devc->model->analog_channels; i++) {
 811                         if (cg == devc->analog_groups[i]) {
 812                                 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
 813                                         if (p == probe_factor[j]) {
 814                                                 devc->attenuation[i] = p;
 815                                                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
 816                                                                           i + 1, p);
 817                                                 if (ret == SR_OK)
 818                                                         rigol_ds_get_dev_cfg_vertical(sdi);
 819                                                 return ret;
 820                                         }
 821                                 }
 822                                 sr_err("Invalid probe factor: %"PRIu64".", p);
 823                                 return SR_ERR_ARG;
 824                         }
 825                 }
 826                 sr_dbg("Didn't set probe factor, unknown channel(group).");
 827                 return SR_ERR_NA;
 828         case SR_CONF_DATA_SOURCE:
 829                 tmp_str = g_variant_get_string(data, NULL);
 830                 if (!strcmp(tmp_str, "Live"))
 831                         devc->data_source = DATA_SOURCE_LIVE;
 832                 else if (devc->model->series->protocol >= PROTOCOL_V2
 833                         && !strcmp(tmp_str, "Memory"))
 834                         devc->data_source = DATA_SOURCE_MEMORY;
 835                 else if (devc->model->series->protocol >= PROTOCOL_V3
 836                          && !strcmp(tmp_str, "Segmented"))
 837                         devc->data_source = DATA_SOURCE_SEGMENTED;
 838                 else {
 839                         sr_err("Unknown data source: '%s'.", tmp_str);
 840                         return SR_ERR;
 841                 }
 842                 break;
 843         default:
 844                 return SR_ERR_NA;
 845         }
 846
 847         return ret;
 848 }
 849
 850 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 851                 const struct sr_channel_group *cg)
 852 {
 853         GVariant *tuple, *rational[2];
 854         GVariantBuilder gvb;
 855         unsigned int i;
 856         struct dev_context *devc = NULL;
 857
 858         /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or channel group. */
 859         if (key == SR_CONF_SCAN_OPTIONS) {
 860                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 861                                 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
 862                 return SR_OK;
 863         }
 864
 865         /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
 866         if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
 867                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 868                                 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
 869                 return SR_OK;
 870         }
 871
 872         /* Every other option requires a valid device instance. */
 873         if (!sdi)
 874                 return SR_ERR_ARG;
 875         devc = sdi->priv;
 876
 877         /* If a channel group is specified, it must be a valid one. */
 878         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 879                 sr_err("Invalid channel group specified.");
 880                 return SR_ERR;
 881         }
 882
 883         switch (key) {
 884         case SR_CONF_DEVICE_OPTIONS:
 885                 if (!cg) {
 886                         /* If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
 887                          * specific to a channel group must be returned. */
 888                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 889                                         devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
 890                         return SR_OK;
 891                 }
 892                 if (cg == devc->digital_group) {
 893                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 894                                 NULL, 0, sizeof(uint32_t));
 895                         return SR_OK;
 896                 } else {
 897                         for (i = 0; i < devc->model->analog_channels; i++) {
 898                                 if (cg == devc->analog_groups[i]) {
 899                                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 900                                                 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
 901                                         return SR_OK;
 902                                 }
 903                         }
 904                         return SR_ERR_NA;
 905                 }
 906                 break;
 907         case SR_CONF_COUPLING:
 908                 if (!cg) {
 909                         sr_err("No channel group specified.");
 910                         return SR_ERR_CHANNEL_GROUP;
 911                 }
 912                 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
 913                 break;
 914         case SR_CONF_PROBE_FACTOR:
 915                 if (!cg) {
 916                         sr_err("No channel group specified.");
 917                         return SR_ERR_CHANNEL_GROUP;
 918                 }
 919                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
 920                         probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
 921                 break;
 922         case SR_CONF_VDIV:
 923                 if (!devc)
 924                         /* Can't know this until we have the exact model. */
 925                         return SR_ERR_ARG;
 926                 if (!cg) {
 927                         sr_err("No channel group specified.");
 928                         return SR_ERR_CHANNEL_GROUP;
 929                 }
 930                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
 931                 for (i = 0; i < devc->num_vdivs; i++) {
 932                         rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
 933                         rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
 934                         tuple = g_variant_new_tuple(rational, 2);
 935                         g_variant_builder_add_value(&gvb, tuple);
 936                 }
 937                 *data = g_variant_builder_end(&gvb);
 938                 break;
 939         case SR_CONF_TIMEBASE:
 940                 if (!devc)
 941                         /* Can't know this until we have the exact model. */
 942                         return SR_ERR_ARG;
 943                 if (devc->num_timebases <= 0)
 944                         return SR_ERR_NA;
 945                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
 946                 for (i = 0; i < devc->num_timebases; i++) {
 947                         rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
 948                         rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
 949                         tuple = g_variant_new_tuple(rational, 2);
 950                         g_variant_builder_add_value(&gvb, tuple);
 951                 }
 952                 *data = g_variant_builder_end(&gvb);
 953                 break;
 954         case SR_CONF_TRIGGER_SOURCE:
 955                 if (!devc)
 956                         /* Can't know this until we have the exact model. */
 957                         return SR_ERR_ARG;
 958                 *data = g_variant_new_strv(trigger_sources,
 959                                 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
 960                 break;
 961         case SR_CONF_TRIGGER_SLOPE:
 962                 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
 963                 break;
 964         case SR_CONF_DATA_SOURCE:
 965                 if (!devc)
 966                         /* Can't know this until we have the exact model. */
 967                         return SR_ERR_ARG;
 968                 switch (devc->model->series->protocol) {
 969                 case PROTOCOL_V1:
 970                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
 971                         break;
 972                 case PROTOCOL_V2:
 973                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
 974                         break;
 975                 default:
 976                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
 977                         break;
 978                 }
 979                 break;
 980         default:
 981                 return SR_ERR_NA;
 982         }
 983
 984         return SR_OK;
 985 }
 986
 987 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 988 {
 989         struct sr_scpi_dev_inst *scpi;
 990         struct dev_context *devc;
 991         struct sr_channel *ch;
 992         struct sr_datafeed_packet packet;
 993         gboolean some_digital;
 994         GSList *l;
 995
 996         if (sdi->status != SR_ST_ACTIVE)
 997                 return SR_ERR_DEV_CLOSED;
 998
 999         scpi = sdi->conn;
1000         devc = sdi->priv;
1001
1002         devc->num_frames = 0;
1003
1004         some_digital = FALSE;
1005         for (l = sdi->channels; l; l = l->next) {
1006                 ch = l->data;
1007                 sr_dbg("handling channel %s", ch->name);
1008                 if (ch->type == SR_CHANNEL_ANALOG) {
1009                         if (ch->enabled)
1010                                 devc->enabled_channels = g_slist_append(
1011                                                 devc->enabled_channels, ch);
1012                         if (ch->enabled != devc->analog_channels[ch->index]) {
1013                                 /* Enabled channel is currently disabled, or vice versa. */
1014                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
1015                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
1016                                         return SR_ERR;
1017                                 devc->analog_channels[ch->index] = ch->enabled;
1018                         }
1019                 } else if (ch->type == SR_CHANNEL_LOGIC) {
1020                         /* Only one list entry for DS1000D series. All channels are retrieved
1021                          * together when this entry is processed. */
1022                         if (ch->enabled && (
1023                                                 devc->model->series->protocol > PROTOCOL_V2 ||
1024                                                 !some_digital))
1025                                 devc->enabled_channels = g_slist_append(
1026                                                 devc->enabled_channels, ch);
1027                         if (ch->enabled) {
1028                                 some_digital = TRUE;
1029                                 /* Turn on LA module if currently off. */
1030                                 if (!devc->la_enabled) {
1031                                         if (rigol_ds_config_set(sdi,
1032                                                         devc->model->series->protocol >= PROTOCOL_V4 ?
1033                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
1034                                                 return SR_ERR;
1035                                         devc->la_enabled = TRUE;
1036                                 }
1037                         }
1038                         if (ch->enabled != devc->digital_channels[ch->index]) {
1039                                 /* Enabled channel is currently disabled, or vice versa. */
1040                                 if (rigol_ds_config_set(sdi,
1041                                                 devc->model->series->protocol >= PROTOCOL_V4 ?
1042                                                         ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
1043                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
1044                                         return SR_ERR;
1045                                 devc->digital_channels[ch->index] = ch->enabled;
1046                         }
1047                 }
1048         }
1049
1050         if (!devc->enabled_channels)
1051                 return SR_ERR;
1052
1053         /* Turn off LA module if on and no digital channels selected. */
1054         if (devc->la_enabled && !some_digital)
1055                 if (rigol_ds_config_set(sdi,
1056                                 devc->model->series->protocol >= PROTOCOL_V4 ?
1057                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1058                         return SR_ERR;
1059
1060         /* Set memory mode. */
1061         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1062                 sr_err("Data source 'Segmented' not yet supported");
1063                 return SR_ERR;
1064         }
1065
1066         devc->analog_frame_size = analog_frame_size(sdi);
1067         devc->digital_frame_size = digital_frame_size(sdi);
1068
1069         switch (devc->model->series->protocol) {
1070         case PROTOCOL_V2:
1071                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1072                         return SR_ERR;
1073                 break;
1074         case PROTOCOL_V3:
1075                 /* Apparently for the DS2000 the memory
1076                  * depth can only be set in Running state -
1077                  * this matches the behaviour of the UI. */
1078                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1079                         return SR_ERR;
1080                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1081                                         devc->analog_frame_size) != SR_OK)
1082                         return SR_ERR;
1083                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1084                         return SR_ERR;
1085                 break;
1086         default:
1087                 break;
1088         }
1089
1090         if (devc->data_source == DATA_SOURCE_LIVE)
1091                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1092                         return SR_ERR;
1093
1094         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1095                         rigol_ds_receive, (void *)sdi);
1096
1097         std_session_send_df_header(sdi);
1098
1099         devc->channel_entry = devc->enabled_channels;
1100
1101         if (rigol_ds_capture_start(sdi) != SR_OK)
1102                 return SR_ERR;
1103
1104         /* Start of first frame. */
1105         packet.type = SR_DF_FRAME_BEGIN;
1106         sr_session_send(sdi, &packet);
1107
1108         return SR_OK;
1109 }
1110
1111 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1112 {
1113         struct dev_context *devc;
1114         struct sr_scpi_dev_inst *scpi;
1115
1116         devc = sdi->priv;
1117
1118         if (sdi->status != SR_ST_ACTIVE) {
1119                 sr_err("Device inactive, can't stop acquisition.");
1120                 return SR_ERR;
1121         }
1122
1123         std_session_send_df_end(sdi);
1124
1125         g_slist_free(devc->enabled_channels);
1126         devc->enabled_channels = NULL;
1127         scpi = sdi->conn;
1128         sr_scpi_source_remove(sdi->session, scpi);
1129
1130         return SR_OK;
1131 }
1132
1133 static struct sr_dev_driver rigol_ds_driver_info = {
1134         .name = "rigol-ds",
1135         .longname = "Rigol DS",
1136         .api_version = 1,
1137         .init = std_init,
1138         .cleanup = std_cleanup,
1139         .scan = scan,
1140         .dev_list = std_dev_list,
1141         .dev_clear = dev_clear,
1142         .config_get = config_get,
1143         .config_set = config_set,
1144         .config_list = config_list,
1145         .dev_open = dev_open,
1146         .dev_close = dev_close,
1147         .dev_acquisition_start = dev_acquisition_start,
1148         .dev_acquisition_stop = dev_acquisition_stop,
1149         .context = NULL,
1150 };
1151 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);