src/hardware/rigol-ds/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <config.h>
  23 #include <fcntl.h>
  24 #include <unistd.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27 #include <strings.h>
  28 #include <math.h>
  29 #include <glib.h>
  30 #include <libsigrok/libsigrok.h>
  31 #include "libsigrok-internal.h"
  32 #include "scpi.h"
  33 #include "protocol.h"
  34
  35 static const uint32_t scanopts[] = {
  36         SR_CONF_CONN,
  37         SR_CONF_SERIALCOMM,
  38 };
  39
  40 static const uint32_t drvopts[] = {
  41         SR_CONF_OSCILLOSCOPE,
  42 };
  43
  44 static const uint32_t devopts[] = {
  45         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
  46         SR_CONF_SAMPLERATE | SR_CONF_GET,
  47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  48         SR_CONF_NUM_HDIV | SR_CONF_GET,
  49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
  50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
  53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  54 };
  55
  56 static const uint32_t devopts_cg_analog[] = {
  57         SR_CONF_NUM_VDIV | SR_CONF_GET,
  58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  61 };
  62
  63 static const uint64_t timebases[][2] = {
  64         /* nanoseconds */
  65         { 1, 1000000000 },
  66         { 2, 1000000000 },
  67         { 5, 1000000000 },
  68         { 10, 1000000000 },
  69         { 20, 1000000000 },
  70         { 50, 1000000000 },
  71         { 100, 1000000000 },
  72         { 500, 1000000000 },
  73         /* microseconds */
  74         { 1, 1000000 },
  75         { 2, 1000000 },
  76         { 5, 1000000 },
  77         { 10, 1000000 },
  78         { 20, 1000000 },
  79         { 50, 1000000 },
  80         { 100, 1000000 },
  81         { 200, 1000000 },
  82         { 500, 1000000 },
  83         /* milliseconds */
  84         { 1, 1000 },
  85         { 2, 1000 },
  86         { 5, 1000 },
  87         { 10, 1000 },
  88         { 20, 1000 },
  89         { 50, 1000 },
  90         { 100, 1000 },
  91         { 200, 1000 },
  92         { 500, 1000 },
  93         /* seconds */
  94         { 1, 1 },
  95         { 2, 1 },
  96         { 5, 1 },
  97         { 10, 1 },
  98         { 20, 1 },
  99         { 50, 1 },
 100         { 100, 1 },
 101         { 200, 1 },
 102         { 500, 1 },
 103         { 1000, 1 },
 104 };
 105
 106 static const uint64_t vdivs[][2] = {
 107         /* microvolts */
 108         { 500, 1000000 },
 109         /* millivolts */
 110         { 1, 1000 },
 111         { 2, 1000 },
 112         { 5, 1000 },
 113         { 10, 1000 },
 114         { 20, 1000 },
 115         { 50, 1000 },
 116         { 100, 1000 },
 117         { 200, 1000 },
 118         { 500, 1000 },
 119         /* volts */
 120         { 1, 1 },
 121         { 2, 1 },
 122         { 5, 1 },
 123         { 10, 1 },
 124         { 20, 1 },
 125         { 50, 1 },
 126         { 100, 1 },
 127 };
 128
 129 static const char *trigger_sources[] = {
 130         "CH1", "CH2", "CH3", "CH4",
 131         "EXT", "AC Line",
 132         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 133         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
 134 };
 135
 136 static const char *trigger_slopes[] = {
 137         "r", "f",
 138 };
 139
 140 static const char *coupling[] = {
 141         "AC", "DC", "GND",
 142 };
 143
 144 static const uint64_t probe_factor[] = {
 145         1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
 146 };
 147
 148 /* Do not change the order of entries */
 149 static const char *data_sources[] = {
 150         "Live",
 151         "Memory",
 152         "Segmented",
 153 };
 154
 155 enum vendor {
 156         RIGOL,
 157         AGILENT,
 158 };
 159
 160 enum series {
 161         VS5000,
 162         DS1000,
 163         DS2000,
 164         DS2000A,
 165         DSO1000,
 166         DS1000Z,
 167 };
 168
 169 /* short name, full name */
 170 static const struct rigol_ds_vendor supported_vendors[] = {
 171         [RIGOL] = {"Rigol", "Rigol Technologies"},
 172         [AGILENT] = {"Agilent", "Agilent Technologies"},
 173 };
 174
 175 #define VENDOR(x) &supported_vendors[x]
 176 /* vendor, series/name, protocol, data format, max timebase, min vdiv,
 177  * number of horizontal divs, live waveform samples, memory buffer samples */
 178 static const struct rigol_ds_series supported_series[] = {
 179         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
 180                 {50, 1}, {2, 1000}, 14, 2048, 0},
 181         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
 182                 {50, 1}, {2, 1000}, 12, 600, 1048576},
 183         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
 184                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
 185         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
 186                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
 187         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 188                 {50, 1}, {2, 1000}, 12, 600, 20480},
 189         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
 190                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
 191 };
 192
 193 #define SERIES(x) &supported_series[x]
 194 /* series, model, min timebase, analog channels, digital */
 195 static const struct rigol_ds_model supported_models[] = {
 196         {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
 197         {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
 198         {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
 199         {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
 200         {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
 201         {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
 202         {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
 203         {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
 204         {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
 205         {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
 206         {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
 207         {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
 208         {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
 209         {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
 210         {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
 211         {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
 212         {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
 213         {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
 214         {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
 215         {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
 216         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
 217         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
 218         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
 219         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
 220         {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
 221         {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
 222         {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
 223         {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
 224         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
 225         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
 226         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
 227         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
 228         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
 229         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
 230         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
 231         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
 232         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
 233         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
 234         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
 235         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
 236         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
 237         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
 238         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
 239         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
 240         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
 241 };
 242
 243 static struct sr_dev_driver rigol_ds_driver_info;
 244
 245 static void clear_helper(struct dev_context *devc)
 246 {
 247         unsigned int i;
 248
 249         g_free(devc->data);
 250         g_free(devc->buffer);
 251         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
 252                 g_free(devc->coupling[i]);
 253         g_free(devc->trigger_source);
 254         g_free(devc->trigger_slope);
 255         g_free(devc->analog_groups);
 256 }
 257
 258 static int dev_clear(const struct sr_dev_driver *di)
 259 {
 260         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
 261 }
 262
 263 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
 264 {
 265         struct dev_context *devc;
 266         struct sr_dev_inst *sdi;
 267         struct sr_scpi_hw_info *hw_info;
 268         struct sr_channel *ch;
 269         long n[3];
 270         unsigned int i;
 271         const struct rigol_ds_model *model = NULL;
 272         gchar *channel_name, **version;
 273
 274         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 275                 sr_info("Couldn't get IDN response, retrying.");
 276                 sr_scpi_close(scpi);
 277                 sr_scpi_open(scpi);
 278                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 279                         sr_info("Couldn't get IDN response.");
 280                         return NULL;
 281                 }
 282         }
 283
 284         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
 285                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
 286                                         supported_models[i].series->vendor->full_name) &&
 287                                 !strcmp(hw_info->model, supported_models[i].name)) {
 288                         model = &supported_models[i];
 289                         break;
 290                 }
 291         }
 292
 293         if (!model) {
 294                 sr_scpi_hw_info_free(hw_info);
 295                 return NULL;
 296         }
 297
 298         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 299         sdi->vendor = g_strdup(model->series->vendor->name);
 300         sdi->model = g_strdup(model->name);
 301         sdi->version = g_strdup(hw_info->firmware_version);
 302         sdi->conn = scpi;
 303         sdi->driver = &rigol_ds_driver_info;
 304         sdi->inst_type = SR_INST_SCPI;
 305         sdi->serial_num = g_strdup(hw_info->serial_number);
 306         devc = g_malloc0(sizeof(struct dev_context));
 307         devc->limit_frames = 0;
 308         devc->model = model;
 309         devc->format = model->series->format;
 310
 311         /* DS1000 models with firmware before 0.2.4 used the old data format. */
 312         if (model->series == SERIES(DS1000)) {
 313                 version = g_strsplit(hw_info->firmware_version, ".", 0);
 314                 do {
 315                         if (!version[0] || !version[1] || !version[2])
 316                                 break;
 317                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
 318                                 break;
 319                         for (i = 0; i < 3; i++) {
 320                                 if (sr_atol(version[i], &n[i]) != SR_OK)
 321                                         break;
 322                         }
 323                         if (i != 3)
 324                                 break;
 325                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
 326                         if (scpi->firmware_version < 24) {
 327                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
 328                                 devc->format = FORMAT_RAW;
 329                         }
 330                         break;
 331                 } while (0);
 332                 g_strfreev(version);
 333         }
 334
 335         sr_scpi_hw_info_free(hw_info);
 336
 337         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
 338                                         model->analog_channels);
 339
 340         for (i = 0; i < model->analog_channels; i++) {
 341                 channel_name = g_strdup_printf("CH%d", i + 1);
 342                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
 343
 344                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
 345
 346                 devc->analog_groups[i]->name = channel_name;
 347                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
 348                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 349                                 devc->analog_groups[i]);
 350         }
 351
 352         if (devc->model->has_digital) {
 353                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
 354
 355                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 356                         channel_name = g_strdup_printf("D%d", i);
 357                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
 358                         g_free(channel_name);
 359                         devc->digital_group->channels = g_slist_append(
 360                                         devc->digital_group->channels, ch);
 361                 }
 362                 devc->digital_group->name = g_strdup("LA");
 363                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 364                                 devc->digital_group);
 365         }
 366
 367         for (i = 0; i < ARRAY_SIZE(timebases); i++) {
 368                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
 369                         devc->timebases = &timebases[i];
 370                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
 371                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
 372         }
 373
 374         for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 375                 if (!memcmp(&devc->model->series->min_vdiv,
 376                                         &vdivs[i], sizeof(uint64_t[2]))) {
 377                         devc->vdivs = &vdivs[i];
 378                         devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
 379                 }
 380         }
 381
 382         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
 383         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
 384
 385         devc->data_source = DATA_SOURCE_LIVE;
 386
 387         sdi->priv = devc;
 388
 389         return sdi;
 390 }
 391
 392 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 393 {
 394         return sr_scpi_scan(di->context, options, probe_device);
 395 }
 396
 397 static int dev_open(struct sr_dev_inst *sdi)
 398 {
 399         int ret;
 400         struct sr_scpi_dev_inst *scpi = sdi->conn;
 401
 402         if ((ret = sr_scpi_open(scpi)) < 0) {
 403                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
 404                 return SR_ERR;
 405         }
 406
 407         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
 408                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
 409                 return SR_ERR;
 410         }
 411
 412         return SR_OK;
 413 }
 414
 415 static int dev_close(struct sr_dev_inst *sdi)
 416 {
 417         struct sr_scpi_dev_inst *scpi;
 418         struct dev_context *devc;
 419
 420         scpi = sdi->conn;
 421         devc = sdi->priv;
 422
 423         if (!scpi)
 424                 return SR_ERR_BUG;
 425
 426         if (devc->model->series->protocol == PROTOCOL_V2)
 427                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
 428
 429         return sr_scpi_close(scpi);
 430 }
 431
 432 static int analog_frame_size(const struct sr_dev_inst *sdi)
 433 {
 434         struct dev_context *devc = sdi->priv;
 435         struct sr_channel *ch;
 436         int analog_channels = 0;
 437         GSList *l;
 438
 439         for (l = sdi->channels; l; l = l->next) {
 440                 ch = l->data;
 441                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
 442                         analog_channels++;
 443         }
 444
 445         if (analog_channels == 0)
 446                 return 0;
 447
 448         switch (devc->data_source) {
 449         case DATA_SOURCE_LIVE:
 450                 return devc->model->series->live_samples;
 451         case DATA_SOURCE_MEMORY:
 452                 return devc->model->series->buffer_samples / analog_channels;
 453         default:
 454                 return 0;
 455         }
 456 }
 457
 458 static int digital_frame_size(const struct sr_dev_inst *sdi)
 459 {
 460         struct dev_context *devc = sdi->priv;
 461
 462         switch (devc->data_source) {
 463         case DATA_SOURCE_LIVE:
 464                 return devc->model->series->live_samples * 2;
 465         case DATA_SOURCE_MEMORY:
 466                 return devc->model->series->buffer_samples * 2;
 467         default:
 468                 return 0;
 469         }
 470 }
 471
 472 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 473                 const struct sr_channel_group *cg)
 474 {
 475         struct dev_context *devc;
 476         struct sr_channel *ch;
 477         const char *tmp_str;
 478         uint64_t samplerate;
 479         int analog_channel = -1;
 480         float smallest_diff = INFINITY;
 481         int idx = -1;
 482         unsigned i;
 483
 484         if (!sdi)
 485                 return SR_ERR_ARG;
 486
 487         devc = sdi->priv;
 488
 489         /* If a channel group is specified, it must be a valid one. */
 490         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 491                 sr_err("Invalid channel group specified.");
 492                 return SR_ERR;
 493         }
 494
 495         if (cg) {
 496                 ch = g_slist_nth_data(cg->channels, 0);
 497                 if (!ch)
 498                         return SR_ERR;
 499                 if (ch->type == SR_CHANNEL_ANALOG) {
 500                         if (ch->name[2] < '1' || ch->name[2] > '4')
 501                                 return SR_ERR;
 502                         analog_channel = ch->name[2] - '1';
 503                 }
 504         }
 505
 506         switch (key) {
 507         case SR_CONF_NUM_HDIV:
 508                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
 509                 break;
 510         case SR_CONF_NUM_VDIV:
 511                 *data = g_variant_new_int32(devc->num_vdivs);
 512                 break;
 513         case SR_CONF_DATA_SOURCE:
 514                 if (devc->data_source == DATA_SOURCE_LIVE)
 515                         *data = g_variant_new_string("Live");
 516                 else if (devc->data_source == DATA_SOURCE_MEMORY)
 517                         *data = g_variant_new_string("Memory");
 518                 else
 519                         *data = g_variant_new_string("Segmented");
 520                 break;
 521         case SR_CONF_SAMPLERATE:
 522                 if (devc->data_source == DATA_SOURCE_LIVE) {
 523                         samplerate = analog_frame_size(sdi) /
 524                                 (devc->timebase * devc->model->series->num_horizontal_divs);
 525                         *data = g_variant_new_uint64(samplerate);
 526                 } else {
 527                         sr_dbg("Unknown data source: %d.", devc->data_source);
 528                         return SR_ERR_NA;
 529                 }
 530                 break;
 531         case SR_CONF_TRIGGER_SOURCE:
 532                 if (!strcmp(devc->trigger_source, "ACL"))
 533                         tmp_str = "AC Line";
 534                 else if (!strcmp(devc->trigger_source, "CHAN1"))
 535                         tmp_str = "CH1";
 536                 else if (!strcmp(devc->trigger_source, "CHAN2"))
 537                         tmp_str = "CH2";
 538                 else if (!strcmp(devc->trigger_source, "CHAN3"))
 539                         tmp_str = "CH3";
 540                 else if (!strcmp(devc->trigger_source, "CHAN4"))
 541                         tmp_str = "CH4";
 542                 else
 543                         tmp_str = devc->trigger_source;
 544                 *data = g_variant_new_string(tmp_str);
 545                 break;
 546         case SR_CONF_TRIGGER_SLOPE:
 547                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
 548                         tmp_str = "r";
 549                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
 550                         tmp_str = "f";
 551                 } else {
 552                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
 553                         return SR_ERR_NA;
 554                 }
 555                 *data = g_variant_new_string(tmp_str);
 556                 break;
 557         case SR_CONF_TRIGGER_LEVEL:
 558                 *data = g_variant_new_double(devc->trigger_level);
 559                 break;
 560         case SR_CONF_TIMEBASE:
 561                 for (i = 0; i < devc->num_timebases; i++) {
 562                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
 563                         float diff = fabs(devc->timebase - tb);
 564                         if (diff < smallest_diff) {
 565                                 smallest_diff = diff;
 566                                 idx = i;
 567                         }
 568                 }
 569                 if (idx < 0) {
 570                         sr_dbg("Negative timebase index: %d.", idx);
 571                         return SR_ERR_NA;
 572                 }
 573                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
 574                                               devc->timebases[idx][1]);
 575                 break;
 576         case SR_CONF_VDIV:
 577                 if (analog_channel < 0) {
 578                         sr_dbg("Negative analog channel: %d.", analog_channel);
 579                         return SR_ERR_NA;
 580                 }
 581                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 582                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
 583                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
 584                         if (diff < smallest_diff) {
 585                                 smallest_diff = diff;
 586                                 idx = i;
 587                         }
 588                 }
 589                 if (idx < 0) {
 590                         sr_dbg("Negative vdiv index: %d.", idx);
 591                         return SR_ERR_NA;
 592                 }
 593                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
 594                 break;
 595         case SR_CONF_COUPLING:
 596                 if (analog_channel < 0) {
 597                         sr_dbg("Negative analog channel: %d.", analog_channel);
 598                         return SR_ERR_NA;
 599                 }
 600                 *data = g_variant_new_string(devc->coupling[analog_channel]);
 601                 break;
 602         case SR_CONF_PROBE_FACTOR:
 603                 if (analog_channel < 0) {
 604                         sr_dbg("Negative analog channel: %d.", analog_channel);
 605                         return SR_ERR_NA;
 606                 }
 607                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
 608                 break;
 609         default:
 610                 return SR_ERR_NA;
 611         }
 612
 613         return SR_OK;
 614 }
 615
 616 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
 617                 const struct sr_channel_group *cg)
 618 {
 619         struct dev_context *devc;
 620         uint64_t p, q;
 621         double t_dbl;
 622         unsigned int i, j;
 623         int ret;
 624         const char *tmp_str;
 625         char buffer[16];
 626
 627         devc = sdi->priv;
 628
 629         /* If a channel group is specified, it must be a valid one. */
 630         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 631                 sr_err("Invalid channel group specified.");
 632                 return SR_ERR;
 633         }
 634
 635         ret = SR_OK;
 636         switch (key) {
 637         case SR_CONF_LIMIT_FRAMES:
 638                 devc->limit_frames = g_variant_get_uint64(data);
 639                 break;
 640         case SR_CONF_TRIGGER_SLOPE:
 641                 tmp_str = g_variant_get_string(data, NULL);
 642
 643                 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
 644                         sr_err("Unknown trigger slope: '%s'.",
 645                                (tmp_str) ? tmp_str : "NULL");
 646                         return SR_ERR_ARG;
 647                 }
 648
 649                 g_free(devc->trigger_slope);
 650                 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
 651                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
 652                 break;
 653         case SR_CONF_HORIZ_TRIGGERPOS:
 654                 t_dbl = g_variant_get_double(data);
 655                 if (t_dbl < 0.0 || t_dbl > 1.0) {
 656                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
 657                         return SR_ERR;
 658                 }
 659                 devc->horiz_triggerpos = t_dbl;
 660                 /* We have the trigger offset as a percentage of the frame, but
 661                  * need to express this in seconds. */
 662                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
 663                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
 664                 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
 665                 break;
 666         case SR_CONF_TRIGGER_LEVEL:
 667                 t_dbl = g_variant_get_double(data);
 668                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
 669                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
 670                 if (ret == SR_OK)
 671                         devc->trigger_level = t_dbl;
 672                 break;
 673         case SR_CONF_TIMEBASE:
 674                 g_variant_get(data, "(tt)", &p, &q);
 675                 for (i = 0; i < devc->num_timebases; i++) {
 676                         if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
 677                                 devc->timebase = (float)p / q;
 678                                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
 679                                                 devc->timebase);
 680                                 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
 681                                 break;
 682                         }
 683                 }
 684                 if (i == devc->num_timebases) {
 685                         sr_err("Invalid timebase index: %d.", i);
 686                         ret = SR_ERR_ARG;
 687                 }
 688                 break;
 689         case SR_CONF_TRIGGER_SOURCE:
 690                 tmp_str = g_variant_get_string(data, NULL);
 691                 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
 692                         if (!strcmp(trigger_sources[i], tmp_str)) {
 693                                 g_free(devc->trigger_source);
 694                                 devc->trigger_source = g_strdup(trigger_sources[i]);
 695                                 if (!strcmp(devc->trigger_source, "AC Line"))
 696                                         tmp_str = "ACL";
 697                                 else if (!strcmp(devc->trigger_source, "CH1"))
 698                                         tmp_str = "CHAN1";
 699                                 else if (!strcmp(devc->trigger_source, "CH2"))
 700                                         tmp_str = "CHAN2";
 701                                 else if (!strcmp(devc->trigger_source, "CH3"))
 702                                         tmp_str = "CHAN3";
 703                                 else if (!strcmp(devc->trigger_source, "CH4"))
 704                                         tmp_str = "CHAN4";
 705                                 else
 706                                         tmp_str = (char *)devc->trigger_source;
 707                                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
 708                                 break;
 709                         }
 710                 }
 711                 if (i == ARRAY_SIZE(trigger_sources)) {
 712                         sr_err("Invalid trigger source index: %d.", i);
 713                         ret = SR_ERR_ARG;
 714                 }
 715                 break;
 716         case SR_CONF_VDIV:
 717                 if (!cg)
 718                         return SR_ERR_CHANNEL_GROUP;
 719                 g_variant_get(data, "(tt)", &p, &q);
 720                 for (i = 0; i < devc->model->analog_channels; i++) {
 721                         if (cg == devc->analog_groups[i]) {
 722                                 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
 723                                         if (vdivs[j][0] != p || vdivs[j][1] != q)
 724                                                 continue;
 725                                         devc->vdiv[i] = (float)p / q;
 726                                         g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
 727                                                         devc->vdiv[i]);
 728                                         return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
 729                                                         buffer);
 730                                 }
 731                                 sr_err("Invalid vdiv index: %d.", j);
 732                                 return SR_ERR_ARG;
 733                         }
 734                 }
 735                 sr_dbg("Didn't set vdiv, unknown channel(group).");
 736                 return SR_ERR_NA;
 737         case SR_CONF_COUPLING:
 738                 if (!cg)
 739                         return SR_ERR_CHANNEL_GROUP;
 740                 tmp_str = g_variant_get_string(data, NULL);
 741                 for (i = 0; i < devc->model->analog_channels; i++) {
 742                         if (cg == devc->analog_groups[i]) {
 743                                 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
 744                                         if (!strcmp(tmp_str, coupling[j])) {
 745                                                 g_free(devc->coupling[i]);
 746                                                 devc->coupling[i] = g_strdup(coupling[j]);
 747                                                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
 748                                                                 devc->coupling[i]);
 749                                         }
 750                                 }
 751                                 sr_err("Invalid coupling index: %d.", j);
 752                                 return SR_ERR_ARG;
 753                         }
 754                 }
 755                 sr_dbg("Didn't set coupling, unknown channel(group).");
 756                 return SR_ERR_NA;
 757         case SR_CONF_PROBE_FACTOR:
 758                 if (!cg)
 759                         return SR_ERR_CHANNEL_GROUP;
 760                 p = g_variant_get_uint64(data);
 761                 for (i = 0; i < devc->model->analog_channels; i++) {
 762                         if (cg == devc->analog_groups[i]) {
 763                                 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
 764                                         if (p == probe_factor[j]) {
 765                                                 devc->attenuation[i] = p;
 766                                                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
 767                                                                           i + 1, p);
 768                                                 if (ret == SR_OK)
 769                                                         rigol_ds_get_dev_cfg_vertical(sdi);
 770                                                 return ret;
 771                                         }
 772                                 }
 773                                 sr_err("Invalid probe factor: %"PRIu64".", p);
 774                                 return SR_ERR_ARG;
 775                         }
 776                 }
 777                 sr_dbg("Didn't set probe factor, unknown channel(group).");
 778                 return SR_ERR_NA;
 779         case SR_CONF_DATA_SOURCE:
 780                 tmp_str = g_variant_get_string(data, NULL);
 781                 if (!strcmp(tmp_str, "Live"))
 782                         devc->data_source = DATA_SOURCE_LIVE;
 783                 else if (devc->model->series->protocol >= PROTOCOL_V2
 784                         && !strcmp(tmp_str, "Memory"))
 785                         devc->data_source = DATA_SOURCE_MEMORY;
 786                 else if (devc->model->series->protocol >= PROTOCOL_V3
 787                          && !strcmp(tmp_str, "Segmented"))
 788                         devc->data_source = DATA_SOURCE_SEGMENTED;
 789                 else {
 790                         sr_err("Unknown data source: '%s'.", tmp_str);
 791                         return SR_ERR;
 792                 }
 793                 break;
 794         default:
 795                 return SR_ERR_NA;
 796         }
 797
 798         return ret;
 799 }
 800
 801 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 802                 const struct sr_channel_group *cg)
 803 {
 804         unsigned int i;
 805         struct dev_context *devc;
 806
 807         devc = (sdi) ? sdi->priv : NULL;
 808
 809         switch (key) {
 810         case SR_CONF_SCAN_OPTIONS:
 811         case SR_CONF_DEVICE_OPTIONS:
 812                 if (!cg)
 813                         return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
 814                 if (cg == devc->digital_group) {
 815                         *data = std_gvar_array_u32(NULL, 0);
 816                         return SR_OK;
 817                 } else {
 818                         for (i = 0; i < devc->model->analog_channels; i++) {
 819                                 if (cg == devc->analog_groups[i]) {
 820                                         *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
 821                                         return SR_OK;
 822                                 }
 823                         }
 824                         return SR_ERR_NA;
 825                 }
 826                 break;
 827         case SR_CONF_COUPLING:
 828                 if (!cg)
 829                         return SR_ERR_CHANNEL_GROUP;
 830                 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
 831                 break;
 832         case SR_CONF_PROBE_FACTOR:
 833                 if (!cg)
 834                         return SR_ERR_CHANNEL_GROUP;
 835                 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
 836                 break;
 837         case SR_CONF_VDIV:
 838                 if (!devc)
 839                         /* Can't know this until we have the exact model. */
 840                         return SR_ERR_ARG;
 841                 if (!cg)
 842                         return SR_ERR_CHANNEL_GROUP;
 843                 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
 844                 break;
 845         case SR_CONF_TIMEBASE:
 846                 if (!devc)
 847                         /* Can't know this until we have the exact model. */
 848                         return SR_ERR_ARG;
 849                 if (devc->num_timebases <= 0)
 850                         return SR_ERR_NA;
 851                 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
 852                 break;
 853         case SR_CONF_TRIGGER_SOURCE:
 854                 if (!devc)
 855                         /* Can't know this until we have the exact model. */
 856                         return SR_ERR_ARG;
 857                 *data = g_variant_new_strv(trigger_sources,
 858                                 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
 859                 break;
 860         case SR_CONF_TRIGGER_SLOPE:
 861                 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
 862                 break;
 863         case SR_CONF_DATA_SOURCE:
 864                 if (!devc)
 865                         /* Can't know this until we have the exact model. */
 866                         return SR_ERR_ARG;
 867                 switch (devc->model->series->protocol) {
 868                 case PROTOCOL_V1:
 869                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
 870                         break;
 871                 case PROTOCOL_V2:
 872                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
 873                         break;
 874                 default:
 875                         *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
 876                         break;
 877                 }
 878                 break;
 879         default:
 880                 return SR_ERR_NA;
 881         }
 882
 883         return SR_OK;
 884 }
 885
 886 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 887 {
 888         struct sr_scpi_dev_inst *scpi;
 889         struct dev_context *devc;
 890         struct sr_channel *ch;
 891         struct sr_datafeed_packet packet;
 892         gboolean some_digital;
 893         GSList *l;
 894
 895         scpi = sdi->conn;
 896         devc = sdi->priv;
 897
 898         devc->num_frames = 0;
 899
 900         some_digital = FALSE;
 901         for (l = sdi->channels; l; l = l->next) {
 902                 ch = l->data;
 903                 sr_dbg("handling channel %s", ch->name);
 904                 if (ch->type == SR_CHANNEL_ANALOG) {
 905                         if (ch->enabled)
 906                                 devc->enabled_channels = g_slist_append(
 907                                                 devc->enabled_channels, ch);
 908                         if (ch->enabled != devc->analog_channels[ch->index]) {
 909                                 /* Enabled channel is currently disabled, or vice versa. */
 910                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
 911                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
 912                                         return SR_ERR;
 913                                 devc->analog_channels[ch->index] = ch->enabled;
 914                         }
 915                 } else if (ch->type == SR_CHANNEL_LOGIC) {
 916                         /* Only one list entry for older protocols. All channels are
 917                          * retrieved together when this entry is processed. */
 918                         if (ch->enabled && (
 919                                                 devc->model->series->protocol > PROTOCOL_V3 ||
 920                                                 !some_digital))
 921                                 devc->enabled_channels = g_slist_append(
 922                                                 devc->enabled_channels, ch);
 923                         if (ch->enabled) {
 924                                 some_digital = TRUE;
 925                                 /* Turn on LA module if currently off. */
 926                                 if (!devc->la_enabled) {
 927                                         if (rigol_ds_config_set(sdi,
 928                                                         devc->model->series->protocol >= PROTOCOL_V3 ?
 929                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
 930                                                 return SR_ERR;
 931                                         devc->la_enabled = TRUE;
 932                                 }
 933                         }
 934                         if (ch->enabled != devc->digital_channels[ch->index]) {
 935                                 /* Enabled channel is currently disabled, or vice versa. */
 936                                 if (rigol_ds_config_set(sdi,
 937                                                 devc->model->series->protocol >= PROTOCOL_V3 ?
 938                                                         ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
 939                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
 940                                         return SR_ERR;
 941                                 devc->digital_channels[ch->index] = ch->enabled;
 942                         }
 943                 }
 944         }
 945
 946         if (!devc->enabled_channels)
 947                 return SR_ERR;
 948
 949         /* Turn off LA module if on and no digital channels selected. */
 950         if (devc->la_enabled && !some_digital)
 951                 if (rigol_ds_config_set(sdi,
 952                                 devc->model->series->protocol >= PROTOCOL_V3 ?
 953                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
 954                         return SR_ERR;
 955
 956         /* Set memory mode. */
 957         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
 958                 sr_err("Data source 'Segmented' not yet supported");
 959                 return SR_ERR;
 960         }
 961
 962         devc->analog_frame_size = analog_frame_size(sdi);
 963         devc->digital_frame_size = digital_frame_size(sdi);
 964
 965         switch (devc->model->series->protocol) {
 966         case PROTOCOL_V2:
 967                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
 968                         return SR_ERR;
 969                 break;
 970         case PROTOCOL_V3:
 971                 /* Apparently for the DS2000 the memory
 972                  * depth can only be set in Running state -
 973                  * this matches the behaviour of the UI. */
 974                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 975                         return SR_ERR;
 976                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
 977                                         devc->analog_frame_size) != SR_OK)
 978                         return SR_ERR;
 979                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 980                         return SR_ERR;
 981                 break;
 982         default:
 983                 break;
 984         }
 985
 986         if (devc->data_source == DATA_SOURCE_LIVE)
 987                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 988                         return SR_ERR;
 989
 990         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
 991                         rigol_ds_receive, (void *)sdi);
 992
 993         std_session_send_df_header(sdi);
 994
 995         devc->channel_entry = devc->enabled_channels;
 996
 997         if (rigol_ds_capture_start(sdi) != SR_OK)
 998                 return SR_ERR;
 999
1000         /* Start of first frame. */
1001         packet.type = SR_DF_FRAME_BEGIN;
1002         sr_session_send(sdi, &packet);
1003
1004         return SR_OK;
1005 }
1006
1007 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1008 {
1009         struct dev_context *devc;
1010         struct sr_scpi_dev_inst *scpi;
1011
1012         devc = sdi->priv;
1013
1014         std_session_send_df_end(sdi);
1015
1016         g_slist_free(devc->enabled_channels);
1017         devc->enabled_channels = NULL;
1018         scpi = sdi->conn;
1019         sr_scpi_source_remove(sdi->session, scpi);
1020
1021         return SR_OK;
1022 }
1023
1024 static struct sr_dev_driver rigol_ds_driver_info = {
1025         .name = "rigol-ds",
1026         .longname = "Rigol DS",
1027         .api_version = 1,
1028         .init = std_init,
1029         .cleanup = std_cleanup,
1030         .scan = scan,
1031         .dev_list = std_dev_list,
1032         .dev_clear = dev_clear,
1033         .config_get = config_get,
1034         .config_set = config_set,
1035         .config_list = config_list,
1036         .dev_open = dev_open,
1037         .dev_close = dev_close,
1038         .dev_acquisition_start = dev_acquisition_start,
1039         .dev_acquisition_stop = dev_acquisition_stop,
1040         .context = NULL,
1041 };
1042 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);