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[libsigrok.git] / src / hardware / rigol-ds / api.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7  *
8  * This program is free software: you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation, either version 3 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20  */
21
22 #include <config.h>
23 #include <fcntl.h>
24 #include <unistd.h>
25 #include <stdlib.h>
26 #include <string.h>
27 #include <strings.h>
28 #include <math.h>
29 #include <glib.h>
30 #include <libsigrok/libsigrok.h>
31 #include "libsigrok-internal.h"
32 #include "scpi.h"
33 #include "protocol.h"
34
35 static const uint32_t scanopts[] = {
36         SR_CONF_CONN,
37         SR_CONF_SERIALCOMM
38 };
39
40 static const uint32_t devopts[] = {
41         SR_CONF_OSCILLOSCOPE,
42         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
43         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
45         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
46         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
47         SR_CONF_NUM_HDIV | SR_CONF_GET,
48         SR_CONF_SAMPLERATE | SR_CONF_GET,
49         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
50 };
51
52 static const uint32_t analog_devopts[] = {
53         SR_CONF_NUM_VDIV | SR_CONF_GET,
54         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
55         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 };
57
58 static const uint64_t timebases[][2] = {
59         /* nanoseconds */
60         { 1, 1000000000 },
61         { 2, 1000000000 },
62         { 5, 1000000000 },
63         { 10, 1000000000 },
64         { 20, 1000000000 },
65         { 50, 1000000000 },
66         { 100, 1000000000 },
67         { 500, 1000000000 },
68         /* microseconds */
69         { 1, 1000000 },
70         { 2, 1000000 },
71         { 5, 1000000 },
72         { 10, 1000000 },
73         { 20, 1000000 },
74         { 50, 1000000 },
75         { 100, 1000000 },
76         { 200, 1000000 },
77         { 500, 1000000 },
78         /* milliseconds */
79         { 1, 1000 },
80         { 2, 1000 },
81         { 5, 1000 },
82         { 10, 1000 },
83         { 20, 1000 },
84         { 50, 1000 },
85         { 100, 1000 },
86         { 200, 1000 },
87         { 500, 1000 },
88         /* seconds */
89         { 1, 1 },
90         { 2, 1 },
91         { 5, 1 },
92         { 10, 1 },
93         { 20, 1 },
94         { 50, 1 },
95         { 100, 1 },
96         { 200, 1 },
97         { 500, 1 },
98         { 1000, 1 },
99 };
100
101 static const uint64_t vdivs[][2] = {
102         /* microvolts */
103         { 500, 1000000 },
104         /* millivolts */
105         { 1, 1000 },
106         { 2, 1000 },
107         { 5, 1000 },
108         { 10, 1000 },
109         { 20, 1000 },
110         { 50, 1000 },
111         { 100, 1000 },
112         { 200, 1000 },
113         { 500, 1000 },
114         /* volts */
115         { 1, 1 },
116         { 2, 1 },
117         { 5, 1 },
118         { 10, 1 },
119         { 20, 1 },
120         { 50, 1 },
121         { 100, 1 },
122 };
123
124 #define NUM_TIMEBASE  ARRAY_SIZE(timebases)
125 #define NUM_VDIV      ARRAY_SIZE(vdivs)
126
127 static const char *trigger_sources[] = {
128         "CH1",
129         "CH2",
130         "CH3",
131         "CH4",
132         "EXT",
133         "AC Line",
134         "D0",
135         "D1",
136         "D2",
137         "D3",
138         "D4",
139         "D5",
140         "D6",
141         "D7",
142         "D8",
143         "D9",
144         "D10",
145         "D11",
146         "D12",
147         "D13",
148         "D14",
149         "D15",
150 };
151
152 static const char *trigger_slopes[] = {
153         "r",
154         "f",
155 };
156
157 static const char *coupling[] = {
158         "AC",
159         "DC",
160         "GND",
161 };
162
163 /* Do not change the order of entries */
164 static const char *data_sources[] = {
165         "Live",
166         "Memory",
167         "Segmented",
168 };
169
170 enum vendor {
171         RIGOL,
172         AGILENT,
173 };
174
175 enum series {
176         VS5000,
177         DS1000,
178         DS2000,
179         DS2000A,
180         DSO1000,
181         DS1000Z,
182 };
183
184 /* short name, full name */
185 static const struct rigol_ds_vendor supported_vendors[] = {
186         [RIGOL] = {"Rigol", "Rigol Technologies"},
187         [AGILENT] = {"Agilent", "Agilent Technologies"},
188 };
189
190 #define VENDOR(x) &supported_vendors[x]
191 /* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
192  * live waveform samples, memory buffer samples */
193 static const struct rigol_ds_series supported_series[] = {
194         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
195                 {50, 1}, {2, 1000}, 14, 2048, 0},
196         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
197                 {50, 1}, {2, 1000}, 12, 600, 1048576},
198         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
199                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
200         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
201                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
202         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
203                 {50, 1}, {2, 1000}, 12, 600, 20480},
204         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
205                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
206 };
207
208 #define SERIES(x) &supported_series[x]
209 /* series, model, min timebase, analog channels, digital */
210 static const struct rigol_ds_model supported_models[] = {
211         {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
212         {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
213         {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
214         {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
215         {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
216         {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
217         {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
218         {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
219         {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
220         {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
221         {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
222         {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
223         {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
224         {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
225         {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
226         {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
227         {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
228         {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
229         {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
230         {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
231         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
232         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
233         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
234         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
235         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
236         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
237         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
238         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
239         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
240         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
241         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
242         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
243         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
244         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
245         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
246         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
247         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
248         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
249         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
250 };
251
252 SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
253
254 static void clear_helper(void *priv)
255 {
256         struct dev_context *devc;
257         unsigned int i;
258
259         devc = priv;
260         g_free(devc->data);
261         g_free(devc->buffer);
262         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
263                 g_free(devc->coupling[i]);
264         g_free(devc->trigger_source);
265         g_free(devc->trigger_slope);
266         g_free(devc->analog_groups);
267         g_free(devc);
268 }
269
270 static int dev_clear(const struct sr_dev_driver *di)
271 {
272         return std_dev_clear(di, clear_helper);
273 }
274
275 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
276 {
277         struct dev_context *devc;
278         struct sr_dev_inst *sdi;
279         struct sr_scpi_hw_info *hw_info;
280         struct sr_channel *ch;
281         long n[3];
282         unsigned int i;
283         const struct rigol_ds_model *model = NULL;
284         gchar *channel_name, **version;
285
286         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
287                 sr_info("Couldn't get IDN response, retrying.");
288                 sr_scpi_close(scpi);
289                 sr_scpi_open(scpi);
290                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
291                         sr_info("Couldn't get IDN response.");
292                         return NULL;
293                 }
294         }
295
296         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
297                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
298                                         supported_models[i].series->vendor->full_name) &&
299                                 !strcmp(hw_info->model, supported_models[i].name)) {
300                         model = &supported_models[i];
301                         break;
302                 }
303         }
304
305         if (!model) {
306                 sr_scpi_hw_info_free(hw_info);
307                 return NULL;
308         }
309
310         sdi = g_malloc0(sizeof(struct sr_dev_inst));
311         sdi->vendor = g_strdup(model->series->vendor->name);
312         sdi->model = g_strdup(model->name);
313         sdi->version = g_strdup(hw_info->firmware_version);
314         sdi->conn = scpi;
315         sdi->driver = &rigol_ds_driver_info;
316         sdi->inst_type = SR_INST_SCPI;
317         sdi->serial_num = g_strdup(hw_info->serial_number);
318         devc = g_malloc0(sizeof(struct dev_context));
319         devc->limit_frames = 0;
320         devc->model = model;
321         devc->format = model->series->format;
322
323         /* DS1000 models with firmware before 0.2.4 used the old data format. */
324         if (model->series == SERIES(DS1000)) {
325                 version = g_strsplit(hw_info->firmware_version, ".", 0);
326                 do {
327                         if (!version[0] || !version[1] || !version[2])
328                                 break;
329                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
330                                 break;
331                         for (i = 0; i < 3; i++) {
332                                 if (sr_atol(version[i], &n[i]) != SR_OK)
333                                         break;
334                         }
335                         if (i != 3)
336                                 break;
337                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
338                         if (scpi->firmware_version < 24) {
339                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
340                                 devc->format = FORMAT_RAW;
341                         }
342                         break;
343                 } while (0);
344                 g_strfreev(version);
345         }
346
347         sr_scpi_hw_info_free(hw_info);
348
349         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
350                                         model->analog_channels);
351
352         for (i = 0; i < model->analog_channels; i++) {
353                 channel_name = g_strdup_printf("CH%d", i + 1);
354                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
355
356                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
357
358                 devc->analog_groups[i]->name = channel_name;
359                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
360                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
361                                 devc->analog_groups[i]);
362         }
363
364         if (devc->model->has_digital) {
365                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
366
367                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
368                         channel_name = g_strdup_printf("D%d", i);
369                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
370                         g_free(channel_name);
371                         devc->digital_group->channels = g_slist_append(
372                                         devc->digital_group->channels, ch);
373                 }
374                 devc->digital_group->name = g_strdup("LA");
375                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
376                                 devc->digital_group);
377         }
378
379         for (i = 0; i < NUM_TIMEBASE; i++) {
380                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
381                         devc->timebases = &timebases[i];
382                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
383                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
384         }
385
386         for (i = 0; i < NUM_VDIV; i++) {
387                 if (!memcmp(&devc->model->series->min_vdiv,
388                                         &vdivs[i], sizeof(uint64_t[2]))) {
389                         devc->vdivs = &vdivs[i];
390                         devc->num_vdivs = NUM_VDIV - i;
391                 }
392         }
393
394         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
395         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
396
397         devc->data_source = DATA_SOURCE_LIVE;
398
399         sdi->priv = devc;
400
401         return sdi;
402 }
403
404 static GSList *scan(struct sr_dev_driver *di, GSList *options)
405 {
406         return sr_scpi_scan(di->context, options, probe_device);
407 }
408
409 static int dev_open(struct sr_dev_inst *sdi)
410 {
411         int ret;
412         struct sr_scpi_dev_inst *scpi = sdi->conn;
413
414         if ((ret = sr_scpi_open(scpi)) < 0) {
415                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
416                 return SR_ERR;
417         }
418
419         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
420                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
421                 return SR_ERR;
422         }
423
424         sdi->status = SR_ST_ACTIVE;
425
426         return SR_OK;
427 }
428
429 static int dev_close(struct sr_dev_inst *sdi)
430 {
431         struct sr_scpi_dev_inst *scpi;
432         struct dev_context *devc;
433
434         if (sdi->status != SR_ST_ACTIVE)
435                 return SR_ERR_DEV_CLOSED;
436
437         scpi = sdi->conn;
438         devc = sdi->priv;
439
440         if (devc->model->series->protocol == PROTOCOL_V2)
441                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
442
443         if (scpi) {
444                 if (sr_scpi_close(scpi) < 0)
445                         return SR_ERR;
446                 sdi->status = SR_ST_INACTIVE;
447         }
448
449         return SR_OK;
450 }
451
452 static int analog_frame_size(const struct sr_dev_inst *sdi)
453 {
454         struct dev_context *devc = sdi->priv;
455         struct sr_channel *ch;
456         int analog_channels = 0;
457         GSList *l;
458
459         for (l = sdi->channels; l; l = l->next) {
460                 ch = l->data;
461                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
462                         analog_channels++;
463         }
464
465         if (analog_channels == 0)
466                 return 0;
467
468         switch (devc->data_source) {
469         case DATA_SOURCE_LIVE:
470                 return devc->model->series->live_samples;
471         case DATA_SOURCE_MEMORY:
472                 return devc->model->series->buffer_samples / analog_channels;
473         default:
474                 return 0;
475         }
476 }
477
478 static int digital_frame_size(const struct sr_dev_inst *sdi)
479 {
480         struct dev_context *devc = sdi->priv;
481
482         switch (devc->data_source) {
483         case DATA_SOURCE_LIVE:
484                 return devc->model->series->live_samples * 2;
485         case DATA_SOURCE_MEMORY:
486                 return devc->model->series->buffer_samples * 2;
487         default:
488                 return 0;
489         }
490 }
491
492 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
493                 const struct sr_channel_group *cg)
494 {
495         struct dev_context *devc;
496         struct sr_channel *ch;
497         const char *tmp_str;
498         uint64_t samplerate;
499         int analog_channel = -1;
500         float smallest_diff = INFINITY;
501         int idx = -1;
502         unsigned i;
503
504         if (!sdi)
505                 return SR_ERR_ARG;
506
507         devc = sdi->priv;
508
509         /* If a channel group is specified, it must be a valid one. */
510         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
511                 sr_err("Invalid channel group specified.");
512                 return SR_ERR;
513         }
514
515         if (cg) {
516                 ch = g_slist_nth_data(cg->channels, 0);
517                 if (!ch)
518                         return SR_ERR;
519                 if (ch->type == SR_CHANNEL_ANALOG) {
520                         if (ch->name[2] < '1' || ch->name[2] > '4')
521                                 return SR_ERR;
522                         analog_channel = ch->name[2] - '1';
523                 }
524         }
525
526         switch (key) {
527         case SR_CONF_NUM_HDIV:
528                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
529                 break;
530         case SR_CONF_NUM_VDIV:
531                 *data = g_variant_new_int32(devc->num_vdivs);
532                 break;
533         case SR_CONF_DATA_SOURCE:
534                 if (devc->data_source == DATA_SOURCE_LIVE)
535                         *data = g_variant_new_string("Live");
536                 else if (devc->data_source == DATA_SOURCE_MEMORY)
537                         *data = g_variant_new_string("Memory");
538                 else
539                         *data = g_variant_new_string("Segmented");
540                 break;
541         case SR_CONF_SAMPLERATE:
542                 if (devc->data_source == DATA_SOURCE_LIVE) {
543                         samplerate = analog_frame_size(sdi) /
544                                 (devc->timebase * devc->model->series->num_horizontal_divs);
545                         *data = g_variant_new_uint64(samplerate);
546                 } else {
547                         sr_dbg("Unknown data source: %d.", devc->data_source);
548                         return SR_ERR_NA;
549                 }
550                 break;
551         case SR_CONF_TRIGGER_SOURCE:
552                 if (!strcmp(devc->trigger_source, "ACL"))
553                         tmp_str = "AC Line";
554                 else if (!strcmp(devc->trigger_source, "CHAN1"))
555                         tmp_str = "CH1";
556                 else if (!strcmp(devc->trigger_source, "CHAN2"))
557                         tmp_str = "CH2";
558                 else if (!strcmp(devc->trigger_source, "CHAN3"))
559                         tmp_str = "CH3";
560                 else if (!strcmp(devc->trigger_source, "CHAN4"))
561                         tmp_str = "CH4";
562                 else
563                         tmp_str = devc->trigger_source;
564                 *data = g_variant_new_string(tmp_str);
565                 break;
566         case SR_CONF_TRIGGER_SLOPE:
567                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
568                         tmp_str = "r";
569                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
570                         tmp_str = "f";
571                 } else {
572                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
573                         return SR_ERR_NA;
574                 }
575                 *data = g_variant_new_string(tmp_str);
576                 break;
577         case SR_CONF_TIMEBASE:
578                 for (i = 0; i < devc->num_timebases; i++) {
579                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
580                         float diff = fabs(devc->timebase - tb);
581                         if (diff < smallest_diff) {
582                                 smallest_diff = diff;
583                                 idx = i;
584                         }
585                 }
586                 if (idx < 0) {
587                         sr_dbg("Negative timebase index: %d.", idx);
588                         return SR_ERR_NA;
589                 }
590                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
591                                               devc->timebases[idx][1]);
592                 break;
593         case SR_CONF_VDIV:
594                 if (analog_channel < 0) {
595                         sr_dbg("Negative analog channel: %d.", analog_channel);
596                         return SR_ERR_NA;
597                 }
598                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
599                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
600                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
601                         if (diff < smallest_diff) {
602                                 smallest_diff = diff;
603                                 idx = i;
604                         }
605                 }
606                 if (idx < 0) {
607                         sr_dbg("Negative vdiv index: %d.", idx);
608                         return SR_ERR_NA;
609                 }
610                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
611                 break;
612         case SR_CONF_COUPLING:
613                 if (analog_channel < 0) {
614                         sr_dbg("Negative analog channel: %d.", analog_channel);
615                         return SR_ERR_NA;
616                 }
617                 *data = g_variant_new_string(devc->coupling[analog_channel]);
618                 break;
619         default:
620                 return SR_ERR_NA;
621         }
622
623         return SR_OK;
624 }
625
626 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
627                 const struct sr_channel_group *cg)
628 {
629         struct dev_context *devc;
630         uint64_t p, q;
631         double t_dbl;
632         unsigned int i, j;
633         int ret;
634         const char *tmp_str;
635         char buffer[16];
636
637         devc = sdi->priv;
638
639         if (sdi->status != SR_ST_ACTIVE)
640                 return SR_ERR_DEV_CLOSED;
641
642         /* If a channel group is specified, it must be a valid one. */
643         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
644                 sr_err("Invalid channel group specified.");
645                 return SR_ERR;
646         }
647
648         ret = SR_OK;
649         switch (key) {
650         case SR_CONF_LIMIT_FRAMES:
651                 devc->limit_frames = g_variant_get_uint64(data);
652                 break;
653         case SR_CONF_TRIGGER_SLOPE:
654                 tmp_str = g_variant_get_string(data, NULL);
655
656                 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
657                         sr_err("Unknown trigger slope: '%s'.",
658                                (tmp_str) ? tmp_str : "NULL");
659                         return SR_ERR_ARG;
660                 }
661
662                 g_free(devc->trigger_slope);
663                 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
664                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
665                 break;
666         case SR_CONF_HORIZ_TRIGGERPOS:
667                 t_dbl = g_variant_get_double(data);
668                 if (t_dbl < 0.0 || t_dbl > 1.0) {
669                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
670                         return SR_ERR;
671                 }
672                 devc->horiz_triggerpos = t_dbl;
673                 /* We have the trigger offset as a percentage of the frame, but
674                  * need to express this in seconds. */
675                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
676                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
677                 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
678                 break;
679         case SR_CONF_TIMEBASE:
680                 g_variant_get(data, "(tt)", &p, &q);
681                 for (i = 0; i < devc->num_timebases; i++) {
682                         if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
683                                 devc->timebase = (float)p / q;
684                                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
685                                                 devc->timebase);
686                                 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
687                                 break;
688                         }
689                 }
690                 if (i == devc->num_timebases) {
691                         sr_err("Invalid timebase index: %d.", i);
692                         ret = SR_ERR_ARG;
693                 }
694                 break;
695         case SR_CONF_TRIGGER_SOURCE:
696                 tmp_str = g_variant_get_string(data, NULL);
697                 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
698                         if (!strcmp(trigger_sources[i], tmp_str)) {
699                                 g_free(devc->trigger_source);
700                                 devc->trigger_source = g_strdup(trigger_sources[i]);
701                                 if (!strcmp(devc->trigger_source, "AC Line"))
702                                         tmp_str = "ACL";
703                                 else if (!strcmp(devc->trigger_source, "CH1"))
704                                         tmp_str = "CHAN1";
705                                 else if (!strcmp(devc->trigger_source, "CH2"))
706                                         tmp_str = "CHAN2";
707                                 else if (!strcmp(devc->trigger_source, "CH3"))
708                                         tmp_str = "CHAN3";
709                                 else if (!strcmp(devc->trigger_source, "CH4"))
710                                         tmp_str = "CHAN4";
711                                 else
712                                         tmp_str = (char *)devc->trigger_source;
713                                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
714                                 break;
715                         }
716                 }
717                 if (i == ARRAY_SIZE(trigger_sources)) {
718                         sr_err("Invalid trigger source index: %d.", i);
719                         ret = SR_ERR_ARG;
720                 }
721                 break;
722         case SR_CONF_VDIV:
723                 if (!cg) {
724                         sr_err("No channel group specified.");
725                         return SR_ERR_CHANNEL_GROUP;
726                 }
727                 g_variant_get(data, "(tt)", &p, &q);
728                 for (i = 0; i < devc->model->analog_channels; i++) {
729                         if (cg == devc->analog_groups[i]) {
730                                 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
731                                         if (vdivs[j][0] != p || vdivs[j][1] != q)
732                                                 continue;
733                                         devc->vdiv[i] = (float)p / q;
734                                         g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
735                                                         devc->vdiv[i]);
736                                         return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
737                                                         buffer);
738                                 }
739                                 sr_err("Invalid vdiv index: %d.", j);
740                                 return SR_ERR_ARG;
741                         }
742                 }
743                 sr_dbg("Didn't set vdiv, unknown channel(group).");
744                 return SR_ERR_NA;
745         case SR_CONF_COUPLING:
746                 if (!cg) {
747                         sr_err("No channel group specified.");
748                         return SR_ERR_CHANNEL_GROUP;
749                 }
750                 tmp_str = g_variant_get_string(data, NULL);
751                 for (i = 0; i < devc->model->analog_channels; i++) {
752                         if (cg == devc->analog_groups[i]) {
753                                 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
754                                         if (!strcmp(tmp_str, coupling[j])) {
755                                                 g_free(devc->coupling[i]);
756                                                 devc->coupling[i] = g_strdup(coupling[j]);
757                                                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
758                                                                 devc->coupling[i]);
759                                         }
760                                 }
761                                 sr_err("Invalid coupling index: %d.", j);
762                                 return SR_ERR_ARG;
763                         }
764                 }
765                 sr_dbg("Didn't set coupling, unknown channel(group).");
766                 return SR_ERR_NA;
767         case SR_CONF_DATA_SOURCE:
768                 tmp_str = g_variant_get_string(data, NULL);
769                 if (!strcmp(tmp_str, "Live"))
770                         devc->data_source = DATA_SOURCE_LIVE;
771                 else if (devc->model->series->protocol >= PROTOCOL_V2
772                         && !strcmp(tmp_str, "Memory"))
773                         devc->data_source = DATA_SOURCE_MEMORY;
774                 else if (devc->model->series->protocol >= PROTOCOL_V3
775                          && !strcmp(tmp_str, "Segmented"))
776                         devc->data_source = DATA_SOURCE_SEGMENTED;
777                 else {
778                         sr_err("Unknown data source: '%s'.", tmp_str);
779                         return SR_ERR;
780                 }
781                 break;
782         default:
783                 return SR_ERR_NA;
784         }
785
786         return ret;
787 }
788
789 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
790                 const struct sr_channel_group *cg)
791 {
792         GVariant *tuple, *rational[2];
793         GVariantBuilder gvb;
794         unsigned int i;
795         struct dev_context *devc = NULL;
796
797         if (key == SR_CONF_SCAN_OPTIONS) {
798                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
799                                 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
800                 return SR_OK;
801         } else if (key == SR_CONF_DEVICE_OPTIONS && !cg) {
802                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
803                                 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
804                 return SR_OK;
805         }
806
807         /* Every other option requires a valid device instance. */
808         if (!sdi)
809                 return SR_ERR_ARG;
810         devc = sdi->priv;
811
812         /* If a channel group is specified, it must be a valid one. */
813         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
814                 sr_err("Invalid channel group specified.");
815                 return SR_ERR;
816         }
817
818         switch (key) {
819         case SR_CONF_DEVICE_OPTIONS:
820                 if (!cg) {
821                         sr_err("No channel group specified.");
822                         return SR_ERR_CHANNEL_GROUP;
823                 }
824                 if (cg == devc->digital_group) {
825                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
826                                 NULL, 0, sizeof(uint32_t));
827                         return SR_OK;
828                 } else {
829                         for (i = 0; i < devc->model->analog_channels; i++) {
830                                 if (cg == devc->analog_groups[i]) {
831                                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
832                                                 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
833                                         return SR_OK;
834                                 }
835                         }
836                         return SR_ERR_NA;
837                 }
838                 break;
839         case SR_CONF_COUPLING:
840                 if (!cg) {
841                         sr_err("No channel group specified.");
842                         return SR_ERR_CHANNEL_GROUP;
843                 }
844                 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
845                 break;
846         case SR_CONF_VDIV:
847                 if (!devc)
848                         /* Can't know this until we have the exact model. */
849                         return SR_ERR_ARG;
850                 if (!cg) {
851                         sr_err("No channel group specified.");
852                         return SR_ERR_CHANNEL_GROUP;
853                 }
854                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
855                 for (i = 0; i < devc->num_vdivs; i++) {
856                         rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
857                         rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
858                         tuple = g_variant_new_tuple(rational, 2);
859                         g_variant_builder_add_value(&gvb, tuple);
860                 }
861                 *data = g_variant_builder_end(&gvb);
862                 break;
863         case SR_CONF_TIMEBASE:
864                 if (!devc)
865                         /* Can't know this until we have the exact model. */
866                         return SR_ERR_ARG;
867                 if (devc->num_timebases <= 0)
868                         return SR_ERR_NA;
869                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
870                 for (i = 0; i < devc->num_timebases; i++) {
871                         rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
872                         rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
873                         tuple = g_variant_new_tuple(rational, 2);
874                         g_variant_builder_add_value(&gvb, tuple);
875                 }
876                 *data = g_variant_builder_end(&gvb);
877                 break;
878         case SR_CONF_TRIGGER_SOURCE:
879                 if (!devc)
880                         /* Can't know this until we have the exact model. */
881                         return SR_ERR_ARG;
882                 *data = g_variant_new_strv(trigger_sources,
883                                 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
884                 break;
885         case SR_CONF_TRIGGER_SLOPE:
886                 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
887                 break;
888         case SR_CONF_DATA_SOURCE:
889                 if (!devc)
890                         /* Can't know this until we have the exact model. */
891                         return SR_ERR_ARG;
892                 switch (devc->model->series->protocol) {
893                 case PROTOCOL_V1:
894                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
895                         break;
896                 case PROTOCOL_V2:
897                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
898                         break;
899                 default:
900                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
901                         break;
902                 }
903                 break;
904         default:
905                 return SR_ERR_NA;
906         }
907
908         return SR_OK;
909 }
910
911 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
912 {
913         struct sr_scpi_dev_inst *scpi;
914         struct dev_context *devc;
915         struct sr_channel *ch;
916         struct sr_datafeed_packet packet;
917         gboolean some_digital;
918         GSList *l;
919
920         if (sdi->status != SR_ST_ACTIVE)
921                 return SR_ERR_DEV_CLOSED;
922
923         scpi = sdi->conn;
924         devc = sdi->priv;
925
926         devc->num_frames = 0;
927
928         some_digital = FALSE;
929         for (l = sdi->channels; l; l = l->next) {
930                 ch = l->data;
931                 sr_dbg("handling channel %s", ch->name);
932                 if (ch->type == SR_CHANNEL_ANALOG) {
933                         if (ch->enabled)
934                                 devc->enabled_channels = g_slist_append(
935                                                 devc->enabled_channels, ch);
936                         if (ch->enabled != devc->analog_channels[ch->index]) {
937                                 /* Enabled channel is currently disabled, or vice versa. */
938                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
939                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
940                                         return SR_ERR;
941                                 devc->analog_channels[ch->index] = ch->enabled;
942                         }
943                 } else if (ch->type == SR_CHANNEL_LOGIC) {
944                         /* Only one list entry for DS1000D series. All channels are retrieved
945                          * together when this entry is processed. */
946                         if (ch->enabled && (
947                                                 devc->model->series->protocol > PROTOCOL_V2 ||
948                                                 !some_digital))
949                                 devc->enabled_channels = g_slist_append(
950                                                 devc->enabled_channels, ch);
951                         if (ch->enabled) {
952                                 some_digital = TRUE;
953                                 /* Turn on LA module if currently off. */
954                                 if (!devc->la_enabled) {
955                                         if (rigol_ds_config_set(sdi,
956                                                         devc->model->series->protocol >= PROTOCOL_V4 ?
957                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
958                                                 return SR_ERR;
959                                         devc->la_enabled = TRUE;
960                                 }
961                         }
962                         if (ch->enabled != devc->digital_channels[ch->index]) {
963                                 /* Enabled channel is currently disabled, or vice versa. */
964                                 if (rigol_ds_config_set(sdi,
965                                                 devc->model->series->protocol >= PROTOCOL_V4 ?
966                                                         ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
967                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
968                                         return SR_ERR;
969                                 devc->digital_channels[ch->index] = ch->enabled;
970                         }
971                 }
972         }
973
974         if (!devc->enabled_channels)
975                 return SR_ERR;
976
977         /* Turn off LA module if on and no digital channels selected. */
978         if (devc->la_enabled && !some_digital)
979                 if (rigol_ds_config_set(sdi,
980                                 devc->model->series->protocol >= PROTOCOL_V4 ?
981                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
982                         return SR_ERR;
983
984         /* Set memory mode. */
985         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
986                 sr_err("Data source 'Segmented' not yet supported");
987                 return SR_ERR;
988         }
989
990         devc->analog_frame_size = analog_frame_size(sdi);
991         devc->digital_frame_size = digital_frame_size(sdi);
992
993         switch (devc->model->series->protocol) {
994         case PROTOCOL_V2:
995                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
996                         return SR_ERR;
997                 break;
998         case PROTOCOL_V3:
999                 /* Apparently for the DS2000 the memory
1000                  * depth can only be set in Running state -
1001                  * this matches the behaviour of the UI. */
1002                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1003                         return SR_ERR;
1004                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1005                                         devc->analog_frame_size) != SR_OK)
1006                         return SR_ERR;
1007                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1008                         return SR_ERR;
1009                 break;
1010         default:
1011                 break;
1012         }
1013
1014         if (devc->data_source == DATA_SOURCE_LIVE)
1015                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1016                         return SR_ERR;
1017
1018         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1019                         rigol_ds_receive, (void *)sdi);
1020
1021         std_session_send_df_header(sdi, LOG_PREFIX);
1022
1023         devc->channel_entry = devc->enabled_channels;
1024
1025         if (rigol_ds_capture_start(sdi) != SR_OK)
1026                 return SR_ERR;
1027
1028         /* Start of first frame. */
1029         packet.type = SR_DF_FRAME_BEGIN;
1030         sr_session_send(sdi, &packet);
1031
1032         return SR_OK;
1033 }
1034
1035 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1036 {
1037         struct dev_context *devc;
1038         struct sr_scpi_dev_inst *scpi;
1039
1040         devc = sdi->priv;
1041
1042         if (sdi->status != SR_ST_ACTIVE) {
1043                 sr_err("Device inactive, can't stop acquisition.");
1044                 return SR_ERR;
1045         }
1046
1047         std_session_send_df_end(sdi, LOG_PREFIX);
1048
1049         g_slist_free(devc->enabled_channels);
1050         devc->enabled_channels = NULL;
1051         scpi = sdi->conn;
1052         sr_scpi_source_remove(sdi->session, scpi);
1053
1054         return SR_OK;
1055 }
1056
1057 SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1058         .name = "rigol-ds",
1059         .longname = "Rigol DS",
1060         .api_version = 1,
1061         .init = std_init,
1062         .cleanup = std_cleanup,
1063         .scan = scan,
1064         .dev_list = std_dev_list,
1065         .dev_clear = dev_clear,
1066         .config_get = config_get,
1067         .config_set = config_set,
1068         .config_list = config_list,
1069         .dev_open = dev_open,
1070         .dev_close = dev_close,
1071         .dev_acquisition_start = dev_acquisition_start,
1072         .dev_acquisition_stop = dev_acquisition_stop,
1073         .context = NULL,
1074 };