src/hardware/rigol-ds/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <config.h>
  23 #include <fcntl.h>
  24 #include <unistd.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27 #include <strings.h>
  28 #include <math.h>
  29 #include <glib.h>
  30 #include <libsigrok/libsigrok.h>
  31 #include "libsigrok-internal.h"
  32 #include "scpi.h"
  33 #include "protocol.h"
  34
  35 static const uint32_t scanopts[] = {
  36         SR_CONF_CONN,
  37         SR_CONF_SERIALCOMM,
  38 };
  39
  40 static const uint32_t drvopts[] = {
  41         SR_CONF_OSCILLOSCOPE,
  42 };
  43
  44 static const uint32_t devopts[] = {
  45         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
  46         SR_CONF_SAMPLERATE | SR_CONF_GET,
  47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  48         SR_CONF_NUM_HDIV | SR_CONF_GET,
  49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
  50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
  53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  54 };
  55
  56 static const uint32_t devopts_cg_analog[] = {
  57         SR_CONF_NUM_VDIV | SR_CONF_GET,
  58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  61 };
  62
  63 static const uint64_t timebases[][2] = {
  64         /* nanoseconds */
  65         { 1, 1000000000 },
  66         { 2, 1000000000 },
  67         { 5, 1000000000 },
  68         { 10, 1000000000 },
  69         { 20, 1000000000 },
  70         { 50, 1000000000 },
  71         { 100, 1000000000 },
  72         { 500, 1000000000 },
  73         /* microseconds */
  74         { 1, 1000000 },
  75         { 2, 1000000 },
  76         { 5, 1000000 },
  77         { 10, 1000000 },
  78         { 20, 1000000 },
  79         { 50, 1000000 },
  80         { 100, 1000000 },
  81         { 200, 1000000 },
  82         { 500, 1000000 },
  83         /* milliseconds */
  84         { 1, 1000 },
  85         { 2, 1000 },
  86         { 5, 1000 },
  87         { 10, 1000 },
  88         { 20, 1000 },
  89         { 50, 1000 },
  90         { 100, 1000 },
  91         { 200, 1000 },
  92         { 500, 1000 },
  93         /* seconds */
  94         { 1, 1 },
  95         { 2, 1 },
  96         { 5, 1 },
  97         { 10, 1 },
  98         { 20, 1 },
  99         { 50, 1 },
 100         { 100, 1 },
 101         { 200, 1 },
 102         { 500, 1 },
 103         { 1000, 1 },
 104 };
 105
 106 static const uint64_t vdivs[][2] = {
 107         /* microvolts */
 108         { 500, 1000000 },
 109         /* millivolts */
 110         { 1, 1000 },
 111         { 2, 1000 },
 112         { 5, 1000 },
 113         { 10, 1000 },
 114         { 20, 1000 },
 115         { 50, 1000 },
 116         { 100, 1000 },
 117         { 200, 1000 },
 118         { 500, 1000 },
 119         /* volts */
 120         { 1, 1 },
 121         { 2, 1 },
 122         { 5, 1 },
 123         { 10, 1 },
 124         { 20, 1 },
 125         { 50, 1 },
 126         { 100, 1 },
 127 };
 128
 129 static const char *trigger_sources_2_chans[] = {
 130         "CH1", "CH2",
 131         "EXT", "AC Line",
 132         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 133         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
 134 };
 135
 136 static const char *trigger_sources_4_chans[] = {
 137         "CH1", "CH2", "CH3", "CH4",
 138         "EXT", "AC Line",
 139         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 140         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
 141 };
 142
 143 static const char *trigger_slopes[] = {
 144         "r", "f",
 145 };
 146
 147 static const char *coupling[] = {
 148         "AC", "DC", "GND",
 149 };
 150
 151 static const uint64_t probe_factor[] = {
 152         1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
 153 };
 154
 155 /* Do not change the order of entries */
 156 static const char *data_sources[] = {
 157         "Live",
 158         "Memory",
 159         "Segmented",
 160 };
 161
 162 static const struct rigol_ds_command std_cmd[] = {
 163         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
 164         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
 165 };
 166
 167 static const struct rigol_ds_command mso7000a_cmd[] = {
 168         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
 169         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
 170 };
 171
 172 enum vendor {
 173         RIGOL,
 174         AGILENT,
 175 };
 176
 177 enum series {
 178         VS5000,
 179         DS1000,
 180         DS2000,
 181         DS2000A,
 182         DSO1000,
 183         DSO1000B,
 184         DS1000Z,
 185         DS4000,
 186         MSO5000,
 187         MSO7000A,
 188 };
 189
 190 /* short name, full name */
 191 static const struct rigol_ds_vendor supported_vendors[] = {
 192         [RIGOL] = {"Rigol", "Rigol Technologies"},
 193         [AGILENT] = {"Agilent", "Agilent Technologies"},
 194 };
 195
 196 #define VENDOR(x) &supported_vendors[x]
 197 /* vendor, series/name, protocol, data format, max timebase, min vdiv,
 198  * number of horizontal divs, live waveform samples, memory buffer samples */
 199 static const struct rigol_ds_series supported_series[] = {
 200         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
 201                 {50, 1}, {2, 1000}, 14, 2048, 0},
 202         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
 203                 {50, 1}, {2, 1000}, 12, 600, 1048576},
 204         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
 205                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
 206         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
 207                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
 208         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 209                 {50, 1}, {2, 1000}, 12, 600, 20480},
 210         [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 211                 {50, 1}, {2, 1000}, 12, 600, 20480},
 212         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
 213                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
 214         [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
 215                 {1000, 1}, {1, 1000}, 14, 1400, 0},
 216         [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2,
 217                 {1000, 1}, {500, 1000000}, 10, 1000, 0},
 218         [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
 219                 {50, 1}, {2, 1000}, 10, 1000, 8000000},
 220 };
 221
 222 #define SERIES(x) &supported_series[x]
 223 /*
 224  * Use a macro to select the correct list of trigger sources and its length
 225  * based on the number of analog channels and presence of digital channels.
 226  */
 227 #define CH_INFO(num, digital) \
 228         num, digital, trigger_sources_##num##_chans, \
 229         digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
 230 /* series, model, min timebase, analog channels, digital */
 231 static const struct rigol_ds_model supported_models[] = {
 232         {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
 233         {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
 234         {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 235         {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 236         {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 237         {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
 238         {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
 239         {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 240         {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 241         {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 242         {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 243         {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 244         {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 245         {SERIES(DS1000), "DS1152E-EDU", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 246         {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 247         {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 248         {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 249         {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 250         {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 251         {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 252         {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
 253         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 254         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 255         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 256         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
 257         {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 258         {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 259         {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 260         {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
 261         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 262         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 263         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 264         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
 265         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 266         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
 267         {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 268         {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 269         {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 270         {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 271         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 272         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 273         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 274         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 275         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 276         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 277         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 278         {SERIES(DS1000Z), "DS1202Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 279         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 280         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 281         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 282         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 283         {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
 284         {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd},
 285         {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 286         {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd},
 287         {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 288         {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 289         {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 290         /* TODO: Digital channels are not yet supported on MSO7000A. */
 291         {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
 292 };
 293
 294 static struct sr_dev_driver rigol_ds_driver_info;
 295
 296 static void clear_helper(struct dev_context *devc)
 297 {
 298         unsigned int i;
 299
 300         g_free(devc->data);
 301         g_free(devc->buffer);
 302         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
 303                 g_free(devc->coupling[i]);
 304         g_free(devc->trigger_source);
 305         g_free(devc->trigger_slope);
 306         g_free(devc->analog_groups);
 307 }
 308
 309 static int dev_clear(const struct sr_dev_driver *di)
 310 {
 311         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
 312 }
 313
 314 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
 315 {
 316         struct dev_context *devc;
 317         struct sr_dev_inst *sdi;
 318         struct sr_scpi_hw_info *hw_info;
 319         struct sr_channel *ch;
 320         long n[3];
 321         unsigned int i;
 322         const struct rigol_ds_model *model = NULL;
 323         gchar *channel_name, **version;
 324
 325         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 326                 sr_info("Couldn't get IDN response, retrying.");
 327                 sr_scpi_close(scpi);
 328                 sr_scpi_open(scpi);
 329                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 330                         sr_info("Couldn't get IDN response.");
 331                         return NULL;
 332                 }
 333         }
 334
 335         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
 336                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
 337                                         supported_models[i].series->vendor->full_name) &&
 338                                 !strcmp(hw_info->model, supported_models[i].name)) {
 339                         model = &supported_models[i];
 340                         break;
 341                 }
 342         }
 343
 344         if (!model) {
 345                 sr_scpi_hw_info_free(hw_info);
 346                 return NULL;
 347         }
 348
 349         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 350         sdi->vendor = g_strdup(model->series->vendor->name);
 351         sdi->model = g_strdup(model->name);
 352         sdi->version = g_strdup(hw_info->firmware_version);
 353         sdi->conn = scpi;
 354         sdi->driver = &rigol_ds_driver_info;
 355         sdi->inst_type = SR_INST_SCPI;
 356         sdi->serial_num = g_strdup(hw_info->serial_number);
 357         devc = g_malloc0(sizeof(struct dev_context));
 358         devc->limit_frames = 0;
 359         devc->model = model;
 360         devc->format = model->series->format;
 361
 362         /* DS1000 models with firmware before 0.2.4 used the old data format. */
 363         if (model->series == SERIES(DS1000)) {
 364                 version = g_strsplit(hw_info->firmware_version, ".", 0);
 365                 do {
 366                         if (!version[0] || !version[1] || !version[2])
 367                                 break;
 368                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
 369                                 break;
 370                         for (i = 0; i < 3; i++) {
 371                                 if (sr_atol(version[i], &n[i]) != SR_OK)
 372                                         break;
 373                         }
 374                         if (i != 3)
 375                                 break;
 376                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
 377                         if (scpi->firmware_version < 24) {
 378                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
 379                                 devc->format = FORMAT_RAW;
 380                         }
 381                         break;
 382                 } while (0);
 383                 g_strfreev(version);
 384         }
 385
 386         sr_scpi_hw_info_free(hw_info);
 387
 388         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
 389                                         model->analog_channels);
 390
 391         for (i = 0; i < model->analog_channels; i++) {
 392                 channel_name = g_strdup_printf("CH%d", i + 1);
 393                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
 394
 395                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
 396
 397                 devc->analog_groups[i]->name = channel_name;
 398                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
 399                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 400                                 devc->analog_groups[i]);
 401         }
 402
 403         if (devc->model->has_digital) {
 404                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
 405
 406                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 407                         channel_name = g_strdup_printf("D%d", i);
 408                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
 409                         g_free(channel_name);
 410                         devc->digital_group->channels = g_slist_append(
 411                                         devc->digital_group->channels, ch);
 412                 }
 413                 devc->digital_group->name = g_strdup("LA");
 414                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 415                                 devc->digital_group);
 416         }
 417
 418         for (i = 0; i < ARRAY_SIZE(timebases); i++) {
 419                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
 420                         devc->timebases = &timebases[i];
 421                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
 422                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
 423         }
 424
 425         for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 426                 if (!memcmp(&devc->model->series->min_vdiv,
 427                                         &vdivs[i], sizeof(uint64_t[2]))) {
 428                         devc->vdivs = &vdivs[i];
 429                         devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
 430                 }
 431         }
 432
 433         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
 434         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
 435
 436         devc->data_source = DATA_SOURCE_LIVE;
 437
 438         sdi->priv = devc;
 439
 440         return sdi;
 441 }
 442
 443 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 444 {
 445         return sr_scpi_scan(di->context, options, probe_device);
 446 }
 447
 448 static int dev_open(struct sr_dev_inst *sdi)
 449 {
 450         int ret;
 451         struct sr_scpi_dev_inst *scpi = sdi->conn;
 452
 453         if ((ret = sr_scpi_open(scpi)) < 0) {
 454                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
 455                 return SR_ERR;
 456         }
 457
 458         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
 459                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
 460                 return SR_ERR;
 461         }
 462
 463         return SR_OK;
 464 }
 465
 466 static int dev_close(struct sr_dev_inst *sdi)
 467 {
 468         struct sr_scpi_dev_inst *scpi;
 469         struct dev_context *devc;
 470
 471         scpi = sdi->conn;
 472         devc = sdi->priv;
 473
 474         if (!scpi)
 475                 return SR_ERR_BUG;
 476
 477         if (devc->model->series->protocol == PROTOCOL_V2)
 478                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
 479
 480         return sr_scpi_close(scpi);
 481 }
 482
 483 static int analog_frame_size(const struct sr_dev_inst *sdi)
 484 {
 485         struct dev_context *devc = sdi->priv;
 486         struct sr_channel *ch;
 487         int analog_channels = 0;
 488         GSList *l;
 489
 490         for (l = sdi->channels; l; l = l->next) {
 491                 ch = l->data;
 492                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
 493                         analog_channels++;
 494         }
 495
 496         if (analog_channels == 0)
 497                 return 0;
 498
 499         switch (devc->data_source) {
 500         case DATA_SOURCE_LIVE:
 501                 return devc->model->series->live_samples;
 502         case DATA_SOURCE_MEMORY:
 503         case DATA_SOURCE_SEGMENTED:
 504                 return devc->model->series->buffer_samples / analog_channels;
 505         default:
 506                 return 0;
 507         }
 508 }
 509
 510 static int digital_frame_size(const struct sr_dev_inst *sdi)
 511 {
 512         struct dev_context *devc = sdi->priv;
 513
 514         switch (devc->data_source) {
 515         case DATA_SOURCE_LIVE:
 516                 return devc->model->series->live_samples * 2;
 517         case DATA_SOURCE_MEMORY:
 518         case DATA_SOURCE_SEGMENTED:
 519                 return devc->model->series->buffer_samples * 2;
 520         default:
 521                 return 0;
 522         }
 523 }
 524
 525 static int config_get(uint32_t key, GVariant **data,
 526         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 527 {
 528         struct dev_context *devc;
 529         struct sr_channel *ch;
 530         const char *tmp_str;
 531         int analog_channel = -1;
 532         float smallest_diff = INFINITY;
 533         int idx = -1;
 534         unsigned i;
 535
 536         if (!sdi)
 537                 return SR_ERR_ARG;
 538
 539         devc = sdi->priv;
 540
 541         /* If a channel group is specified, it must be a valid one. */
 542         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 543                 sr_err("Invalid channel group specified.");
 544                 return SR_ERR;
 545         }
 546
 547         if (cg) {
 548                 ch = g_slist_nth_data(cg->channels, 0);
 549                 if (!ch)
 550                         return SR_ERR;
 551                 if (ch->type == SR_CHANNEL_ANALOG) {
 552                         if (ch->name[2] < '1' || ch->name[2] > '4')
 553                                 return SR_ERR;
 554                         analog_channel = ch->name[2] - '1';
 555                 }
 556         }
 557
 558         switch (key) {
 559         case SR_CONF_NUM_HDIV:
 560                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
 561                 break;
 562         case SR_CONF_NUM_VDIV:
 563                 *data = g_variant_new_int32(devc->num_vdivs);
 564                 break;
 565         case SR_CONF_DATA_SOURCE:
 566                 if (devc->data_source == DATA_SOURCE_LIVE)
 567                         *data = g_variant_new_string("Live");
 568                 else if (devc->data_source == DATA_SOURCE_MEMORY)
 569                         *data = g_variant_new_string("Memory");
 570                 else
 571                         *data = g_variant_new_string("Segmented");
 572                 break;
 573         case SR_CONF_SAMPLERATE:
 574                 *data = g_variant_new_uint64(devc->sample_rate);
 575                 break;
 576         case SR_CONF_TRIGGER_SOURCE:
 577                 if (!strcmp(devc->trigger_source, "ACL"))
 578                         tmp_str = "AC Line";
 579                 else if (!strcmp(devc->trigger_source, "CHAN1"))
 580                         tmp_str = "CH1";
 581                 else if (!strcmp(devc->trigger_source, "CHAN2"))
 582                         tmp_str = "CH2";
 583                 else if (!strcmp(devc->trigger_source, "CHAN3"))
 584                         tmp_str = "CH3";
 585                 else if (!strcmp(devc->trigger_source, "CHAN4"))
 586                         tmp_str = "CH4";
 587                 else
 588                         tmp_str = devc->trigger_source;
 589                 *data = g_variant_new_string(tmp_str);
 590                 break;
 591         case SR_CONF_TRIGGER_SLOPE:
 592                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
 593                         tmp_str = "r";
 594                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
 595                         tmp_str = "f";
 596                 } else {
 597                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
 598                         return SR_ERR_NA;
 599                 }
 600                 *data = g_variant_new_string(tmp_str);
 601                 break;
 602         case SR_CONF_TRIGGER_LEVEL:
 603                 *data = g_variant_new_double(devc->trigger_level);
 604                 break;
 605         case SR_CONF_TIMEBASE:
 606                 for (i = 0; i < devc->num_timebases; i++) {
 607                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
 608                         float diff = fabs(devc->timebase - tb);
 609                         if (diff < smallest_diff) {
 610                                 smallest_diff = diff;
 611                                 idx = i;
 612                         }
 613                 }
 614                 if (idx < 0) {
 615                         sr_dbg("Negative timebase index: %d.", idx);
 616                         return SR_ERR_NA;
 617                 }
 618                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
 619                                               devc->timebases[idx][1]);
 620                 break;
 621         case SR_CONF_VDIV:
 622                 if (analog_channel < 0) {
 623                         sr_dbg("Negative analog channel: %d.", analog_channel);
 624                         return SR_ERR_NA;
 625                 }
 626                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 627                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
 628                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
 629                         if (diff < smallest_diff) {
 630                                 smallest_diff = diff;
 631                                 idx = i;
 632                         }
 633                 }
 634                 if (idx < 0) {
 635                         sr_dbg("Negative vdiv index: %d.", idx);
 636                         return SR_ERR_NA;
 637                 }
 638                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
 639                 break;
 640         case SR_CONF_COUPLING:
 641                 if (analog_channel < 0) {
 642                         sr_dbg("Negative analog channel: %d.", analog_channel);
 643                         return SR_ERR_NA;
 644                 }
 645                 *data = g_variant_new_string(devc->coupling[analog_channel]);
 646                 break;
 647         case SR_CONF_PROBE_FACTOR:
 648                 if (analog_channel < 0) {
 649                         sr_dbg("Negative analog channel: %d.", analog_channel);
 650                         return SR_ERR_NA;
 651                 }
 652                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
 653                 break;
 654         default:
 655                 return SR_ERR_NA;
 656         }
 657
 658         return SR_OK;
 659 }
 660
 661 static int config_set(uint32_t key, GVariant *data,
 662         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 663 {
 664         struct dev_context *devc;
 665         uint64_t p;
 666         double t_dbl;
 667         int ret, idx, i;
 668         const char *tmp_str;
 669         char buffer[16];
 670
 671         devc = sdi->priv;
 672
 673         /* If a channel group is specified, it must be a valid one. */
 674         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 675                 sr_err("Invalid channel group specified.");
 676                 return SR_ERR;
 677         }
 678
 679         switch (key) {
 680         case SR_CONF_LIMIT_FRAMES:
 681                 devc->limit_frames = g_variant_get_uint64(data);
 682                 break;
 683         case SR_CONF_TRIGGER_SLOPE:
 684                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
 685                         return SR_ERR_ARG;
 686                 g_free(devc->trigger_slope);
 687                 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
 688                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
 689         case SR_CONF_HORIZ_TRIGGERPOS:
 690                 t_dbl = g_variant_get_double(data);
 691                 if (t_dbl < 0.0 || t_dbl > 1.0) {
 692                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
 693                         return SR_ERR;
 694                 }
 695                 devc->horiz_triggerpos = t_dbl;
 696                 /* We have the trigger offset as a percentage of the frame, but
 697                  * need to express this in seconds. */
 698                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
 699                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
 700                 return rigol_ds_config_set(sdi,
 701                         devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
 702         case SR_CONF_TRIGGER_LEVEL:
 703                 t_dbl = g_variant_get_double(data);
 704                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
 705                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
 706                 if (ret == SR_OK)
 707                         devc->trigger_level = t_dbl;
 708                 return ret;
 709         case SR_CONF_TIMEBASE:
 710                 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
 711                         return SR_ERR_ARG;
 712                 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
 713                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
 714                                 devc->timebase);
 715                 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
 716         case SR_CONF_TRIGGER_SOURCE:
 717                 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
 718                         return SR_ERR_ARG;
 719                 g_free(devc->trigger_source);
 720                 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
 721                 if (!strcmp(devc->trigger_source, "AC Line"))
 722                         tmp_str = "ACL";
 723                 else if (!strcmp(devc->trigger_source, "CH1"))
 724                         tmp_str = "CHAN1";
 725                 else if (!strcmp(devc->trigger_source, "CH2"))
 726                         tmp_str = "CHAN2";
 727                 else if (!strcmp(devc->trigger_source, "CH3"))
 728                         tmp_str = "CHAN3";
 729                 else if (!strcmp(devc->trigger_source, "CH4"))
 730                         tmp_str = "CHAN4";
 731                 else
 732                         tmp_str = (char *)devc->trigger_source;
 733                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
 734         case SR_CONF_VDIV:
 735                 if (!cg)
 736                         return SR_ERR_CHANNEL_GROUP;
 737                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
 738                         return SR_ERR_ARG;
 739                 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
 740                         return SR_ERR_ARG;
 741                 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
 742                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
 743                 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
 744         case SR_CONF_COUPLING:
 745                 if (!cg)
 746                         return SR_ERR_CHANNEL_GROUP;
 747                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
 748                         return SR_ERR_ARG;
 749                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
 750                         return SR_ERR_ARG;
 751                 g_free(devc->coupling[i]);
 752                 devc->coupling[i] = g_strdup(coupling[idx]);
 753                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
 754         case SR_CONF_PROBE_FACTOR:
 755                 if (!cg)
 756                         return SR_ERR_CHANNEL_GROUP;
 757                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
 758                         return SR_ERR_ARG;
 759                 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
 760                         return SR_ERR_ARG;
 761                 p = g_variant_get_uint64(data);
 762                 devc->attenuation[i] = probe_factor[idx];
 763                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
 764                 if (ret == SR_OK)
 765                         rigol_ds_get_dev_cfg_vertical(sdi);
 766                 return ret;
 767         case SR_CONF_DATA_SOURCE:
 768                 tmp_str = g_variant_get_string(data, NULL);
 769                 if (!strcmp(tmp_str, "Live"))
 770                         devc->data_source = DATA_SOURCE_LIVE;
 771                 else if (devc->model->series->protocol >= PROTOCOL_V2
 772                         && !strcmp(tmp_str, "Memory"))
 773                         devc->data_source = DATA_SOURCE_MEMORY;
 774                 else if (devc->model->series->protocol >= PROTOCOL_V3
 775                          && !strcmp(tmp_str, "Segmented"))
 776                         devc->data_source = DATA_SOURCE_SEGMENTED;
 777                 else {
 778                         sr_err("Unknown data source: '%s'.", tmp_str);
 779                         return SR_ERR;
 780                 }
 781                 break;
 782         default:
 783                 return SR_ERR_NA;
 784         }
 785
 786         return SR_OK;
 787 }
 788
 789 static int config_list(uint32_t key, GVariant **data,
 790         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 791 {
 792         struct dev_context *devc;
 793
 794         devc = (sdi) ? sdi->priv : NULL;
 795
 796         switch (key) {
 797         case SR_CONF_SCAN_OPTIONS:
 798         case SR_CONF_DEVICE_OPTIONS:
 799                 if (!cg)
 800                         return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
 801                 if (!devc)
 802                         return SR_ERR_ARG;
 803                 if (cg == devc->digital_group) {
 804                         *data = std_gvar_array_u32(NULL, 0);
 805                         return SR_OK;
 806                 } else {
 807                         if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
 808                                 return SR_ERR_ARG;
 809                         *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
 810                         return SR_OK;
 811                 }
 812                 break;
 813         case SR_CONF_COUPLING:
 814                 if (!cg)
 815                         return SR_ERR_CHANNEL_GROUP;
 816                 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
 817                 break;
 818         case SR_CONF_PROBE_FACTOR:
 819                 if (!cg)
 820                         return SR_ERR_CHANNEL_GROUP;
 821                 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
 822                 break;
 823         case SR_CONF_VDIV:
 824                 if (!devc)
 825                         /* Can't know this until we have the exact model. */
 826                         return SR_ERR_ARG;
 827                 if (!cg)
 828                         return SR_ERR_CHANNEL_GROUP;
 829                 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
 830                 break;
 831         case SR_CONF_TIMEBASE:
 832                 if (!devc)
 833                         /* Can't know this until we have the exact model. */
 834                         return SR_ERR_ARG;
 835                 if (devc->num_timebases <= 0)
 836                         return SR_ERR_NA;
 837                 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
 838                 break;
 839         case SR_CONF_TRIGGER_SOURCE:
 840                 if (!devc)
 841                         /* Can't know this until we have the exact model. */
 842                         return SR_ERR_ARG;
 843                 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
 844                 break;
 845         case SR_CONF_TRIGGER_SLOPE:
 846                 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
 847                 break;
 848         case SR_CONF_DATA_SOURCE:
 849                 if (!devc)
 850                         /* Can't know this until we have the exact model. */
 851                         return SR_ERR_ARG;
 852                 switch (devc->model->series->protocol) {
 853                 case PROTOCOL_V1:
 854                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
 855                         break;
 856                 case PROTOCOL_V2:
 857                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
 858                         break;
 859                 default:
 860                         *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
 861                         break;
 862                 }
 863                 break;
 864         default:
 865                 return SR_ERR_NA;
 866         }
 867
 868         return SR_OK;
 869 }
 870
 871 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 872 {
 873         struct sr_scpi_dev_inst *scpi;
 874         struct dev_context *devc;
 875         struct sr_channel *ch;
 876         gboolean some_digital;
 877         GSList *l;
 878         char *cmd;
 879
 880         scpi = sdi->conn;
 881         devc = sdi->priv;
 882
 883         devc->num_frames = 0;
 884         devc->num_frames_segmented = 0;
 885
 886         some_digital = FALSE;
 887         for (l = sdi->channels; l; l = l->next) {
 888                 ch = l->data;
 889                 sr_dbg("handling channel %s", ch->name);
 890                 if (ch->type == SR_CHANNEL_ANALOG) {
 891                         if (ch->enabled)
 892                                 devc->enabled_channels = g_slist_append(
 893                                                 devc->enabled_channels, ch);
 894                         if (ch->enabled != devc->analog_channels[ch->index]) {
 895                                 /* Enabled channel is currently disabled, or vice versa. */
 896                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
 897                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
 898                                         return SR_ERR;
 899                                 devc->analog_channels[ch->index] = ch->enabled;
 900                         }
 901                 } else if (ch->type == SR_CHANNEL_LOGIC) {
 902                         /* Only one list entry for older protocols. All channels are
 903                          * retrieved together when this entry is processed. */
 904                         if (ch->enabled && (
 905                                                 devc->model->series->protocol > PROTOCOL_V3 ||
 906                                                 !some_digital))
 907                                 devc->enabled_channels = g_slist_append(
 908                                                 devc->enabled_channels, ch);
 909                         if (ch->enabled) {
 910                                 some_digital = TRUE;
 911                                 /* Turn on LA module if currently off. */
 912                                 if (!devc->la_enabled) {
 913                                         if (rigol_ds_config_set(sdi,
 914                                                         devc->model->series->protocol >= PROTOCOL_V3 ?
 915                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
 916                                                 return SR_ERR;
 917                                         devc->la_enabled = TRUE;
 918                                 }
 919                         }
 920                         if (ch->enabled != devc->digital_channels[ch->index]) {
 921                                 /* Enabled channel is currently disabled, or vice versa. */
 922                                 if (devc->model->series->protocol >= PROTOCOL_V5)
 923                                         cmd = ":LA:DISP D%d,%s";
 924                                 else if (devc->model->series->protocol >= PROTOCOL_V3)
 925                                         cmd = ":LA:DIG%d:DISP %s";
 926                                 else
 927                                         cmd = ":DIG%d:TURN %s";
 928
 929                                 if (rigol_ds_config_set(sdi, cmd, ch->index,
 930                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
 931                                         return SR_ERR;
 932                                 devc->digital_channels[ch->index] = ch->enabled;
 933                         }
 934                 }
 935         }
 936
 937         if (!devc->enabled_channels)
 938                 return SR_ERR;
 939
 940         /* Turn off LA module if on and no digital channels selected. */
 941         if (devc->la_enabled && !some_digital)
 942                 if (rigol_ds_config_set(sdi,
 943                                 devc->model->series->protocol >= PROTOCOL_V3 ?
 944                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
 945                         return SR_ERR;
 946
 947         /* Set memory mode. */
 948         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
 949                 switch (devc->model->series->protocol) {
 950                 case PROTOCOL_V4:
 951                 {
 952                         int frames = 0;
 953                         sr_scpi_get_int(sdi->conn, "FUNC:WREP:FEND?", &frames);
 954                         if (frames <= 0) {
 955                                 sr_err("No segmented data available");
 956                                 return SR_ERR;
 957                         }
 958                         devc->num_frames_segmented = frames;
 959                         break;
 960                 }
 961                 case PROTOCOL_V5:
 962                         /* The frame limit has to be read on the fly, just set up
 963                          * reading of the first frame */
 964                         if (rigol_ds_config_set(sdi, "REC:CURR 1") != SR_OK)
 965                                 return SR_ERR;
 966                         break;
 967                 default:
 968                         sr_err("Data source 'Segmented' not yet supported");
 969                         return SR_ERR;
 970                 }
 971         }
 972
 973         devc->analog_frame_size = analog_frame_size(sdi);
 974         devc->digital_frame_size = digital_frame_size(sdi);
 975
 976         switch (devc->model->series->protocol) {
 977         case PROTOCOL_V2:
 978                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
 979                         return SR_ERR;
 980                 break;
 981         case PROTOCOL_V3:
 982                 /* Apparently for the DS2000 the memory
 983                  * depth can only be set in Running state -
 984                  * this matches the behaviour of the UI. */
 985                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 986                         return SR_ERR;
 987                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
 988                                         devc->analog_frame_size) != SR_OK)
 989                         return SR_ERR;
 990                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 991                         return SR_ERR;
 992                 break;
 993         default:
 994                 break;
 995         }
 996
 997         if (devc->data_source == DATA_SOURCE_LIVE)
 998                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 999                         return SR_ERR;
1000
1001         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1002                         rigol_ds_receive, (void *)sdi);
1003
1004         std_session_send_df_header(sdi);
1005
1006         devc->channel_entry = devc->enabled_channels;
1007
1008         if (devc->data_source == DATA_SOURCE_LIVE)
1009                 devc->sample_rate = analog_frame_size(sdi) /
1010                         (devc->timebase * devc->model->series->num_horizontal_divs);
1011         else {
1012                 float xinc;
1013                 if (devc->model->series->protocol >= PROTOCOL_V3 &&
1014                                 sr_scpi_get_float(sdi->conn, "WAV:XINC?", &xinc) != SR_OK) {
1015                         sr_err("Couldn't get sampling rate");
1016                         return SR_ERR;
1017                 }
1018                 devc->sample_rate = 1. / xinc;
1019         }
1020
1021
1022         if (rigol_ds_capture_start(sdi) != SR_OK)
1023                 return SR_ERR;
1024
1025         /* Start of first frame. */
1026         std_session_send_df_frame_begin(sdi);
1027
1028         return SR_OK;
1029 }
1030
1031 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1032 {
1033         struct dev_context *devc;
1034         struct sr_scpi_dev_inst *scpi;
1035
1036         devc = sdi->priv;
1037
1038         std_session_send_df_end(sdi);
1039
1040         g_slist_free(devc->enabled_channels);
1041         devc->enabled_channels = NULL;
1042         scpi = sdi->conn;
1043         sr_scpi_source_remove(sdi->session, scpi);
1044
1045         return SR_OK;
1046 }
1047
1048 static struct sr_dev_driver rigol_ds_driver_info = {
1049         .name = "rigol-ds",
1050         .longname = "Rigol DS",
1051         .api_version = 1,
1052         .init = std_init,
1053         .cleanup = std_cleanup,
1054         .scan = scan,
1055         .dev_list = std_dev_list,
1056         .dev_clear = dev_clear,
1057         .config_get = config_get,
1058         .config_set = config_set,
1059         .config_list = config_list,
1060         .dev_open = dev_open,
1061         .dev_close = dev_close,
1062         .dev_acquisition_start = dev_acquisition_start,
1063         .dev_acquisition_stop = dev_acquisition_stop,
1064         .context = NULL,
1065 };
1066 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);