]> sigrok.org Git - libsigrok.git/blob - src/hardware/rigol-ds/api.c
rigol-ds: Add model entries for MSO2000A series.
[libsigrok.git] / src / hardware / rigol-ds / api.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7  *
8  * This program is free software: you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation, either version 3 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20  */
21
22 #include <config.h>
23 #include <fcntl.h>
24 #include <unistd.h>
25 #include <stdlib.h>
26 #include <string.h>
27 #include <strings.h>
28 #include <math.h>
29 #include <glib.h>
30 #include <libsigrok/libsigrok.h>
31 #include "libsigrok-internal.h"
32 #include "scpi.h"
33 #include "protocol.h"
34
35 static const uint32_t scanopts[] = {
36         SR_CONF_CONN,
37         SR_CONF_SERIALCOMM
38 };
39
40 static const uint32_t drvopts[] = {
41         SR_CONF_OSCILLOSCOPE,
42 };
43
44 static const uint32_t devopts[] = {
45         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46         SR_CONF_SAMPLERATE | SR_CONF_GET,
47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48         SR_CONF_NUM_HDIV | SR_CONF_GET,
49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 };
55
56 static const uint32_t analog_devopts[] = {
57         SR_CONF_NUM_VDIV | SR_CONF_GET,
58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61 };
62
63 static const uint64_t timebases[][2] = {
64         /* nanoseconds */
65         { 1, 1000000000 },
66         { 2, 1000000000 },
67         { 5, 1000000000 },
68         { 10, 1000000000 },
69         { 20, 1000000000 },
70         { 50, 1000000000 },
71         { 100, 1000000000 },
72         { 500, 1000000000 },
73         /* microseconds */
74         { 1, 1000000 },
75         { 2, 1000000 },
76         { 5, 1000000 },
77         { 10, 1000000 },
78         { 20, 1000000 },
79         { 50, 1000000 },
80         { 100, 1000000 },
81         { 200, 1000000 },
82         { 500, 1000000 },
83         /* milliseconds */
84         { 1, 1000 },
85         { 2, 1000 },
86         { 5, 1000 },
87         { 10, 1000 },
88         { 20, 1000 },
89         { 50, 1000 },
90         { 100, 1000 },
91         { 200, 1000 },
92         { 500, 1000 },
93         /* seconds */
94         { 1, 1 },
95         { 2, 1 },
96         { 5, 1 },
97         { 10, 1 },
98         { 20, 1 },
99         { 50, 1 },
100         { 100, 1 },
101         { 200, 1 },
102         { 500, 1 },
103         { 1000, 1 },
104 };
105
106 static const uint64_t vdivs[][2] = {
107         /* microvolts */
108         { 500, 1000000 },
109         /* millivolts */
110         { 1, 1000 },
111         { 2, 1000 },
112         { 5, 1000 },
113         { 10, 1000 },
114         { 20, 1000 },
115         { 50, 1000 },
116         { 100, 1000 },
117         { 200, 1000 },
118         { 500, 1000 },
119         /* volts */
120         { 1, 1 },
121         { 2, 1 },
122         { 5, 1 },
123         { 10, 1 },
124         { 20, 1 },
125         { 50, 1 },
126         { 100, 1 },
127 };
128
129 #define NUM_TIMEBASE  ARRAY_SIZE(timebases)
130 #define NUM_VDIV      ARRAY_SIZE(vdivs)
131
132 static const char *trigger_sources[] = {
133         "CH1",
134         "CH2",
135         "CH3",
136         "CH4",
137         "EXT",
138         "AC Line",
139         "D0",
140         "D1",
141         "D2",
142         "D3",
143         "D4",
144         "D5",
145         "D6",
146         "D7",
147         "D8",
148         "D9",
149         "D10",
150         "D11",
151         "D12",
152         "D13",
153         "D14",
154         "D15",
155 };
156
157 static const char *trigger_slopes[] = {
158         "r",
159         "f",
160 };
161
162 static const char *coupling[] = {
163         "AC",
164         "DC",
165         "GND",
166 };
167
168 static const uint64_t probe_factor[] = {
169         1,
170         2,
171         5,
172         10,
173         20,
174         50,
175         100,
176         200,
177         500,
178         1000,
179 };
180
181 /* Do not change the order of entries */
182 static const char *data_sources[] = {
183         "Live",
184         "Memory",
185         "Segmented",
186 };
187
188 enum vendor {
189         RIGOL,
190         AGILENT,
191 };
192
193 enum series {
194         VS5000,
195         DS1000,
196         DS2000,
197         DS2000A,
198         DSO1000,
199         DS1000Z,
200 };
201
202 /* short name, full name */
203 static const struct rigol_ds_vendor supported_vendors[] = {
204         [RIGOL] = {"Rigol", "Rigol Technologies"},
205         [AGILENT] = {"Agilent", "Agilent Technologies"},
206 };
207
208 #define VENDOR(x) &supported_vendors[x]
209 /* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
210  * live waveform samples, memory buffer samples */
211 static const struct rigol_ds_series supported_series[] = {
212         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
213                 {50, 1}, {2, 1000}, 14, 2048, 0},
214         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
215                 {50, 1}, {2, 1000}, 12, 600, 1048576},
216         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
217                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
218         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
219                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
220         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
221                 {50, 1}, {2, 1000}, 12, 600, 20480},
222         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
223                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
224 };
225
226 #define SERIES(x) &supported_series[x]
227 /* series, model, min timebase, analog channels, digital */
228 static const struct rigol_ds_model supported_models[] = {
229         {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
230         {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
231         {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
232         {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
233         {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
234         {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
235         {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
236         {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
237         {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
238         {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
239         {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
240         {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
241         {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
242         {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
243         {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
244         {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
245         {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
246         {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
247         {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
248         {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
249         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
250         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
251         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
252         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
253         {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
254         {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
255         {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
256         {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
257         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
258         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
259         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
260         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
261         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
262         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
263         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
264         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
265         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
266         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
267         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
268         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
269         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
270         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
271         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
272         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
273         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
274 };
275
276 static struct sr_dev_driver rigol_ds_driver_info;
277
278 static void clear_helper(void *priv)
279 {
280         struct dev_context *devc;
281         unsigned int i;
282
283         devc = priv;
284         g_free(devc->data);
285         g_free(devc->buffer);
286         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
287                 g_free(devc->coupling[i]);
288         g_free(devc->trigger_source);
289         g_free(devc->trigger_slope);
290         g_free(devc->analog_groups);
291         g_free(devc);
292 }
293
294 static int dev_clear(const struct sr_dev_driver *di)
295 {
296         return std_dev_clear(di, clear_helper);
297 }
298
299 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
300 {
301         struct dev_context *devc;
302         struct sr_dev_inst *sdi;
303         struct sr_scpi_hw_info *hw_info;
304         struct sr_channel *ch;
305         long n[3];
306         unsigned int i;
307         const struct rigol_ds_model *model = NULL;
308         gchar *channel_name, **version;
309
310         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
311                 sr_info("Couldn't get IDN response, retrying.");
312                 sr_scpi_close(scpi);
313                 sr_scpi_open(scpi);
314                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
315                         sr_info("Couldn't get IDN response.");
316                         return NULL;
317                 }
318         }
319
320         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
321                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
322                                         supported_models[i].series->vendor->full_name) &&
323                                 !strcmp(hw_info->model, supported_models[i].name)) {
324                         model = &supported_models[i];
325                         break;
326                 }
327         }
328
329         if (!model) {
330                 sr_scpi_hw_info_free(hw_info);
331                 return NULL;
332         }
333
334         sdi = g_malloc0(sizeof(struct sr_dev_inst));
335         sdi->vendor = g_strdup(model->series->vendor->name);
336         sdi->model = g_strdup(model->name);
337         sdi->version = g_strdup(hw_info->firmware_version);
338         sdi->conn = scpi;
339         sdi->driver = &rigol_ds_driver_info;
340         sdi->inst_type = SR_INST_SCPI;
341         sdi->serial_num = g_strdup(hw_info->serial_number);
342         devc = g_malloc0(sizeof(struct dev_context));
343         devc->limit_frames = 0;
344         devc->model = model;
345         devc->format = model->series->format;
346
347         /* DS1000 models with firmware before 0.2.4 used the old data format. */
348         if (model->series == SERIES(DS1000)) {
349                 version = g_strsplit(hw_info->firmware_version, ".", 0);
350                 do {
351                         if (!version[0] || !version[1] || !version[2])
352                                 break;
353                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
354                                 break;
355                         for (i = 0; i < 3; i++) {
356                                 if (sr_atol(version[i], &n[i]) != SR_OK)
357                                         break;
358                         }
359                         if (i != 3)
360                                 break;
361                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
362                         if (scpi->firmware_version < 24) {
363                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
364                                 devc->format = FORMAT_RAW;
365                         }
366                         break;
367                 } while (0);
368                 g_strfreev(version);
369         }
370
371         sr_scpi_hw_info_free(hw_info);
372
373         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
374                                         model->analog_channels);
375
376         for (i = 0; i < model->analog_channels; i++) {
377                 channel_name = g_strdup_printf("CH%d", i + 1);
378                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
379
380                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
381
382                 devc->analog_groups[i]->name = channel_name;
383                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
384                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
385                                 devc->analog_groups[i]);
386         }
387
388         if (devc->model->has_digital) {
389                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
390
391                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
392                         channel_name = g_strdup_printf("D%d", i);
393                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
394                         g_free(channel_name);
395                         devc->digital_group->channels = g_slist_append(
396                                         devc->digital_group->channels, ch);
397                 }
398                 devc->digital_group->name = g_strdup("LA");
399                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
400                                 devc->digital_group);
401         }
402
403         for (i = 0; i < NUM_TIMEBASE; i++) {
404                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
405                         devc->timebases = &timebases[i];
406                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
407                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
408         }
409
410         for (i = 0; i < NUM_VDIV; i++) {
411                 if (!memcmp(&devc->model->series->min_vdiv,
412                                         &vdivs[i], sizeof(uint64_t[2]))) {
413                         devc->vdivs = &vdivs[i];
414                         devc->num_vdivs = NUM_VDIV - i;
415                 }
416         }
417
418         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
419         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
420
421         devc->data_source = DATA_SOURCE_LIVE;
422
423         sdi->priv = devc;
424
425         return sdi;
426 }
427
428 static GSList *scan(struct sr_dev_driver *di, GSList *options)
429 {
430         return sr_scpi_scan(di->context, options, probe_device);
431 }
432
433 static int dev_open(struct sr_dev_inst *sdi)
434 {
435         int ret;
436         struct sr_scpi_dev_inst *scpi = sdi->conn;
437
438         if ((ret = sr_scpi_open(scpi)) < 0) {
439                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
440                 return SR_ERR;
441         }
442
443         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
444                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
445                 return SR_ERR;
446         }
447
448         sdi->status = SR_ST_ACTIVE;
449
450         return SR_OK;
451 }
452
453 static int dev_close(struct sr_dev_inst *sdi)
454 {
455         struct sr_scpi_dev_inst *scpi;
456         struct dev_context *devc;
457
458         if (sdi->status != SR_ST_ACTIVE)
459                 return SR_ERR_DEV_CLOSED;
460
461         scpi = sdi->conn;
462         devc = sdi->priv;
463
464         if (devc->model->series->protocol == PROTOCOL_V2)
465                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
466
467         if (scpi) {
468                 if (sr_scpi_close(scpi) < 0)
469                         return SR_ERR;
470                 sdi->status = SR_ST_INACTIVE;
471         }
472
473         return SR_OK;
474 }
475
476 static int analog_frame_size(const struct sr_dev_inst *sdi)
477 {
478         struct dev_context *devc = sdi->priv;
479         struct sr_channel *ch;
480         int analog_channels = 0;
481         GSList *l;
482
483         for (l = sdi->channels; l; l = l->next) {
484                 ch = l->data;
485                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
486                         analog_channels++;
487         }
488
489         if (analog_channels == 0)
490                 return 0;
491
492         switch (devc->data_source) {
493         case DATA_SOURCE_LIVE:
494                 return devc->model->series->live_samples;
495         case DATA_SOURCE_MEMORY:
496                 return devc->model->series->buffer_samples / analog_channels;
497         default:
498                 return 0;
499         }
500 }
501
502 static int digital_frame_size(const struct sr_dev_inst *sdi)
503 {
504         struct dev_context *devc = sdi->priv;
505
506         switch (devc->data_source) {
507         case DATA_SOURCE_LIVE:
508                 return devc->model->series->live_samples * 2;
509         case DATA_SOURCE_MEMORY:
510                 return devc->model->series->buffer_samples * 2;
511         default:
512                 return 0;
513         }
514 }
515
516 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
517                 const struct sr_channel_group *cg)
518 {
519         struct dev_context *devc;
520         struct sr_channel *ch;
521         const char *tmp_str;
522         uint64_t samplerate;
523         int analog_channel = -1;
524         float smallest_diff = INFINITY;
525         int idx = -1;
526         unsigned i;
527
528         if (!sdi)
529                 return SR_ERR_ARG;
530
531         devc = sdi->priv;
532
533         /* If a channel group is specified, it must be a valid one. */
534         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
535                 sr_err("Invalid channel group specified.");
536                 return SR_ERR;
537         }
538
539         if (cg) {
540                 ch = g_slist_nth_data(cg->channels, 0);
541                 if (!ch)
542                         return SR_ERR;
543                 if (ch->type == SR_CHANNEL_ANALOG) {
544                         if (ch->name[2] < '1' || ch->name[2] > '4')
545                                 return SR_ERR;
546                         analog_channel = ch->name[2] - '1';
547                 }
548         }
549
550         switch (key) {
551         case SR_CONF_NUM_HDIV:
552                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
553                 break;
554         case SR_CONF_NUM_VDIV:
555                 *data = g_variant_new_int32(devc->num_vdivs);
556                 break;
557         case SR_CONF_DATA_SOURCE:
558                 if (devc->data_source == DATA_SOURCE_LIVE)
559                         *data = g_variant_new_string("Live");
560                 else if (devc->data_source == DATA_SOURCE_MEMORY)
561                         *data = g_variant_new_string("Memory");
562                 else
563                         *data = g_variant_new_string("Segmented");
564                 break;
565         case SR_CONF_SAMPLERATE:
566                 if (devc->data_source == DATA_SOURCE_LIVE) {
567                         samplerate = analog_frame_size(sdi) /
568                                 (devc->timebase * devc->model->series->num_horizontal_divs);
569                         *data = g_variant_new_uint64(samplerate);
570                 } else {
571                         sr_dbg("Unknown data source: %d.", devc->data_source);
572                         return SR_ERR_NA;
573                 }
574                 break;
575         case SR_CONF_TRIGGER_SOURCE:
576                 if (!strcmp(devc->trigger_source, "ACL"))
577                         tmp_str = "AC Line";
578                 else if (!strcmp(devc->trigger_source, "CHAN1"))
579                         tmp_str = "CH1";
580                 else if (!strcmp(devc->trigger_source, "CHAN2"))
581                         tmp_str = "CH2";
582                 else if (!strcmp(devc->trigger_source, "CHAN3"))
583                         tmp_str = "CH3";
584                 else if (!strcmp(devc->trigger_source, "CHAN4"))
585                         tmp_str = "CH4";
586                 else
587                         tmp_str = devc->trigger_source;
588                 *data = g_variant_new_string(tmp_str);
589                 break;
590         case SR_CONF_TRIGGER_SLOPE:
591                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
592                         tmp_str = "r";
593                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
594                         tmp_str = "f";
595                 } else {
596                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
597                         return SR_ERR_NA;
598                 }
599                 *data = g_variant_new_string(tmp_str);
600                 break;
601         case SR_CONF_TRIGGER_LEVEL:
602                 *data = g_variant_new_double(devc->trigger_level);
603                 break;
604         case SR_CONF_TIMEBASE:
605                 for (i = 0; i < devc->num_timebases; i++) {
606                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
607                         float diff = fabs(devc->timebase - tb);
608                         if (diff < smallest_diff) {
609                                 smallest_diff = diff;
610                                 idx = i;
611                         }
612                 }
613                 if (idx < 0) {
614                         sr_dbg("Negative timebase index: %d.", idx);
615                         return SR_ERR_NA;
616                 }
617                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
618                                               devc->timebases[idx][1]);
619                 break;
620         case SR_CONF_VDIV:
621                 if (analog_channel < 0) {
622                         sr_dbg("Negative analog channel: %d.", analog_channel);
623                         return SR_ERR_NA;
624                 }
625                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
626                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
627                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
628                         if (diff < smallest_diff) {
629                                 smallest_diff = diff;
630                                 idx = i;
631                         }
632                 }
633                 if (idx < 0) {
634                         sr_dbg("Negative vdiv index: %d.", idx);
635                         return SR_ERR_NA;
636                 }
637                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
638                 break;
639         case SR_CONF_COUPLING:
640                 if (analog_channel < 0) {
641                         sr_dbg("Negative analog channel: %d.", analog_channel);
642                         return SR_ERR_NA;
643                 }
644                 *data = g_variant_new_string(devc->coupling[analog_channel]);
645                 break;
646         case SR_CONF_PROBE_FACTOR:
647                 if (analog_channel < 0) {
648                         sr_dbg("Negative analog channel: %d.", analog_channel);
649                         return SR_ERR_NA;
650                 }
651                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
652                 break;
653         default:
654                 return SR_ERR_NA;
655         }
656
657         return SR_OK;
658 }
659
660 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
661                 const struct sr_channel_group *cg)
662 {
663         struct dev_context *devc;
664         uint64_t p, q;
665         double t_dbl;
666         unsigned int i, j;
667         int ret;
668         const char *tmp_str;
669         char buffer[16];
670
671         devc = sdi->priv;
672
673         if (sdi->status != SR_ST_ACTIVE)
674                 return SR_ERR_DEV_CLOSED;
675
676         /* If a channel group is specified, it must be a valid one. */
677         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
678                 sr_err("Invalid channel group specified.");
679                 return SR_ERR;
680         }
681
682         ret = SR_OK;
683         switch (key) {
684         case SR_CONF_LIMIT_FRAMES:
685                 devc->limit_frames = g_variant_get_uint64(data);
686                 break;
687         case SR_CONF_TRIGGER_SLOPE:
688                 tmp_str = g_variant_get_string(data, NULL);
689
690                 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
691                         sr_err("Unknown trigger slope: '%s'.",
692                                (tmp_str) ? tmp_str : "NULL");
693                         return SR_ERR_ARG;
694                 }
695
696                 g_free(devc->trigger_slope);
697                 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
698                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
699                 break;
700         case SR_CONF_HORIZ_TRIGGERPOS:
701                 t_dbl = g_variant_get_double(data);
702                 if (t_dbl < 0.0 || t_dbl > 1.0) {
703                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
704                         return SR_ERR;
705                 }
706                 devc->horiz_triggerpos = t_dbl;
707                 /* We have the trigger offset as a percentage of the frame, but
708                  * need to express this in seconds. */
709                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
710                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
711                 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
712                 break;
713         case SR_CONF_TRIGGER_LEVEL:
714                 t_dbl = g_variant_get_double(data);
715                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
716                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
717                 if (ret == SR_OK)
718                         devc->trigger_level = t_dbl;
719                 break;
720         case SR_CONF_TIMEBASE:
721                 g_variant_get(data, "(tt)", &p, &q);
722                 for (i = 0; i < devc->num_timebases; i++) {
723                         if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
724                                 devc->timebase = (float)p / q;
725                                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
726                                                 devc->timebase);
727                                 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
728                                 break;
729                         }
730                 }
731                 if (i == devc->num_timebases) {
732                         sr_err("Invalid timebase index: %d.", i);
733                         ret = SR_ERR_ARG;
734                 }
735                 break;
736         case SR_CONF_TRIGGER_SOURCE:
737                 tmp_str = g_variant_get_string(data, NULL);
738                 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
739                         if (!strcmp(trigger_sources[i], tmp_str)) {
740                                 g_free(devc->trigger_source);
741                                 devc->trigger_source = g_strdup(trigger_sources[i]);
742                                 if (!strcmp(devc->trigger_source, "AC Line"))
743                                         tmp_str = "ACL";
744                                 else if (!strcmp(devc->trigger_source, "CH1"))
745                                         tmp_str = "CHAN1";
746                                 else if (!strcmp(devc->trigger_source, "CH2"))
747                                         tmp_str = "CHAN2";
748                                 else if (!strcmp(devc->trigger_source, "CH3"))
749                                         tmp_str = "CHAN3";
750                                 else if (!strcmp(devc->trigger_source, "CH4"))
751                                         tmp_str = "CHAN4";
752                                 else
753                                         tmp_str = (char *)devc->trigger_source;
754                                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
755                                 break;
756                         }
757                 }
758                 if (i == ARRAY_SIZE(trigger_sources)) {
759                         sr_err("Invalid trigger source index: %d.", i);
760                         ret = SR_ERR_ARG;
761                 }
762                 break;
763         case SR_CONF_VDIV:
764                 if (!cg) {
765                         sr_err("No channel group specified.");
766                         return SR_ERR_CHANNEL_GROUP;
767                 }
768                 g_variant_get(data, "(tt)", &p, &q);
769                 for (i = 0; i < devc->model->analog_channels; i++) {
770                         if (cg == devc->analog_groups[i]) {
771                                 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
772                                         if (vdivs[j][0] != p || vdivs[j][1] != q)
773                                                 continue;
774                                         devc->vdiv[i] = (float)p / q;
775                                         g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
776                                                         devc->vdiv[i]);
777                                         return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
778                                                         buffer);
779                                 }
780                                 sr_err("Invalid vdiv index: %d.", j);
781                                 return SR_ERR_ARG;
782                         }
783                 }
784                 sr_dbg("Didn't set vdiv, unknown channel(group).");
785                 return SR_ERR_NA;
786         case SR_CONF_COUPLING:
787                 if (!cg) {
788                         sr_err("No channel group specified.");
789                         return SR_ERR_CHANNEL_GROUP;
790                 }
791                 tmp_str = g_variant_get_string(data, NULL);
792                 for (i = 0; i < devc->model->analog_channels; i++) {
793                         if (cg == devc->analog_groups[i]) {
794                                 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
795                                         if (!strcmp(tmp_str, coupling[j])) {
796                                                 g_free(devc->coupling[i]);
797                                                 devc->coupling[i] = g_strdup(coupling[j]);
798                                                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
799                                                                 devc->coupling[i]);
800                                         }
801                                 }
802                                 sr_err("Invalid coupling index: %d.", j);
803                                 return SR_ERR_ARG;
804                         }
805                 }
806                 sr_dbg("Didn't set coupling, unknown channel(group).");
807                 return SR_ERR_NA;
808         case SR_CONF_PROBE_FACTOR:
809                 if (!cg) {
810                         sr_err("No channel group specified.");
811                         return SR_ERR_CHANNEL_GROUP;
812                 }
813                 p = g_variant_get_uint64(data);
814                 for (i = 0; i < devc->model->analog_channels; i++) {
815                         if (cg == devc->analog_groups[i]) {
816                                 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
817                                         if (p == probe_factor[j]) {
818                                                 devc->attenuation[i] = p;
819                                                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
820                                                                           i + 1, p);
821                                                 if (ret == SR_OK)
822                                                         rigol_ds_get_dev_cfg_vertical(sdi);
823                                                 return ret;
824                                         }
825                                 }
826                                 sr_err("Invalid probe factor: %"PRIu64".", p);
827                                 return SR_ERR_ARG;
828                         }
829                 }
830                 sr_dbg("Didn't set probe factor, unknown channel(group).");
831                 return SR_ERR_NA;
832         case SR_CONF_DATA_SOURCE:
833                 tmp_str = g_variant_get_string(data, NULL);
834                 if (!strcmp(tmp_str, "Live"))
835                         devc->data_source = DATA_SOURCE_LIVE;
836                 else if (devc->model->series->protocol >= PROTOCOL_V2
837                         && !strcmp(tmp_str, "Memory"))
838                         devc->data_source = DATA_SOURCE_MEMORY;
839                 else if (devc->model->series->protocol >= PROTOCOL_V3
840                          && !strcmp(tmp_str, "Segmented"))
841                         devc->data_source = DATA_SOURCE_SEGMENTED;
842                 else {
843                         sr_err("Unknown data source: '%s'.", tmp_str);
844                         return SR_ERR;
845                 }
846                 break;
847         default:
848                 return SR_ERR_NA;
849         }
850
851         return ret;
852 }
853
854 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
855                 const struct sr_channel_group *cg)
856 {
857         GVariant *tuple, *rational[2];
858         GVariantBuilder gvb;
859         unsigned int i;
860         struct dev_context *devc = NULL;
861
862         /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or channel group. */
863         if (key == SR_CONF_SCAN_OPTIONS) {
864                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
865                                 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
866                 return SR_OK;
867         }
868
869         /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
870         if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
871                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
872                                 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
873                 return SR_OK;
874         }
875
876         /* Every other option requires a valid device instance. */
877         if (!sdi)
878                 return SR_ERR_ARG;
879         devc = sdi->priv;
880
881         /* If a channel group is specified, it must be a valid one. */
882         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
883                 sr_err("Invalid channel group specified.");
884                 return SR_ERR;
885         }
886
887         switch (key) {
888         case SR_CONF_DEVICE_OPTIONS:
889                 if (!cg) {
890                         /* If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
891                          * specific to a channel group must be returned. */
892                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
893                                         devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
894                         return SR_OK;
895                 }
896                 if (cg == devc->digital_group) {
897                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
898                                 NULL, 0, sizeof(uint32_t));
899                         return SR_OK;
900                 } else {
901                         for (i = 0; i < devc->model->analog_channels; i++) {
902                                 if (cg == devc->analog_groups[i]) {
903                                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
904                                                 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
905                                         return SR_OK;
906                                 }
907                         }
908                         return SR_ERR_NA;
909                 }
910                 break;
911         case SR_CONF_COUPLING:
912                 if (!cg) {
913                         sr_err("No channel group specified.");
914                         return SR_ERR_CHANNEL_GROUP;
915                 }
916                 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
917                 break;
918         case SR_CONF_PROBE_FACTOR:
919                 if (!cg) {
920                         sr_err("No channel group specified.");
921                         return SR_ERR_CHANNEL_GROUP;
922                 }
923                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
924                         probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
925                 break;
926         case SR_CONF_VDIV:
927                 if (!devc)
928                         /* Can't know this until we have the exact model. */
929                         return SR_ERR_ARG;
930                 if (!cg) {
931                         sr_err("No channel group specified.");
932                         return SR_ERR_CHANNEL_GROUP;
933                 }
934                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
935                 for (i = 0; i < devc->num_vdivs; i++) {
936                         rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
937                         rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
938                         tuple = g_variant_new_tuple(rational, 2);
939                         g_variant_builder_add_value(&gvb, tuple);
940                 }
941                 *data = g_variant_builder_end(&gvb);
942                 break;
943         case SR_CONF_TIMEBASE:
944                 if (!devc)
945                         /* Can't know this until we have the exact model. */
946                         return SR_ERR_ARG;
947                 if (devc->num_timebases <= 0)
948                         return SR_ERR_NA;
949                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
950                 for (i = 0; i < devc->num_timebases; i++) {
951                         rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
952                         rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
953                         tuple = g_variant_new_tuple(rational, 2);
954                         g_variant_builder_add_value(&gvb, tuple);
955                 }
956                 *data = g_variant_builder_end(&gvb);
957                 break;
958         case SR_CONF_TRIGGER_SOURCE:
959                 if (!devc)
960                         /* Can't know this until we have the exact model. */
961                         return SR_ERR_ARG;
962                 *data = g_variant_new_strv(trigger_sources,
963                                 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
964                 break;
965         case SR_CONF_TRIGGER_SLOPE:
966                 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
967                 break;
968         case SR_CONF_DATA_SOURCE:
969                 if (!devc)
970                         /* Can't know this until we have the exact model. */
971                         return SR_ERR_ARG;
972                 switch (devc->model->series->protocol) {
973                 case PROTOCOL_V1:
974                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
975                         break;
976                 case PROTOCOL_V2:
977                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
978                         break;
979                 default:
980                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
981                         break;
982                 }
983                 break;
984         default:
985                 return SR_ERR_NA;
986         }
987
988         return SR_OK;
989 }
990
991 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
992 {
993         struct sr_scpi_dev_inst *scpi;
994         struct dev_context *devc;
995         struct sr_channel *ch;
996         struct sr_datafeed_packet packet;
997         gboolean some_digital;
998         GSList *l;
999
1000         if (sdi->status != SR_ST_ACTIVE)
1001                 return SR_ERR_DEV_CLOSED;
1002
1003         scpi = sdi->conn;
1004         devc = sdi->priv;
1005
1006         devc->num_frames = 0;
1007
1008         some_digital = FALSE;
1009         for (l = sdi->channels; l; l = l->next) {
1010                 ch = l->data;
1011                 sr_dbg("handling channel %s", ch->name);
1012                 if (ch->type == SR_CHANNEL_ANALOG) {
1013                         if (ch->enabled)
1014                                 devc->enabled_channels = g_slist_append(
1015                                                 devc->enabled_channels, ch);
1016                         if (ch->enabled != devc->analog_channels[ch->index]) {
1017                                 /* Enabled channel is currently disabled, or vice versa. */
1018                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
1019                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
1020                                         return SR_ERR;
1021                                 devc->analog_channels[ch->index] = ch->enabled;
1022                         }
1023                 } else if (ch->type == SR_CHANNEL_LOGIC) {
1024                         /* Only one list entry for DS1000D series. All channels are retrieved
1025                          * together when this entry is processed. */
1026                         if (ch->enabled && (
1027                                                 devc->model->series->protocol > PROTOCOL_V2 ||
1028                                                 !some_digital))
1029                                 devc->enabled_channels = g_slist_append(
1030                                                 devc->enabled_channels, ch);
1031                         if (ch->enabled) {
1032                                 some_digital = TRUE;
1033                                 /* Turn on LA module if currently off. */
1034                                 if (!devc->la_enabled) {
1035                                         if (rigol_ds_config_set(sdi,
1036                                                         devc->model->series->protocol >= PROTOCOL_V4 ?
1037                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
1038                                                 return SR_ERR;
1039                                         devc->la_enabled = TRUE;
1040                                 }
1041                         }
1042                         if (ch->enabled != devc->digital_channels[ch->index]) {
1043                                 /* Enabled channel is currently disabled, or vice versa. */
1044                                 if (rigol_ds_config_set(sdi,
1045                                                 devc->model->series->protocol >= PROTOCOL_V4 ?
1046                                                         ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
1047                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
1048                                         return SR_ERR;
1049                                 devc->digital_channels[ch->index] = ch->enabled;
1050                         }
1051                 }
1052         }
1053
1054         if (!devc->enabled_channels)
1055                 return SR_ERR;
1056
1057         /* Turn off LA module if on and no digital channels selected. */
1058         if (devc->la_enabled && !some_digital)
1059                 if (rigol_ds_config_set(sdi,
1060                                 devc->model->series->protocol >= PROTOCOL_V4 ?
1061                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1062                         return SR_ERR;
1063
1064         /* Set memory mode. */
1065         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1066                 sr_err("Data source 'Segmented' not yet supported");
1067                 return SR_ERR;
1068         }
1069
1070         devc->analog_frame_size = analog_frame_size(sdi);
1071         devc->digital_frame_size = digital_frame_size(sdi);
1072
1073         switch (devc->model->series->protocol) {
1074         case PROTOCOL_V2:
1075                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1076                         return SR_ERR;
1077                 break;
1078         case PROTOCOL_V3:
1079                 /* Apparently for the DS2000 the memory
1080                  * depth can only be set in Running state -
1081                  * this matches the behaviour of the UI. */
1082                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1083                         return SR_ERR;
1084                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1085                                         devc->analog_frame_size) != SR_OK)
1086                         return SR_ERR;
1087                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1088                         return SR_ERR;
1089                 break;
1090         default:
1091                 break;
1092         }
1093
1094         if (devc->data_source == DATA_SOURCE_LIVE)
1095                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1096                         return SR_ERR;
1097
1098         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1099                         rigol_ds_receive, (void *)sdi);
1100
1101         std_session_send_df_header(sdi);
1102
1103         devc->channel_entry = devc->enabled_channels;
1104
1105         if (rigol_ds_capture_start(sdi) != SR_OK)
1106                 return SR_ERR;
1107
1108         /* Start of first frame. */
1109         packet.type = SR_DF_FRAME_BEGIN;
1110         sr_session_send(sdi, &packet);
1111
1112         return SR_OK;
1113 }
1114
1115 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1116 {
1117         struct dev_context *devc;
1118         struct sr_scpi_dev_inst *scpi;
1119
1120         devc = sdi->priv;
1121
1122         if (sdi->status != SR_ST_ACTIVE) {
1123                 sr_err("Device inactive, can't stop acquisition.");
1124                 return SR_ERR;
1125         }
1126
1127         std_session_send_df_end(sdi);
1128
1129         g_slist_free(devc->enabled_channels);
1130         devc->enabled_channels = NULL;
1131         scpi = sdi->conn;
1132         sr_scpi_source_remove(sdi->session, scpi);
1133
1134         return SR_OK;
1135 }
1136
1137 static struct sr_dev_driver rigol_ds_driver_info = {
1138         .name = "rigol-ds",
1139         .longname = "Rigol DS",
1140         .api_version = 1,
1141         .init = std_init,
1142         .cleanup = std_cleanup,
1143         .scan = scan,
1144         .dev_list = std_dev_list,
1145         .dev_clear = dev_clear,
1146         .config_get = config_get,
1147         .config_set = config_set,
1148         .config_list = config_list,
1149         .dev_open = dev_open,
1150         .dev_close = dev_close,
1151         .dev_acquisition_start = dev_acquisition_start,
1152         .dev_acquisition_stop = dev_acquisition_stop,
1153         .context = NULL,
1154 };
1155 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);