src/hardware/rigol-ds/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <config.h>
  23 #include <fcntl.h>
  24 #include <unistd.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27 #include <strings.h>
  28 #include <math.h>
  29 #include <glib.h>
  30 #include <libsigrok/libsigrok.h>
  31 #include "libsigrok-internal.h"
  32 #include "scpi.h"
  33 #include "protocol.h"
  34
  35 static const uint32_t scanopts[] = {
  36         SR_CONF_CONN,
  37         SR_CONF_SERIALCOMM,
  38 };
  39
  40 static const uint32_t drvopts[] = {
  41         SR_CONF_OSCILLOSCOPE,
  42 };
  43
  44 static const uint32_t devopts[] = {
  45         SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
  46         SR_CONF_SAMPLERATE | SR_CONF_GET,
  47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  48         SR_CONF_NUM_HDIV | SR_CONF_GET,
  49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
  50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
  53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  54 };
  55
  56 static const uint32_t devopts_cg_analog[] = {
  57         SR_CONF_NUM_VDIV | SR_CONF_GET,
  58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  61 };
  62
  63 static const uint64_t timebases[][2] = {
  64         /* nanoseconds */
  65         { 1, 1000000000 },
  66         { 2, 1000000000 },
  67         { 5, 1000000000 },
  68         { 10, 1000000000 },
  69         { 20, 1000000000 },
  70         { 50, 1000000000 },
  71         { 100, 1000000000 },
  72         { 500, 1000000000 },
  73         /* microseconds */
  74         { 1, 1000000 },
  75         { 2, 1000000 },
  76         { 5, 1000000 },
  77         { 10, 1000000 },
  78         { 20, 1000000 },
  79         { 50, 1000000 },
  80         { 100, 1000000 },
  81         { 200, 1000000 },
  82         { 500, 1000000 },
  83         /* milliseconds */
  84         { 1, 1000 },
  85         { 2, 1000 },
  86         { 5, 1000 },
  87         { 10, 1000 },
  88         { 20, 1000 },
  89         { 50, 1000 },
  90         { 100, 1000 },
  91         { 200, 1000 },
  92         { 500, 1000 },
  93         /* seconds */
  94         { 1, 1 },
  95         { 2, 1 },
  96         { 5, 1 },
  97         { 10, 1 },
  98         { 20, 1 },
  99         { 50, 1 },
 100         { 100, 1 },
 101         { 200, 1 },
 102         { 500, 1 },
 103         { 1000, 1 },
 104 };
 105
 106 static const uint64_t vdivs[][2] = {
 107         /* microvolts */
 108         { 500, 1000000 },
 109         /* millivolts */
 110         { 1, 1000 },
 111         { 2, 1000 },
 112         { 5, 1000 },
 113         { 10, 1000 },
 114         { 20, 1000 },
 115         { 50, 1000 },
 116         { 100, 1000 },
 117         { 200, 1000 },
 118         { 500, 1000 },
 119         /* volts */
 120         { 1, 1 },
 121         { 2, 1 },
 122         { 5, 1 },
 123         { 10, 1 },
 124         { 20, 1 },
 125         { 50, 1 },
 126         { 100, 1 },
 127 };
 128
 129 static const char *trigger_sources_2_chans[] = {
 130         "CH1", "CH2",
 131         "EXT", "AC Line",
 132         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 133         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
 134 };
 135
 136 static const char *trigger_sources_4_chans[] = {
 137         "CH1", "CH2", "CH3", "CH4",
 138         "EXT", "AC Line",
 139         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 140         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
 141 };
 142
 143 static const char *trigger_slopes[] = {
 144         "r", "f",
 145 };
 146
 147 static const char *coupling[] = {
 148         "AC", "DC", "GND",
 149 };
 150
 151 static const uint64_t probe_factor[] = {
 152         1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
 153 };
 154
 155 /* Do not change the order of entries */
 156 static const char *data_sources[] = {
 157         "Live",
 158         "Memory",
 159         "Segmented",
 160 };
 161
 162 static const struct rigol_ds_command std_cmd[] = {
 163         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
 164         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
 165 };
 166
 167 static const struct rigol_ds_command mso7000a_cmd[] = {
 168         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
 169         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
 170 };
 171
 172 enum vendor {
 173         RIGOL,
 174         AGILENT,
 175 };
 176
 177 enum series {
 178         VS5000,
 179         DS1000,
 180         DS2000,
 181         DS2000A,
 182         DSO1000,
 183         DSO1000B,
 184         DS1000Z,
 185         DS4000,
 186         MSO5000,
 187         MSO7000A,
 188 };
 189
 190 /* short name, full name */
 191 static const struct rigol_ds_vendor supported_vendors[] = {
 192         [RIGOL] = {"Rigol", "Rigol Technologies"},
 193         [AGILENT] = {"Agilent", "Agilent Technologies"},
 194 };
 195
 196 #define VENDOR(x) &supported_vendors[x]
 197 /* vendor, series/name, protocol, data format, max timebase, min vdiv,
 198  * number of horizontal divs, live waveform samples, memory buffer samples */
 199 static const struct rigol_ds_series supported_series[] = {
 200         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
 201                 {50, 1}, {2, 1000}, 14, 2048, 0},
 202         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
 203                 {50, 1}, {2, 1000}, 12, 600, 1048576},
 204         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
 205                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
 206         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
 207                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
 208         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 209                 {50, 1}, {2, 1000}, 12, 600, 20480},
 210         [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 211                 {50, 1}, {2, 1000}, 12, 600, 20480},
 212         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
 213                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
 214         [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
 215                 {1000, 1}, {1, 1000}, 14, 1400, 0},
 216         [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2,
 217                 {1000, 1}, {500, 1000000}, 10, 1000, 0},
 218         [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
 219                 {50, 1}, {2, 1000}, 10, 1000, 8000000},
 220 };
 221
 222 #define SERIES(x) &supported_series[x]
 223 /*
 224  * Use a macro to select the correct list of trigger sources and its length
 225  * based on the number of analog channels and presence of digital channels.
 226  */
 227 #define CH_INFO(num, digital) \
 228         num, digital, trigger_sources_##num##_chans, \
 229         digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
 230 /* series, model, min timebase, analog channels, digital */
 231 static const struct rigol_ds_model supported_models[] = {
 232         {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
 233         {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
 234         {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 235         {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 236         {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 237         {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
 238         {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
 239         {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 240         {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 241         {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 242         {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 243         {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 244         {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 245         {SERIES(DS1000), "DS1152E-EDU", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 246         {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 247         {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 248         {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 249         {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 250         {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 251         {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 252         {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
 253         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 254         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 255         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 256         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
 257         {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 258         {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
 259         {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
 260         {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
 261         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
 262         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 263         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 264         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
 265         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 266         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
 267         {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 268         {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 269         {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 270         {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 271         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 272         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 273         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 274         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 275         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 276         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 277         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
 278         {SERIES(DS1000Z), "DS1102Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 279         {SERIES(DS1000Z), "DS1202Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
 280         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 281         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 282         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 283         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
 284         {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
 285         {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd},
 286         {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 287         {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd},
 288         {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 289         {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 290         {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd},
 291         /* TODO: Digital channels are not yet supported on MSO7000A. */
 292         {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
 293 };
 294
 295 static struct sr_dev_driver rigol_ds_driver_info;
 296
 297 static int analog_frame_size(const struct sr_dev_inst *);
 298
 299 static void clear_helper(struct dev_context *devc)
 300 {
 301         unsigned int i;
 302
 303         g_free(devc->data);
 304         g_free(devc->buffer);
 305         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
 306                 g_free(devc->coupling[i]);
 307         g_free(devc->trigger_source);
 308         g_free(devc->trigger_slope);
 309         g_free(devc->analog_groups);
 310 }
 311
 312 static int dev_clear(const struct sr_dev_driver *di)
 313 {
 314         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
 315 }
 316
 317 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
 318 {
 319         struct dev_context *devc;
 320         struct sr_dev_inst *sdi;
 321         struct sr_scpi_hw_info *hw_info;
 322         struct sr_channel *ch;
 323         long n[3];
 324         unsigned int i;
 325         const struct rigol_ds_model *model = NULL;
 326         gchar *channel_name, **version;
 327
 328         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 329                 sr_info("Couldn't get IDN response, retrying.");
 330                 sr_scpi_close(scpi);
 331                 sr_scpi_open(scpi);
 332                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 333                         sr_info("Couldn't get IDN response.");
 334                         return NULL;
 335                 }
 336         }
 337
 338         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
 339                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
 340                                         supported_models[i].series->vendor->full_name) &&
 341                                 !strcmp(hw_info->model, supported_models[i].name)) {
 342                         model = &supported_models[i];
 343                         break;
 344                 }
 345         }
 346
 347         if (!model) {
 348                 sr_scpi_hw_info_free(hw_info);
 349                 return NULL;
 350         }
 351
 352         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 353         sdi->vendor = g_strdup(model->series->vendor->name);
 354         sdi->model = g_strdup(model->name);
 355         sdi->version = g_strdup(hw_info->firmware_version);
 356         sdi->conn = scpi;
 357         sdi->driver = &rigol_ds_driver_info;
 358         sdi->inst_type = SR_INST_SCPI;
 359         sdi->serial_num = g_strdup(hw_info->serial_number);
 360         devc = g_malloc0(sizeof(struct dev_context));
 361         devc->limit_frames = 0;
 362         devc->model = model;
 363         devc->format = model->series->format;
 364
 365         /* DS1000 models with firmware before 0.2.4 used the old data format. */
 366         if (model->series == SERIES(DS1000)) {
 367                 version = g_strsplit(hw_info->firmware_version, ".", 0);
 368                 do {
 369                         if (!version[0] || !version[1] || !version[2])
 370                                 break;
 371                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
 372                                 break;
 373                         for (i = 0; i < 3; i++) {
 374                                 if (sr_atol(version[i], &n[i]) != SR_OK)
 375                                         break;
 376                         }
 377                         if (i != 3)
 378                                 break;
 379                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
 380                         if (scpi->firmware_version < 24) {
 381                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
 382                                 devc->format = FORMAT_RAW;
 383                         }
 384                         break;
 385                 } while (0);
 386                 g_strfreev(version);
 387         }
 388
 389         sr_scpi_hw_info_free(hw_info);
 390
 391         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
 392                                         model->analog_channels);
 393
 394         for (i = 0; i < model->analog_channels; i++) {
 395                 channel_name = g_strdup_printf("CH%d", i + 1);
 396                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
 397
 398                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
 399
 400                 devc->analog_groups[i]->name = channel_name;
 401                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
 402                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 403                                 devc->analog_groups[i]);
 404         }
 405
 406         if (devc->model->has_digital) {
 407                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
 408
 409                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 410                         channel_name = g_strdup_printf("D%d", i);
 411                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
 412                         g_free(channel_name);
 413                         devc->digital_group->channels = g_slist_append(
 414                                         devc->digital_group->channels, ch);
 415                 }
 416                 devc->digital_group->name = g_strdup("LA");
 417                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 418                                 devc->digital_group);
 419         }
 420
 421         for (i = 0; i < ARRAY_SIZE(timebases); i++) {
 422                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
 423                         devc->timebases = &timebases[i];
 424                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
 425                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
 426         }
 427
 428         for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 429                 if (!memcmp(&devc->model->series->min_vdiv,
 430                                         &vdivs[i], sizeof(uint64_t[2]))) {
 431                         devc->vdivs = &vdivs[i];
 432                         devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
 433                 }
 434         }
 435
 436         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
 437         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
 438
 439         devc->data_source = DATA_SOURCE_LIVE;
 440
 441         sdi->priv = devc;
 442
 443         return sdi;
 444 }
 445
 446 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 447 {
 448         return sr_scpi_scan(di->context, options, probe_device);
 449 }
 450
 451 static int dev_open(struct sr_dev_inst *sdi)
 452 {
 453         int ret;
 454         struct sr_scpi_dev_inst *scpi = sdi->conn;
 455
 456         if ((ret = sr_scpi_open(scpi)) < 0) {
 457                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
 458                 return SR_ERR;
 459         }
 460
 461         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
 462                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
 463                 return SR_ERR;
 464         }
 465
 466         return SR_OK;
 467 }
 468
 469 static int dev_close(struct sr_dev_inst *sdi)
 470 {
 471         struct sr_scpi_dev_inst *scpi;
 472         struct dev_context *devc;
 473
 474         scpi = sdi->conn;
 475         devc = sdi->priv;
 476
 477         if (!scpi)
 478                 return SR_ERR_BUG;
 479
 480         if (devc->model->series->protocol == PROTOCOL_V2)
 481                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
 482
 483         return sr_scpi_close(scpi);
 484 }
 485
 486 static int analog_frame_size(const struct sr_dev_inst *sdi)
 487 {
 488         struct dev_context *devc = sdi->priv;
 489         struct sr_channel *ch;
 490         int analog_channels = 0;
 491         GSList *l;
 492
 493         for (l = sdi->channels; l; l = l->next) {
 494                 ch = l->data;
 495                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
 496                         analog_channels++;
 497         }
 498
 499         if (analog_channels == 0)
 500                 return 0;
 501
 502         switch (devc->data_source) {
 503         case DATA_SOURCE_LIVE:
 504                 return devc->model->series->live_samples;
 505         case DATA_SOURCE_MEMORY:
 506         case DATA_SOURCE_SEGMENTED:
 507                 return devc->model->series->buffer_samples / analog_channels;
 508         default:
 509                 return 0;
 510         }
 511 }
 512
 513 static int digital_frame_size(const struct sr_dev_inst *sdi)
 514 {
 515         struct dev_context *devc = sdi->priv;
 516
 517         switch (devc->data_source) {
 518         case DATA_SOURCE_LIVE:
 519                 return devc->model->series->live_samples * 2;
 520         case DATA_SOURCE_MEMORY:
 521         case DATA_SOURCE_SEGMENTED:
 522                 return devc->model->series->buffer_samples * 2;
 523         default:
 524                 return 0;
 525         }
 526 }
 527
 528 static int config_get(uint32_t key, GVariant **data,
 529         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 530 {
 531         struct dev_context *devc;
 532         struct sr_channel *ch;
 533         const char *tmp_str;
 534         int analog_channel = -1;
 535         float smallest_diff = INFINITY;
 536         int idx = -1;
 537         unsigned i;
 538
 539         if (!sdi)
 540                 return SR_ERR_ARG;
 541
 542         devc = sdi->priv;
 543
 544         /* If a channel group is specified, it must be a valid one. */
 545         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 546                 sr_err("Invalid channel group specified.");
 547                 return SR_ERR;
 548         }
 549
 550         if (cg) {
 551                 ch = g_slist_nth_data(cg->channels, 0);
 552                 if (!ch)
 553                         return SR_ERR;
 554                 if (ch->type == SR_CHANNEL_ANALOG) {
 555                         if (ch->name[2] < '1' || ch->name[2] > '4')
 556                                 return SR_ERR;
 557                         analog_channel = ch->name[2] - '1';
 558                 }
 559         }
 560
 561         switch (key) {
 562         case SR_CONF_NUM_HDIV:
 563                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
 564                 break;
 565         case SR_CONF_NUM_VDIV:
 566                 *data = g_variant_new_int32(devc->num_vdivs);
 567                 break;
 568         case SR_CONF_DATA_SOURCE:
 569                 if (devc->data_source == DATA_SOURCE_LIVE)
 570                         *data = g_variant_new_string("Live");
 571                 else if (devc->data_source == DATA_SOURCE_MEMORY)
 572                         *data = g_variant_new_string("Memory");
 573                 else
 574                         *data = g_variant_new_string("Segmented");
 575                 break;
 576         case SR_CONF_LIMIT_FRAMES:
 577                 *data = g_variant_new_uint64(devc->limit_frames);
 578                 break;
 579         case SR_CONF_SAMPLERATE:
 580                 *data = g_variant_new_uint64(devc->sample_rate);
 581                 break;
 582         case SR_CONF_TRIGGER_SOURCE:
 583                 if (!strcmp(devc->trigger_source, "ACL"))
 584                         tmp_str = "AC Line";
 585                 else if (!strcmp(devc->trigger_source, "CHAN1"))
 586                         tmp_str = "CH1";
 587                 else if (!strcmp(devc->trigger_source, "CHAN2"))
 588                         tmp_str = "CH2";
 589                 else if (!strcmp(devc->trigger_source, "CHAN3"))
 590                         tmp_str = "CH3";
 591                 else if (!strcmp(devc->trigger_source, "CHAN4"))
 592                         tmp_str = "CH4";
 593                 else
 594                         tmp_str = devc->trigger_source;
 595                 *data = g_variant_new_string(tmp_str);
 596                 break;
 597         case SR_CONF_TRIGGER_SLOPE:
 598                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
 599                         tmp_str = "r";
 600                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
 601                         tmp_str = "f";
 602                 } else {
 603                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
 604                         return SR_ERR_NA;
 605                 }
 606                 *data = g_variant_new_string(tmp_str);
 607                 break;
 608         case SR_CONF_TRIGGER_LEVEL:
 609                 *data = g_variant_new_double(devc->trigger_level);
 610                 break;
 611         case SR_CONF_TIMEBASE:
 612                 for (i = 0; i < devc->num_timebases; i++) {
 613                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
 614                         float diff = fabs(devc->timebase - tb);
 615                         if (diff < smallest_diff) {
 616                                 smallest_diff = diff;
 617                                 idx = i;
 618                         }
 619                 }
 620                 if (idx < 0) {
 621                         sr_dbg("Negative timebase index: %d.", idx);
 622                         return SR_ERR_NA;
 623                 }
 624                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
 625                                               devc->timebases[idx][1]);
 626                 break;
 627         case SR_CONF_VDIV:
 628                 if (analog_channel < 0) {
 629                         sr_dbg("Negative analog channel: %d.", analog_channel);
 630                         return SR_ERR_NA;
 631                 }
 632                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 633                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
 634                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
 635                         if (diff < smallest_diff) {
 636                                 smallest_diff = diff;
 637                                 idx = i;
 638                         }
 639                 }
 640                 if (idx < 0) {
 641                         sr_dbg("Negative vdiv index: %d.", idx);
 642                         return SR_ERR_NA;
 643                 }
 644                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
 645                 break;
 646         case SR_CONF_COUPLING:
 647                 if (analog_channel < 0) {
 648                         sr_dbg("Negative analog channel: %d.", analog_channel);
 649                         return SR_ERR_NA;
 650                 }
 651                 *data = g_variant_new_string(devc->coupling[analog_channel]);
 652                 break;
 653         case SR_CONF_PROBE_FACTOR:
 654                 if (analog_channel < 0) {
 655                         sr_dbg("Negative analog channel: %d.", analog_channel);
 656                         return SR_ERR_NA;
 657                 }
 658                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
 659                 break;
 660         default:
 661                 return SR_ERR_NA;
 662         }
 663
 664         return SR_OK;
 665 }
 666
 667 static int config_set(uint32_t key, GVariant *data,
 668         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 669 {
 670         struct dev_context *devc;
 671         uint64_t p;
 672         double t_dbl;
 673         int ret, idx, i;
 674         const char *tmp_str;
 675         char buffer[16];
 676
 677         devc = sdi->priv;
 678
 679         /* If a channel group is specified, it must be a valid one. */
 680         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 681                 sr_err("Invalid channel group specified.");
 682                 return SR_ERR;
 683         }
 684
 685         switch (key) {
 686         case SR_CONF_LIMIT_FRAMES:
 687                 devc->limit_frames = g_variant_get_uint64(data);
 688                 break;
 689         case SR_CONF_TRIGGER_SLOPE:
 690                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
 691                         return SR_ERR_ARG;
 692                 g_free(devc->trigger_slope);
 693                 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
 694                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
 695         case SR_CONF_HORIZ_TRIGGERPOS:
 696                 t_dbl = g_variant_get_double(data);
 697                 if (t_dbl < 0.0 || t_dbl > 1.0) {
 698                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
 699                         return SR_ERR;
 700                 }
 701                 devc->horiz_triggerpos = t_dbl;
 702                 /* We have the trigger offset as a percentage of the frame, but
 703                  * need to express this in seconds. */
 704                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
 705                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
 706                 return rigol_ds_config_set(sdi,
 707                         devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
 708         case SR_CONF_TRIGGER_LEVEL:
 709                 t_dbl = g_variant_get_double(data);
 710                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
 711                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
 712                 if (ret == SR_OK)
 713                         devc->trigger_level = t_dbl;
 714                 return ret;
 715         case SR_CONF_TIMEBASE:
 716                 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
 717                         return SR_ERR_ARG;
 718                 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
 719                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
 720                                 devc->timebase);
 721                 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
 722         case SR_CONF_TRIGGER_SOURCE:
 723                 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
 724                         return SR_ERR_ARG;
 725                 g_free(devc->trigger_source);
 726                 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
 727                 if (!strcmp(devc->trigger_source, "AC Line"))
 728                         tmp_str = "ACL";
 729                 else if (!strcmp(devc->trigger_source, "CH1"))
 730                         tmp_str = "CHAN1";
 731                 else if (!strcmp(devc->trigger_source, "CH2"))
 732                         tmp_str = "CHAN2";
 733                 else if (!strcmp(devc->trigger_source, "CH3"))
 734                         tmp_str = "CHAN3";
 735                 else if (!strcmp(devc->trigger_source, "CH4"))
 736                         tmp_str = "CHAN4";
 737                 else
 738                         tmp_str = (char *)devc->trigger_source;
 739                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
 740         case SR_CONF_VDIV:
 741                 if (!cg)
 742                         return SR_ERR_CHANNEL_GROUP;
 743                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
 744                         return SR_ERR_ARG;
 745                 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
 746                         return SR_ERR_ARG;
 747                 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
 748                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
 749                 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
 750         case SR_CONF_COUPLING:
 751                 if (!cg)
 752                         return SR_ERR_CHANNEL_GROUP;
 753                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
 754                         return SR_ERR_ARG;
 755                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
 756                         return SR_ERR_ARG;
 757                 g_free(devc->coupling[i]);
 758                 devc->coupling[i] = g_strdup(coupling[idx]);
 759                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
 760         case SR_CONF_PROBE_FACTOR:
 761                 if (!cg)
 762                         return SR_ERR_CHANNEL_GROUP;
 763                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
 764                         return SR_ERR_ARG;
 765                 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
 766                         return SR_ERR_ARG;
 767                 p = g_variant_get_uint64(data);
 768                 devc->attenuation[i] = probe_factor[idx];
 769                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
 770                 if (ret == SR_OK)
 771                         rigol_ds_get_dev_cfg_vertical(sdi);
 772                 return ret;
 773         case SR_CONF_DATA_SOURCE:
 774                 tmp_str = g_variant_get_string(data, NULL);
 775                 if (!strcmp(tmp_str, "Live"))
 776                         devc->data_source = DATA_SOURCE_LIVE;
 777                 else if (devc->model->series->protocol >= PROTOCOL_V2
 778                         && !strcmp(tmp_str, "Memory"))
 779                         devc->data_source = DATA_SOURCE_MEMORY;
 780                 else if (devc->model->series->protocol >= PROTOCOL_V3
 781                          && !strcmp(tmp_str, "Segmented"))
 782                         devc->data_source = DATA_SOURCE_SEGMENTED;
 783                 else {
 784                         sr_err("Unknown data source: '%s'.", tmp_str);
 785                         return SR_ERR;
 786                 }
 787                 break;
 788         default:
 789                 return SR_ERR_NA;
 790         }
 791
 792         return SR_OK;
 793 }
 794
 795 static int config_list(uint32_t key, GVariant **data,
 796         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 797 {
 798         struct dev_context *devc;
 799
 800         devc = (sdi) ? sdi->priv : NULL;
 801
 802         switch (key) {
 803         case SR_CONF_SCAN_OPTIONS:
 804         case SR_CONF_DEVICE_OPTIONS:
 805                 if (!cg)
 806                         return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
 807                 if (!devc)
 808                         return SR_ERR_ARG;
 809                 if (cg == devc->digital_group) {
 810                         *data = std_gvar_array_u32(NULL, 0);
 811                         return SR_OK;
 812                 } else {
 813                         if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
 814                                 return SR_ERR_ARG;
 815                         *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
 816                         return SR_OK;
 817                 }
 818                 break;
 819         case SR_CONF_COUPLING:
 820                 if (!cg)
 821                         return SR_ERR_CHANNEL_GROUP;
 822                 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
 823                 break;
 824         case SR_CONF_PROBE_FACTOR:
 825                 if (!cg)
 826                         return SR_ERR_CHANNEL_GROUP;
 827                 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
 828                 break;
 829         case SR_CONF_VDIV:
 830                 if (!devc)
 831                         /* Can't know this until we have the exact model. */
 832                         return SR_ERR_ARG;
 833                 if (!cg)
 834                         return SR_ERR_CHANNEL_GROUP;
 835                 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
 836                 break;
 837         case SR_CONF_TIMEBASE:
 838                 if (!devc)
 839                         /* Can't know this until we have the exact model. */
 840                         return SR_ERR_ARG;
 841                 if (devc->num_timebases <= 0)
 842                         return SR_ERR_NA;
 843                 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
 844                 break;
 845         case SR_CONF_TRIGGER_SOURCE:
 846                 if (!devc)
 847                         /* Can't know this until we have the exact model. */
 848                         return SR_ERR_ARG;
 849                 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
 850                 break;
 851         case SR_CONF_TRIGGER_SLOPE:
 852                 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
 853                 break;
 854         case SR_CONF_DATA_SOURCE:
 855                 if (!devc)
 856                         /* Can't know this until we have the exact model. */
 857                         return SR_ERR_ARG;
 858                 switch (devc->model->series->protocol) {
 859                 case PROTOCOL_V1:
 860                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
 861                         break;
 862                 case PROTOCOL_V2:
 863                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
 864                         break;
 865                 default:
 866                         *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
 867                         break;
 868                 }
 869                 break;
 870         default:
 871                 return SR_ERR_NA;
 872         }
 873
 874         return SR_OK;
 875 }
 876
 877 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 878 {
 879         struct sr_scpi_dev_inst *scpi;
 880         struct dev_context *devc;
 881         struct sr_channel *ch;
 882         gboolean some_digital;
 883         GSList *l;
 884         char *cmd;
 885         int protocol;
 886
 887         scpi = sdi->conn;
 888         devc = sdi->priv;
 889         protocol = devc->model->series->protocol;
 890
 891         devc->num_frames = 0;
 892         devc->num_frames_segmented = 0;
 893
 894         some_digital = FALSE;
 895         for (l = sdi->channels; l; l = l->next) {
 896                 ch = l->data;
 897                 sr_dbg("handling channel %s", ch->name);
 898                 if (ch->type == SR_CHANNEL_ANALOG) {
 899                         if (ch->enabled)
 900                                 devc->enabled_channels = g_slist_append(
 901                                                 devc->enabled_channels, ch);
 902                         if (ch->enabled != devc->analog_channels[ch->index]) {
 903                                 /* Enabled channel is currently disabled, or vice versa. */
 904                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
 905                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
 906                                         return SR_ERR;
 907                                 devc->analog_channels[ch->index] = ch->enabled;
 908                         }
 909                 } else if (ch->type == SR_CHANNEL_LOGIC) {
 910                         /* Only one list entry for older protocols. All channels are
 911                          * retrieved together when this entry is processed. */
 912                         if (ch->enabled && (
 913                                                 protocol > PROTOCOL_V3 ||
 914                                                 !some_digital))
 915                                 devc->enabled_channels = g_slist_append(
 916                                                 devc->enabled_channels, ch);
 917                         if (ch->enabled) {
 918                                 some_digital = TRUE;
 919                                 /* Turn on LA module if currently off. */
 920                                 if (!devc->la_enabled) {
 921                                         if (rigol_ds_config_set(sdi, protocol >= PROTOCOL_V3 ?
 922                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
 923                                                 return SR_ERR;
 924                                         devc->la_enabled = TRUE;
 925                                 }
 926                         }
 927                         if (ch->enabled != devc->digital_channels[ch->index]) {
 928                                 /* Enabled channel is currently disabled, or vice versa. */
 929                                 if (protocol >= PROTOCOL_V5)
 930                                         cmd = ":LA:DISP D%d,%s";
 931                                 else if (protocol >= PROTOCOL_V3)
 932                                         cmd = ":LA:DIG%d:DISP %s";
 933                                 else
 934                                         cmd = ":DIG%d:TURN %s";
 935
 936                                 if (rigol_ds_config_set(sdi, cmd, ch->index,
 937                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
 938                                         return SR_ERR;
 939                                 devc->digital_channels[ch->index] = ch->enabled;
 940                         }
 941                 }
 942         }
 943
 944         if (!devc->enabled_channels)
 945                 return SR_ERR;
 946
 947         /* Turn off LA module if on and no digital channels selected. */
 948         if (devc->la_enabled && !some_digital)
 949                 if (rigol_ds_config_set(sdi,
 950                                 devc->model->series->protocol >= PROTOCOL_V3 ?
 951                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
 952                         return SR_ERR;
 953
 954         /* Set memory mode. */
 955         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
 956                 switch (protocol) {
 957                 case PROTOCOL_V1:
 958                 case PROTOCOL_V2:
 959                         /* V1 and V2 do not have segmented data */
 960                         sr_err("Data source 'Segmented' not supported on this model");
 961                         break;
 962                 case PROTOCOL_V3:
 963                 case PROTOCOL_V4:
 964                 {
 965                         int frames = 0;
 966                         if (sr_scpi_get_int(sdi->conn,
 967                                                 protocol == PROTOCOL_V4 ? "FUNC:WREP:FEND?" :
 968                                                 "FUNC:WREP:FMAX?", &frames) != SR_OK)
 969                                 return SR_ERR;
 970                         if (frames <= 0) {
 971                                 sr_err("No segmented data available");
 972                                 return SR_ERR;
 973                         }
 974                         devc->num_frames_segmented = frames;
 975                         break;
 976                 }
 977                 case PROTOCOL_V5:
 978                         /* The frame limit has to be read on the fly, just set up
 979                          * reading of the first frame */
 980                         if (rigol_ds_config_set(sdi, "REC:CURR 1") != SR_OK)
 981                                 return SR_ERR;
 982                         break;
 983                 default:
 984                         sr_err("Data source 'Segmented' not yet supported");
 985                         return SR_ERR;
 986                 }
 987         }
 988
 989         devc->analog_frame_size = analog_frame_size(sdi);
 990         devc->digital_frame_size = digital_frame_size(sdi);
 991
 992         switch (devc->model->series->protocol) {
 993         case PROTOCOL_V2:
 994                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
 995                         return SR_ERR;
 996                 break;
 997         case PROTOCOL_V3:
 998                 /* Apparently for the DS2000 the memory
 999                  * depth can only be set in Running state -
1000                  * this matches the behaviour of the UI. */
1001                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1002                         return SR_ERR;
1003                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1004                                         devc->analog_frame_size) != SR_OK)
1005                         return SR_ERR;
1006                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1007                         return SR_ERR;
1008                 break;
1009         default:
1010                 break;
1011         }
1012
1013         if (devc->data_source == DATA_SOURCE_LIVE)
1014                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1015                         return SR_ERR;
1016
1017         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1018                         rigol_ds_receive, (void *)sdi);
1019
1020         std_session_send_df_header(sdi);
1021
1022         devc->channel_entry = devc->enabled_channels;
1023
1024         if (devc->data_source == DATA_SOURCE_LIVE)
1025                 devc->sample_rate = analog_frame_size(sdi) /
1026                         (devc->timebase * devc->model->series->num_horizontal_divs);
1027         else {
1028                 float xinc;
1029                 if (devc->model->series->protocol >= PROTOCOL_V3 &&
1030                                 sr_scpi_get_float(sdi->conn, "WAV:XINC?", &xinc) != SR_OK) {
1031                         sr_err("Couldn't get sampling rate");
1032                         return SR_ERR;
1033                 }
1034                 devc->sample_rate = 1. / xinc;
1035         }
1036
1037
1038         if (rigol_ds_capture_start(sdi) != SR_OK)
1039                 return SR_ERR;
1040
1041         /* Start of first frame. */
1042         std_session_send_df_frame_begin(sdi);
1043
1044         return SR_OK;
1045 }
1046
1047 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1048 {
1049         struct dev_context *devc;
1050         struct sr_scpi_dev_inst *scpi;
1051
1052         devc = sdi->priv;
1053
1054         std_session_send_df_end(sdi);
1055
1056         g_slist_free(devc->enabled_channels);
1057         devc->enabled_channels = NULL;
1058         scpi = sdi->conn;
1059         sr_scpi_source_remove(sdi->session, scpi);
1060
1061         return SR_OK;
1062 }
1063
1064 static struct sr_dev_driver rigol_ds_driver_info = {
1065         .name = "rigol-ds",
1066         .longname = "Rigol DS",
1067         .api_version = 1,
1068         .init = std_init,
1069         .cleanup = std_cleanup,
1070         .scan = scan,
1071         .dev_list = std_dev_list,
1072         .dev_clear = dev_clear,
1073         .config_get = config_get,
1074         .config_set = config_set,
1075         .config_list = config_list,
1076         .dev_open = dev_open,
1077         .dev_close = dev_close,
1078         .dev_acquisition_start = dev_acquisition_start,
1079         .dev_acquisition_stop = dev_acquisition_stop,
1080         .context = NULL,
1081 };
1082 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);