src/hardware/rigol-dg/protocol.h

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2020 Timo Kokkonen <tjko@iki.fi>
   5  *
   6  * This program is free software: you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation, either version 3 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef LIBSIGROK_HARDWARE_RIGOL_DG_PROTOCOL_H
  21 #define LIBSIGROK_HARDWARE_RIGOL_DG_PROTOCOL_H
  22
  23 #include <stdint.h>
  24 #include <glib.h>
  25 #include <libsigrok/libsigrok.h>
  26 #include "libsigrok-internal.h"
  27
  28 #define LOG_PREFIX "rigol-dg"
  29
  30 /* Device/firmware specific quirks. */
  31 #define RIGOL_DG_COUNTER_BUG           (1UL << 0)
  32 #define RIGOL_DG_COUNTER_CH2_CONFLICT  (1UL << 1)
  33
  34 #define RIGOL_DG_COUNTER_BUG_DELAY (1000 * 1000)
  35
  36 enum psg_commands {
  37         PSG_CMD_SETUP_REMOTE,
  38         PSG_CMD_SETUP_LOCAL,
  39         PSG_CMD_SELECT_CHANNEL,
  40         PSG_CMD_GET_CHANNEL,
  41         PSG_CMD_GET_ENABLED,
  42         PSG_CMD_SET_ENABLE,
  43         PSG_CMD_SET_DISABLE,
  44         PSG_CMD_GET_SOURCE,
  45         PSG_CMD_SET_SOURCE,
  46         PSG_CMD_SET_FREQUENCY,
  47         PSG_CMD_GET_FREQUENCY,
  48         PSG_CMD_SET_AMPLITUDE,
  49         PSG_CMD_GET_AMPLITUDE,
  50         PSG_CMD_GET_OFFSET,
  51         PSG_CMD_SET_OFFSET,
  52         PSG_CMD_GET_PHASE,
  53         PSG_CMD_SET_PHASE,
  54         PSG_CMD_GET_DCYCL_PULSE,
  55         PSG_CMD_SET_DCYCL_PULSE,
  56         PSG_CMD_GET_DCYCL_SQUARE,
  57         PSG_CMD_SET_DCYCL_SQUARE,
  58         PSG_CMD_COUNTER_GET_ENABLED,
  59         PSG_CMD_COUNTER_SET_ENABLE,
  60         PSG_CMD_COUNTER_SET_DISABLE,
  61         PSG_CMD_COUNTER_MEASURE,
  62 };
  63
  64 enum waveform_type {
  65         WF_DC = 0,
  66         WF_SINE,
  67         WF_SQUARE,
  68         WF_RAMP,
  69         WF_PULSE,
  70         WF_NOISE,
  71         WF_ARB,
  72 };
  73
  74 enum waveform_options {
  75         WFO_FREQUENCY = 1,
  76         WFO_AMPLITUDE = 2,
  77         WFO_OFFSET = 4,
  78         WFO_PHASE = 8,
  79         WFO_DUTY_CYCLE = 16,
  80 };
  81
  82 struct waveform_spec {
  83         const char *name;
  84         enum waveform_type waveform;
  85         double freq_min;
  86         double freq_max;
  87         double freq_step;
  88         uint32_t opts;
  89 };
  90
  91 struct channel_spec {
  92         const char *name;
  93         const struct waveform_spec *waveforms;
  94         uint32_t num_waveforms;
  95 };
  96
  97 struct channel_status {
  98         enum waveform_type wf;
  99         const struct waveform_spec *wf_spec;
 100         double freq;
 101         double ampl;
 102         double offset;
 103         double phase;
 104 };
 105
 106 struct device_spec {
 107         const char *vendor;
 108         const char *model;
 109         const uint32_t *devopts;
 110         const uint32_t num_devopts;
 111         const uint32_t *devopts_cg;
 112         const uint32_t num_devopts_cg;
 113         const struct channel_spec *channels;
 114         const uint32_t num_channels;
 115         const struct scpi_command *cmdset;
 116 };
 117
 118 struct dev_context {
 119         const struct scpi_command *cmdset;
 120         const struct device_spec *device;
 121         struct channel_status *ch_status;
 122         struct sr_sw_limits limits;
 123         gboolean counter_enabled;
 124         uint32_t quirks;
 125 };
 126
 127 SR_PRIV const char *rigol_dg_waveform_to_string(enum waveform_type type);
 128 SR_PRIV const struct waveform_spec *rigol_dg_get_waveform_spec(
 129                 const struct channel_spec *ch, enum waveform_type wf);
 130 SR_PRIV int rigol_dg_get_channel_state(const struct sr_dev_inst *sdi,
 131                 const struct sr_channel_group *cg);
 132 SR_PRIV int rigol_dg_receive_data(int fd, int revents, void *cb_data);
 133
 134 #endif