9f45fc4f6d8fa974f37b78b807859faabd5f3e9b
[libsigrok.git] / src / hardware / rdtech-dps / protocol.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2018 James Churchill <pelrun@gmail.com>
5  * Copyright (C) 2019 Frank Stettner <frank-stettner@gmx.net>
6  * Copyright (C) 2021 Gerhard Sittig <gerhard.sittig@gmx.net>
7  *
8  * This program is free software: you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation, either version 3 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20  */
21
22 #include <config.h>
23
24 #include <string.h>
25
26 #include "protocol.h"
27
28 enum rdtech_dps_register {
29         REG_DPS_USET       = 0x00, /* Mirror of 0x50 */
30         REG_DPS_ISET       = 0x01, /* Mirror of 0x51 */
31         REG_DPS_UOUT       = 0x02,
32         REG_DPS_IOUT       = 0x03,
33         REG_DPS_POWER      = 0x04,
34         REG_DPS_UIN        = 0x05,
35         REG_DPS_LOCK       = 0x06,
36         REG_DPS_PROTECT    = 0x07,
37         REG_DPS_CV_CC      = 0x08,
38         REG_DPS_ENABLE     = 0x09,
39         REG_DPS_BACKLIGHT  = 0x0A, /* Mirror of 0x55 */
40         REG_DPS_MODEL      = 0x0B,
41         REG_DPS_VERSION    = 0x0C,
42
43         REG_DPS_PRESET     = 0x23, /* Loads a preset into preset 0. */
44
45         /*
46          * Add (preset * 0x10) to each of the following, for preset 1-9.
47          * Preset 0 regs below are the active output settings.
48          */
49         PRE_DPS_USET       = 0x50,
50         PRE_DPS_ISET       = 0x51,
51         PRE_DPS_OVPSET     = 0x52,
52         PRE_DPS_OCPSET     = 0x53,
53         PRE_DPS_OPPSET     = 0x54,
54         PRE_DPS_BACKLIGHT  = 0x55,
55         PRE_DPS_DISABLE    = 0x56, /* Disable output if 0 is copied here from a preset (1 is no change). */
56         PRE_DPS_BOOT       = 0x57, /* Enable output at boot if 1. */
57 };
58 #define PRE_DPS_STRIDE 0x10
59
60 enum rdtech_dps_protect_state {
61         STATE_NORMAL = 0,
62         STATE_OVP    = 1,
63         STATE_OCP    = 2,
64         STATE_OPP    = 3,
65 };
66
67 enum rdtech_dps_regulation_mode {
68         MODE_CV      = 0,
69         MODE_CC      = 1,
70 };
71
72 enum rdtech_rd_register {
73         REG_RD_MODEL = 0, /* u16 */
74         REG_RD_SERIAL = 1, /* u32 */
75         REG_RD_FIRMWARE = 3, /* u16 */
76         REG_RD_TEMP_INT = 4, /* 2x u16 */
77         REG_RD_TEMP_INT_F = 6, /* 2x u16 */
78         REG_RD_VOLT_TGT = 8, /* u16 */
79         REG_RD_CURR_LIM = 9, /* u16 */
80         REG_RD_VOLTAGE = 10, /* u16 */
81         REG_RD_CURRENT = 11, /* u16 */
82         REG_RD_ENERGY = 12, /* u16 */
83         REG_RD_POWER = 13, /* u16 */
84         REG_RD_VOLT_IN = 14, /* u16 */
85         REG_RD_PROTECT = 16, /* u16 */
86         REG_RD_REGULATION = 17, /* u16 */
87         REG_RD_ENABLE = 18, /* u16 */
88         /*
89          * Battery at 32 == 0x20 pp:
90          * Mode, voltage, temperature, capacity, energy.
91          */
92         /*
93          * Date/time at 48 == 0x30 pp:
94          * Year, month, day, hour, minute, second.
95          */
96         /* Backlight at 72 == 0x48. */
97         REG_RD_OVP_THR = 82, /* 0x52 */
98         REG_RD_OCP_THR = 83, /* 0x53 */
99         /* One "live" slot and 9 "memory" positions. */
100         REG_RD_START_MEM = 84, /* 0x54 */
101 };
102
103 /* Retries failed modbus read attempts for improved reliability. */
104 static int rdtech_dps_read_holding_registers(struct sr_modbus_dev_inst *modbus,
105         int address, int nb_registers, uint16_t *registers)
106 {
107         size_t retries;
108         int ret;
109
110         retries = 3;
111         while (retries--) {
112                 ret = sr_modbus_read_holding_registers(modbus,
113                         address, nb_registers, registers);
114                 if (ret == SR_OK)
115                         return ret;
116         }
117
118         return ret;
119 }
120
121 /* Set one 16bit register. LE format for DPS devices. */
122 static int rdtech_dps_set_reg(const struct sr_dev_inst *sdi,
123         uint16_t address, uint16_t value)
124 {
125         struct dev_context *devc;
126         struct sr_modbus_dev_inst *modbus;
127         uint16_t registers[1];
128         int ret;
129         uint8_t *wrptr;
130
131         devc = sdi->priv;
132         modbus = sdi->conn;
133
134         wrptr = (void *)registers;
135         write_u16le(wrptr, value);
136
137         g_mutex_lock(&devc->rw_mutex);
138         ret = sr_modbus_write_multiple_registers(modbus, address,
139                 ARRAY_SIZE(registers), registers);
140         g_mutex_unlock(&devc->rw_mutex);
141
142         return ret;
143 }
144
145 /* Set one 16bit register. BE format for RD devices. */
146 static int rdtech_rd_set_reg(const struct sr_dev_inst *sdi,
147         uint16_t address, uint16_t value)
148 {
149         struct dev_context *devc;
150         struct sr_modbus_dev_inst *modbus;
151         uint16_t registers[1];
152         int ret;
153         uint8_t *wrptr;
154
155         devc = sdi->priv;
156         modbus = sdi->conn;
157
158         wrptr = (void *)registers;
159         write_u16be(wrptr, value);
160
161         g_mutex_lock(&devc->rw_mutex);
162         ret = sr_modbus_write_multiple_registers(modbus, address,
163                 ARRAY_SIZE(registers), registers);
164         g_mutex_unlock(&devc->rw_mutex);
165
166         return ret;
167 }
168
169 /* Get DPS model number and firmware version from a connected device. */
170 SR_PRIV int rdtech_dps_get_model_version(struct sr_modbus_dev_inst *modbus,
171         enum rdtech_dps_model_type model_type,
172         uint16_t *model, uint16_t *version, uint32_t *serno)
173 {
174         uint16_t registers[4];
175         int ret;
176         const uint8_t *rdptr;
177
178         /*
179          * No mutex here because when the routine executes then the
180          * device instance was not created yet (probe phase).
181          */
182         switch (model_type) {
183         case MODEL_DPS:
184                 /* Get the MODEL and VERSION registers. */
185                 ret = rdtech_dps_read_holding_registers(modbus,
186                         REG_DPS_MODEL, 2, registers);
187                 if (ret != SR_OK)
188                         return ret;
189                 rdptr = (void *)registers;
190                 *model = read_u16le_inc(&rdptr);
191                 *version = read_u16le_inc(&rdptr);
192                 *serno = 0;
193                 sr_info("RDTech DPS/DPH model: %u version: %u",
194                         *model, *version);
195                 return SR_OK;
196         case MODEL_RD:
197                 /* Get the MODEL, SERIAL, and FIRMWARE registers. */
198                 ret = rdtech_dps_read_holding_registers(modbus,
199                         REG_RD_MODEL, 4, registers);
200                 if (ret != SR_OK)
201                         return ret;
202                 rdptr = (void *)registers;
203                 *model = read_u16be_inc(&rdptr) / 10;
204                 *serno = read_u32be_inc(&rdptr);
205                 *version = read_u16be_inc(&rdptr);
206                 sr_info("RDTech RD model: %u version: %u, serno %u",
207                         *model, *version, *serno);
208                 return SR_OK;
209         default:
210                 sr_err("Unexpected RDTech PSU device type. Programming error?");
211                 return SR_ERR_ARG;
212         }
213         /* UNREACH */
214 }
215
216 /* Send a measured value to the session feed. */
217 static int send_value(const struct sr_dev_inst *sdi,
218         struct sr_channel *ch, float value,
219         enum sr_mq mq, enum sr_mqflag mqflags,
220         enum sr_unit unit, int digits)
221 {
222         struct sr_datafeed_packet packet;
223         struct sr_datafeed_analog analog;
224         struct sr_analog_encoding encoding;
225         struct sr_analog_meaning meaning;
226         struct sr_analog_spec spec;
227         int ret;
228
229         sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
230         analog.meaning->channels = g_slist_append(NULL, ch);
231         analog.num_samples = 1;
232         analog.data = &value;
233         analog.meaning->mq = mq;
234         analog.meaning->mqflags = mqflags;
235         analog.meaning->unit = unit;
236
237         packet.type = SR_DF_ANALOG;
238         packet.payload = &analog;
239         ret = sr_session_send(sdi, &packet);
240
241         g_slist_free(analog.meaning->channels);
242
243         return ret;
244 }
245
246 /*
247  * Get the device's current state. Exhaustively, relentlessly.
248  * Concentrate all details of communication in the physical transport,
249  * register layout interpretation, and potential model dependency in
250  * this central spot, to simplify maintenance.
251  *
252  * TODO Optionally limit the transfer volume depending on caller's spec
253  * which detail level is desired? Is 10 registers each 16bits an issue
254  * when the UART bitrate is only 9600bps?
255  */
256 SR_PRIV int rdtech_dps_get_state(const struct sr_dev_inst *sdi,
257         struct rdtech_dps_state *state)
258 {
259         struct dev_context *devc;
260         struct sr_modbus_dev_inst *modbus;
261         uint16_t registers[12];
262         int ret;
263         const uint8_t *rdptr;
264         uint16_t uset_raw, iset_raw, uout_raw, iout_raw, power_raw;
265         uint16_t reg_val, reg_state, out_state, ovpset_raw, ocpset_raw;
266         gboolean is_lock, is_out_enabled, is_reg_cc;
267         gboolean uses_ovp, uses_ocp;
268         float volt_target, curr_limit;
269         float ovp_threshold, ocp_threshold;
270         float curr_voltage, curr_current, curr_power;
271
272         if (!sdi || !sdi->priv || !sdi->conn)
273                 return SR_ERR_ARG;
274         devc = sdi->priv;
275         modbus = sdi->conn;
276         if (!state)
277                 return SR_ERR_ARG;
278
279         switch (devc->model->model_type) {
280         case MODEL_DPS:
281                 /*
282                  * Transfer a chunk of registers in a single call. It's
283                  * unfortunate that the model dependency and the sparse
284                  * register map force us to open code addresses, sizes,
285                  * and the sequence of the registers and how to interpret
286                  * their bit fields. But then this is not too unusual for
287                  * a hardware specific device driver ...
288                  *
289                  * TODO Optionally reduce the transfer volume depending
290                  * on the caller specified state query context.
291                  */
292                 g_mutex_lock(&devc->rw_mutex);
293                 ret = rdtech_dps_read_holding_registers(modbus,
294                         REG_DPS_USET, 10, registers);
295                 g_mutex_unlock(&devc->rw_mutex);
296                 if (ret != SR_OK)
297                         return ret;
298
299                 /* Interpret the registers' values. */
300                 rdptr = (const void *)registers;
301                 uset_raw = read_u16le_inc(&rdptr);
302                 volt_target = uset_raw / devc->voltage_multiplier;
303                 iset_raw = read_u16le_inc(&rdptr);
304                 curr_limit = iset_raw / devc->current_multiplier;
305                 uout_raw = read_u16le_inc(&rdptr);
306                 curr_voltage = uout_raw / devc->voltage_multiplier;
307                 iout_raw = read_u16le_inc(&rdptr);
308                 curr_current = iout_raw / devc->current_multiplier;
309                 power_raw = read_u16le_inc(&rdptr);
310                 curr_power = power_raw / 100.0f;
311                 (void)read_u16le_inc(&rdptr); /* UIN */
312                 reg_val = read_u16le_inc(&rdptr); /* LOCK */
313                 is_lock = reg_val != 0;
314                 reg_val = read_u16le_inc(&rdptr); /* PROTECT */
315                 uses_ovp = reg_val == STATE_OVP;
316                 uses_ocp = reg_val == STATE_OCP;
317                 reg_state = read_u16le_inc(&rdptr); /* CV_CC */
318                 is_reg_cc = reg_state == MODE_CC;
319                 out_state = read_u16le_inc(&rdptr); /* ENABLE */
320                 is_out_enabled = out_state != 0;
321
322                 /* Transfer another chunk of registers in a single call. */
323                 g_mutex_lock(&devc->rw_mutex);
324                 ret = rdtech_dps_read_holding_registers(modbus,
325                         PRE_DPS_OVPSET, 2, registers);
326                 g_mutex_unlock(&devc->rw_mutex);
327                 if (ret != SR_OK)
328                         return ret;
329
330                 /* Interpret the second registers chunk's values. */
331                 rdptr = (const void *)registers;
332                 ovpset_raw = read_u16le_inc(&rdptr); /* PRE OVPSET */
333                 ovp_threshold = ovpset_raw * devc->voltage_multiplier;
334                 ocpset_raw = read_u16le_inc(&rdptr); /* PRE OCPSET */
335                 ocp_threshold = ocpset_raw * devc->current_multiplier;
336
337                 break;
338
339         case MODEL_RD:
340                 /* Retrieve a set of adjacent registers. */
341                 g_mutex_lock(&devc->rw_mutex);
342                 ret = rdtech_dps_read_holding_registers(modbus,
343                         REG_RD_VOLT_TGT, 11, registers);
344                 g_mutex_unlock(&devc->rw_mutex);
345                 if (ret != SR_OK)
346                         return ret;
347
348                 /* Interpret the registers' raw content. */
349                 rdptr = (const void *)registers;
350                 uset_raw = read_u16be_inc(&rdptr); /* USET */
351                 volt_target = uset_raw / devc->voltage_multiplier;
352                 iset_raw = read_u16be_inc(&rdptr); /* ISET */
353                 curr_limit = iset_raw / devc->current_multiplier;
354                 uout_raw = read_u16be_inc(&rdptr); /* UOUT */
355                 curr_voltage = uout_raw / devc->voltage_multiplier;
356                 iout_raw = read_u16be_inc(&rdptr); /* IOUT */
357                 curr_current = iout_raw / devc->current_multiplier;
358                 (void)read_u16be_inc(&rdptr); /* ENERGY */
359                 power_raw = read_u16be_inc(&rdptr); /* POWER */
360                 curr_power = power_raw / 100.0f;
361                 (void)read_u16be_inc(&rdptr); /* VOLT_IN */
362                 (void)read_u16be_inc(&rdptr);
363                 reg_val = read_u16be_inc(&rdptr); /* PROTECT */
364                 uses_ovp = reg_val == STATE_OVP;
365                 uses_ocp = reg_val == STATE_OCP;
366                 reg_state = read_u16be_inc(&rdptr); /* REGULATION */
367                 is_reg_cc = reg_state == MODE_CC;
368                 out_state = read_u16be_inc(&rdptr); /* ENABLE */
369                 is_out_enabled = out_state != 0;
370
371                 /* Retrieve a set of adjacent registers. */
372                 g_mutex_lock(&devc->rw_mutex);
373                 ret = rdtech_dps_read_holding_registers(modbus,
374                         REG_RD_OVP_THR, 2, registers);
375                 g_mutex_unlock(&devc->rw_mutex);
376                 if (ret != SR_OK)
377                         return ret;
378
379                 /* Interpret the registers' raw content. */
380                 rdptr = (const void *)registers;
381                 ovpset_raw = read_u16be_inc(&rdptr); /* OVP THR */
382                 ovp_threshold = ovpset_raw / devc->voltage_multiplier;
383                 ocpset_raw = read_u16be_inc(&rdptr); /* OCP THR */
384                 ocp_threshold = ocpset_raw / devc->current_multiplier;
385
386                 /* Details which we cannot query from the device. */
387                 is_lock = FALSE;
388
389                 break;
390
391         default:
392                 /* ShouldNotHappen(TM). Probe should have failed. */
393                 return SR_ERR_ARG;
394         }
395
396         /* Store gathered details in the high level container. */
397         memset(state, 0, sizeof(*state));
398         state->lock = is_lock;
399         state->mask |= STATE_LOCK;
400         state->output_enabled = is_out_enabled;
401         state->mask |= STATE_OUTPUT_ENABLED;
402         state->regulation_cc = is_reg_cc;
403         state->mask |= STATE_REGULATION_CC;
404         state->protect_ovp = uses_ovp;
405         state->mask |= STATE_PROTECT_OVP;
406         state->protect_ocp = uses_ocp;
407         state->mask |= STATE_PROTECT_OCP;
408         state->protect_enabled = TRUE;
409         state->mask |= STATE_PROTECT_ENABLED;
410         state->voltage_target = volt_target;
411         state->mask |= STATE_VOLTAGE_TARGET;
412         state->current_limit = curr_limit;
413         state->mask |= STATE_CURRENT_LIMIT;
414         state->ovp_threshold = ovp_threshold;
415         state->mask |= STATE_OVP_THRESHOLD;
416         state->ocp_threshold = ocp_threshold;
417         state->mask |= STATE_OCP_THRESHOLD;
418         state->voltage = curr_voltage;
419         state->mask |= STATE_VOLTAGE;
420         state->current = curr_current;
421         state->mask |= STATE_CURRENT;
422         state->power = curr_power;
423         state->mask |= STATE_POWER;
424
425         return SR_OK;
426 }
427
428 /* Setup device's parameters. Selectively, from caller specs. */
429 SR_PRIV int rdtech_dps_set_state(const struct sr_dev_inst *sdi,
430         struct rdtech_dps_state *state)
431 {
432         struct dev_context *devc;
433         uint16_t reg_value;
434         int ret;
435
436         if (!sdi || !sdi->priv || !sdi->conn)
437                 return SR_ERR_ARG;
438         devc = sdi->priv;
439         if (!state)
440                 return SR_ERR_ARG;
441
442         /* Only a subset of known values is settable. */
443         if (state->mask & STATE_OUTPUT_ENABLED) {
444                 reg_value = state->output_enabled ? 1 : 0;
445                 switch (devc->model->model_type) {
446                 case MODEL_DPS:
447                         ret = rdtech_dps_set_reg(sdi, REG_DPS_ENABLE, reg_value);
448                         if (ret != SR_OK)
449                                 return ret;
450                         break;
451                 case MODEL_RD:
452                         ret = rdtech_rd_set_reg(sdi, REG_RD_ENABLE, reg_value);
453                         if (ret != SR_OK)
454                                 return ret;
455                         break;
456                 default:
457                         return SR_ERR_ARG;
458                 }
459         }
460         if (state->mask & STATE_VOLTAGE_TARGET) {
461                 reg_value = state->voltage_target * devc->voltage_multiplier;
462                 switch (devc->model->model_type) {
463                 case MODEL_DPS:
464                         ret = rdtech_dps_set_reg(sdi, REG_DPS_USET, reg_value);
465                         if (ret != SR_OK)
466                                 return ret;
467                         break;
468                 case MODEL_RD:
469                         ret = rdtech_rd_set_reg(sdi, REG_RD_VOLT_TGT, reg_value);
470                         if (ret != SR_OK)
471                                 return ret;
472                         break;
473                 default:
474                         return SR_ERR_ARG;
475                 }
476         }
477         if (state->mask & STATE_CURRENT_LIMIT) {
478                 reg_value = state->current_limit * devc->current_multiplier;
479                 switch (devc->model->model_type) {
480                 case MODEL_DPS:
481                         ret = rdtech_dps_set_reg(sdi, REG_DPS_ISET, reg_value);
482                         if (ret != SR_OK)
483                                 return ret;
484                         break;
485                 case MODEL_RD:
486                         ret = rdtech_rd_set_reg(sdi, REG_RD_CURR_LIM, reg_value);
487                         if (ret != SR_OK)
488                                 return ret;
489                         break;
490                 default:
491                         return SR_ERR_ARG;
492                 }
493         }
494         if (state->mask & STATE_OVP_THRESHOLD) {
495                 reg_value = state->ovp_threshold * devc->voltage_multiplier;
496                 switch (devc->model->model_type) {
497                 case MODEL_DPS:
498                         ret = rdtech_dps_set_reg(sdi, PRE_DPS_OVPSET, reg_value);
499                         if (ret != SR_OK)
500                                 return ret;
501                         break;
502                 case MODEL_RD:
503                         ret = rdtech_rd_set_reg(sdi, REG_RD_OVP_THR, reg_value);
504                         if (ret != SR_OK)
505                                 return ret;
506                         break;
507                 default:
508                         return SR_ERR_ARG;
509                 }
510         }
511         if (state->mask & STATE_OCP_THRESHOLD) {
512                 reg_value = state->ocp_threshold * devc->current_multiplier;
513                 switch (devc->model->model_type) {
514                 case MODEL_DPS:
515                         ret = rdtech_dps_set_reg(sdi, PRE_DPS_OCPSET, reg_value);
516                         if (ret != SR_OK)
517                                 return ret;
518                         break;
519                 case MODEL_RD:
520                         ret = rdtech_rd_set_reg(sdi, REG_RD_OCP_THR, reg_value);
521                         if (ret != SR_OK)
522                                 return ret;
523                         break;
524                 default:
525                         return SR_ERR_ARG;
526                 }
527         }
528         if (state->mask & STATE_LOCK) {
529                 switch (devc->model->model_type) {
530                 case MODEL_DPS:
531                         reg_value = state->lock ? 1 : 0;
532                         ret = rdtech_dps_set_reg(sdi, REG_DPS_LOCK, reg_value);
533                         if (ret != SR_OK)
534                                 return ret;
535                         break;
536                 case MODEL_RD:
537                         /* Do nothing, _and_ silently succeed. */
538                         break;
539                 default:
540                         return SR_ERR_ARG;
541                 }
542         }
543
544         return SR_OK;
545 }
546
547 /* Get the current state when acquisition starts. */
548 SR_PRIV int rdtech_dps_seed_receive(const struct sr_dev_inst *sdi)
549 {
550         struct dev_context *devc;
551         struct rdtech_dps_state state;
552         int ret;
553
554         ret = rdtech_dps_get_state(sdi, &state);
555         if (ret != SR_OK)
556                 return ret;
557
558         if (state.mask & STATE_PROTECT_OVP)
559                 devc->curr_ovp_state = state.protect_ovp;
560         if (state.mask & STATE_PROTECT_OCP)
561                 devc->curr_ocp_state = state.protect_ocp;
562         if (state.mask & STATE_REGULATION_CC)
563                 devc->curr_cc_state = state.regulation_cc;
564         if (state.mask & STATE_OUTPUT_ENABLED)
565                 devc->curr_out_state = state.output_enabled;
566
567         return SR_OK;
568 }
569
570 /* Get measurements, track state changes during acquisition. */
571 SR_PRIV int rdtech_dps_receive_data(int fd, int revents, void *cb_data)
572 {
573         struct sr_dev_inst *sdi;
574         struct dev_context *devc;
575         struct rdtech_dps_state state;
576         int ret;
577         struct sr_channel *ch;
578         const char *regulation_text;
579
580         (void)fd;
581         (void)revents;
582
583         sdi = cb_data;
584         if (!sdi)
585                 return TRUE;
586         devc = sdi->priv;
587
588         /* Get the device's current state. */
589         ret = rdtech_dps_get_state(sdi, &state);
590         if (ret != SR_OK)
591                 return ret;
592
593
594         /* Submit measurement data to the session feed. */
595         std_session_send_df_frame_begin(sdi);
596         ch = g_slist_nth_data(sdi->channels, 0);
597         send_value(sdi, ch, state.voltage,
598                 SR_MQ_VOLTAGE, SR_MQFLAG_DC, SR_UNIT_VOLT,
599                 devc->model->voltage_digits);
600         ch = g_slist_nth_data(sdi->channels, 1);
601         send_value(sdi, ch, state.current,
602                 SR_MQ_CURRENT, SR_MQFLAG_DC, SR_UNIT_AMPERE,
603                 devc->model->current_digits);
604         ch = g_slist_nth_data(sdi->channels, 2);
605         send_value(sdi, ch, state.power,
606                 SR_MQ_POWER, 0, SR_UNIT_WATT, 2);
607         std_session_send_df_frame_end(sdi);
608
609         /* Check for state changes. */
610         if (devc->curr_ovp_state != state.protect_ovp) {
611                 (void)sr_session_send_meta(sdi,
612                         SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE,
613                         g_variant_new_boolean(state.protect_ovp));
614                 devc->curr_ovp_state = state.protect_ovp;
615         }
616         if (devc->curr_ocp_state != state.protect_ocp) {
617                 (void)sr_session_send_meta(sdi,
618                         SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE,
619                         g_variant_new_boolean(state.protect_ocp));
620                 devc->curr_ocp_state = state.protect_ocp;
621         }
622         if (devc->curr_cc_state != state.regulation_cc) {
623                 regulation_text = state.regulation_cc ? "CC" : "CV";
624                 (void)sr_session_send_meta(sdi, SR_CONF_REGULATION,
625                         g_variant_new_string(regulation_text));
626                 devc->curr_cc_state = state.regulation_cc;
627         }
628         if (devc->curr_out_state != state.output_enabled) {
629                 (void)sr_session_send_meta(sdi, SR_CONF_ENABLED,
630                         g_variant_new_boolean(state.output_enabled));
631                 devc->curr_out_state = state.output_enabled;
632         }
633
634         /* Check optional acquisition limits. */
635         sr_sw_limits_update_samples_read(&devc->limits, 1);
636         if (sr_sw_limits_check(&devc->limits)) {
637                 sr_dev_acquisition_stop(sdi);
638                 return TRUE;
639         }
640
641         return TRUE;
642 }