From: Martin Ling <redacted>
Date: Sun, 30 Dec 2012 13:17:08 +0000 (+0100)
Subject: rigol-ds1xx2: Fix setting trigger parameters.
X-Git-Tag: dsupstream~377
X-Git-Url: https://sigrok.org/gitweb/?a=commitdiff_plain;h=4e108ace13f2dc577e2855e44dfc685b9cfd6204;hp=542843f76f4b2f780bf9ae6265f1a76841297d8a;p=libsigrok.git

rigol-ds1xx2: Fix setting trigger parameters.
---

diff --git a/hardware/rigol-ds1xx2/api.c b/hardware/rigol-ds1xx2/api.c
index 9de048a8..eb59ee2c 100644
--- a/hardware/rigol-ds1xx2/api.c
+++ b/hardware/rigol-ds1xx2/api.c
@@ -295,7 +295,7 @@ static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
 		break;
 	case SR_HWCAP_TRIGGER_SLOPE:
 		tmp_u64 = *(const int *)value;
-		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:%s\n", tmp_u64 ? "POS" : "NEG");
+		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n", tmp_u64 ? "POS" : "NEG");
 		break;
 	case SR_HWCAP_HORIZ_TRIGGERPOS:
 		tmp_float = *(const float *)value;
@@ -315,9 +315,11 @@ static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
 		else if (!strcmp(value, "AC Line"))
 			channel = "ACL";
 		else
+		{
 			ret = SR_ERR_ARG;
 			break;
-		rigol_ds1xx2_send_data(devc->fd, ":TRIG:SOUR %s\n", channel);
+		}
+		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
 		break;
 	case SR_HWCAP_VDIV:
 		/* TODO: Not supporting vdiv per channel yet. */