From: Frank Stettner Date: Mon, 4 Jan 2021 13:36:18 +0000 (+0100) Subject: arachnid-labs-re-load-pro: Fix for get voltage and current while in acquisition. X-Git-Url: https://sigrok.org/gitweb/?a=commitdiff_plain;ds=sidebyside;h=8fb9afcacd279e7c8febad89ba9d491ce9f8a164;hp=8fb9afcacd279e7c8febad89ba9d491ce9f8a164;p=libsigrok.git arachnid-labs-re-load-pro: Fix for get voltage and current while in acquisition. [ gsi: moved intruction order to unify with other cond signalling code paths ] ---