X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=uart%2Fhello_world%2FREADME;h=3fda4db2374edf3b9b4aa0acaf05c28206967eaf;hb=207cc70ff717a06938e7d64fb7fea0e8635c1347;hp=11d180b46857d3260802f455a55ecdd3e3946648;hpb=ab2a28319ba748c0ea86696681eba1d70a291c85;p=libsigrokdecode.git

diff --git a/uart/hello_world/README b/uart/hello_world/README
index 11d180b..3fda4db 100644
--- a/uart/hello_world/README
+++ b/uart/hello_world/README
@@ -11,7 +11,7 @@ Logic analyzer setup
 
 The logic analyzer used for capturing is a ChronoVu LA8 at a sample rate
 of 5MHz (for baud rates 921600 - 230400), 1MHz (for 115200 - 19200),
-and 625kHz (for baud rates 9600 - 110).
+and 625kHz (for baud rates 9600 - 1200).
 
 The ChronoVu LA8 probes were connected to the UART like this: