X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fyokogawa-dlm%2Fprotocol.c;h=e40066b0c0eeb9ed16bfc9e03f012c181ba629c3;hb=50ccb36f201bd6b2326822f585c01498fe6fd86a;hp=0dff00d625baf20920460c0ba21733434e6e8f24;hpb=4b25cbffa17c9b8c9c30f98ffe6918a15b664b2a;p=libsigrok.git

diff --git a/src/hardware/yokogawa-dlm/protocol.c b/src/hardware/yokogawa-dlm/protocol.c
index 0dff00d6..e40066b0 100644
--- a/src/hardware/yokogawa-dlm/protocol.c
+++ b/src/hardware/yokogawa-dlm/protocol.c
@@ -23,44 +23,26 @@
 #include "protocol.h"
 
 static const char *coupling_options[] = {
-	"AC",
-	"DC",
-	"DC50",
-	"GND",
+	"AC", "DC", "DC50", "GND",
 	NULL,
 };
 
 static const char *trigger_sources_2ch[] = {
-	"1",
-	"2",
-	"LINE",
-	"EXT",
+	"1", "2", "LINE", "EXT",
 	NULL,
 };
 
 /* TODO: Is BITx handled correctly or is Dx required? */
 static const char *trigger_sources_4ch[] = {
-	"1",
-	"2",
-	"3",
-	"4",
-	"LINE",
-	"EXT",
-	"BIT1",
-	"BIT2",
-	"BIT3",
-	"BIT4",
-	"BIT5",
-	"BIT6",
-	"BIT7",
-	"BIT8",
+	"1", "2", "3", "4",
+	"LINE", "EXT", "BIT1",
+	"BIT2", "BIT3", "BIT4", "BIT5", "BIT6", "BIT7", "BIT8",
 	NULL,
 };
 
 /* Note: Values must correlate to the trigger_slopes values. */
 const char *dlm_trigger_slopes[3] = {
-	"r",
-	"f",
+	"r", "f",
 	NULL,
 };
 
@@ -130,56 +112,18 @@ const uint64_t dlm_vdivs[17][2] = {
 };
 
 static const char *scope_analog_channel_names[] = {
-	"1",
-	"2",
-	"3",
-	"4",
+	"1", "2", "3", "4",
 };
 
 static const char *scope_digital_channel_names_8[] = {
-	"D0",
-	"D1",
-	"D2",
-	"D3",
-	"D4",
-	"D5",
-	"D6",
-	"D7",
+	"D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 };
 
 static const char *scope_digital_channel_names_32[] = {
-	"A0",
-	"A1",
-	"A2",
-	"A3",
-	"A4",
-	"A5",
-	"A6",
-	"A7",
-	"B0",
-	"B1",
-	"B2",
-	"B3",
-	"B4",
-	"B5",
-	"B6",
-	"B7",
-	"C0",
-	"C1",
-	"C2",
-	"C3",
-	"C4",
-	"C5",
-	"C6",
-	"C7",
-	"D0",
-	"D1",
-	"D2",
-	"D3",
-	"D4",
-	"D5",
-	"D6",
-	"D7",
+	"A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7",
+	"B0", "B1", "B2", "B3", "B4", "B5", "B6", "B7",
+	"C0", "C1", "C2", "C3", "C4", "C5", "C6", "C7",
+	"D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
 };
 
 static const struct scope_config scope_models[] = {
@@ -454,7 +398,7 @@ static int analog_channel_state_get(const struct sr_dev_inst *sdi,
 		if (dlm_analog_chan_vdiv_get(scpi, i + 1, &response) != SR_OK)
 			return SR_ERR;
 
-		if (array_float_get(response, dlm_vdivs, ARRAY_SIZE(dlm_vdivs),
+		if (array_float_get(response, ARRAY_AND_SIZE(dlm_vdivs),
 				&j) != SR_OK) {
 			g_free(response);
 			return SR_ERR;
@@ -692,8 +636,7 @@ SR_PRIV int dlm_scope_state_query(struct sr_dev_inst *sdi)
 	if (dlm_timebase_get(sdi->conn, &response) != SR_OK)
 		return SR_ERR;
 
-	if (array_float_get(response, dlm_timebases,
-			ARRAY_SIZE(dlm_timebases), &i) != SR_OK) {
+	if (array_float_get(response, ARRAY_AND_SIZE(dlm_timebases), &i) != SR_OK) {
 		g_free(response);
 		return SR_ERR;
 	}