X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fsysclk-lwla%2Fprotocol.h;h=ebfc704a97417b7737f8cd1c7fb11ac0fba93639;hb=24f4a9d50bb93c83cf610a789d0f618970f454ef;hp=e8a66cf3e4821ea2396c1920166bf96f13a70d6f;hpb=ef7df53d3609413341b521ab64f223f80e49a01a;p=libsigrok.git

diff --git a/src/hardware/sysclk-lwla/protocol.h b/src/hardware/sysclk-lwla/protocol.h
index e8a66cf3..ebfc704a 100644
--- a/src/hardware/sysclk-lwla/protocol.h
+++ b/src/hardware/sysclk-lwla/protocol.h
@@ -59,7 +59,7 @@ enum {
 enum {
 	USB_CONFIG	= 1,
 	USB_INTERFACE	= 0,
-	USB_TIMEOUT_MS	= 3000,
+	USB_TIMEOUT_MS	= 1000,
 };
 
 /** USB device end points.
@@ -129,6 +129,7 @@ struct dev_context {
 	const struct model_info *model;		/* device model descriptor */
 	struct acquisition_state *acquisition;	/* running capture state */
 	int active_fpga_config;			/* FPGA configuration index */
+	gboolean short_transfer_quirk;		/* 64 bytes response limit */
 
 	enum protocol_state state;	/* async protocol state */
 	gboolean cancel_requested;	/* stop after current transfer */
@@ -139,7 +140,6 @@ struct dev_context {
 	enum signal_edge cfg_clock_edge;	/* ext clock edge setting */
 	enum trigger_source cfg_trigger_source;	/* trigger source setting */
 	enum signal_edge cfg_trigger_slope;	/* ext trigger slope setting */
-
 };
 
 /** LWLA model descriptor.