X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fsysclk-lwla%2Fprotocol.h;h=0db4bc79eb19fa7b71e7380019fe1cea84306949;hb=3b316fdca049e3c2b5641be6e3341afcb46d613f;hp=9ef21b05de0b26d6505af25b085e441cafb28921;hpb=93ed0241aaf6e791e113b741435fa857891e86c2;p=libsigrok.git

diff --git a/src/hardware/sysclk-lwla/protocol.h b/src/hardware/sysclk-lwla/protocol.h
index 9ef21b05..0db4bc79 100644
--- a/src/hardware/sysclk-lwla/protocol.h
+++ b/src/hardware/sysclk-lwla/protocol.h
@@ -20,15 +20,13 @@
 #ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
 #define LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
 
-#define LOG_PREFIX "sysclk-lwla"
-
 #include <stdint.h>
 #include <libusb.h>
 #include <glib.h>
 #include <libsigrok/libsigrok.h>
 #include <libsigrok-internal.h>
 
-#define VENDOR_NAME	"SysClk"
+#define LOG_PREFIX "sysclk-lwla"
 
 /* Maximum configurable sample count limit.
  * Due to compression, there is no meaningful hardware limit the driver
@@ -46,46 +44,40 @@
 
 struct acquisition_state;
 
-/* USB vendor and product IDs.
- */
+/* USB vendor and product IDs. */
 enum {
 	USB_VID_SYSCLK   = 0x2961,
 	USB_PID_LWLA1016 = 0x6688,
 	USB_PID_LWLA1034 = 0x6689,
 };
 
-/* USB device characteristics.
- */
+/* USB device characteristics. */
 enum {
 	USB_CONFIG	= 1,
 	USB_INTERFACE	= 0,
-	USB_TIMEOUT_MS	= 3000,
+	USB_TIMEOUT_MS	= 1000,
 };
 
-/** USB device end points.
- */
+/** USB device end points. */
 enum usb_endpoint {
 	EP_COMMAND = 2,
 	EP_CONFIG  = 4,
 	EP_REPLY   = 6 | LIBUSB_ENDPOINT_IN
 };
 
-/** LWLA1034 clock sources.
- */
+/** LWLA1034 clock sources. */
 enum clock_source {
 	CLOCK_INTERNAL = 0,
 	CLOCK_EXT_CLK,
 };
 
-/** LWLA1034 trigger sources.
- */
+/** LWLA1034 trigger sources. */
 enum trigger_source {
 	TRIGGER_CHANNELS = 0,
 	TRIGGER_EXT_TRG,
 };
 
-/** Edge choices for the LWLA1034 external clock and trigger inputs.
- */
+/** Edge choices for the LWLA1034 external clock and trigger inputs. */
 enum signal_edge {
 	EDGE_POSITIVE = 0,
 	EDGE_NEGATIVE,
@@ -96,8 +88,7 @@ enum {
 	FPGA_NOCONF = -1,
 };
 
-/** Acquisition protocol states.
- */
+/** Acquisition protocol states. */
 enum protocol_state {
 	/* idle states */
 	STATE_IDLE = 0,
@@ -114,16 +105,12 @@ enum protocol_state {
 	STATE_READ_REQUEST,
 };
 
-/** Private, per-device-instance driver context.
- */
 struct dev_context {
 	uint64_t samplerate;	/* requested samplerate */
-
 	uint64_t limit_msec;	/* requested capture duration in ms */
 	uint64_t limit_samples;	/* requested capture length in samples */
 
-	uint64_t channel_mask;	/* bit mask of enabled channels */
-
+	uint64_t channel_mask;		/* bit mask of enabled channels */
 	uint64_t trigger_mask;		/* trigger enable mask */
 	uint64_t trigger_edge_mask;	/* trigger type mask */
 	uint64_t trigger_values;	/* trigger level/slope bits */
@@ -131,6 +118,7 @@ struct dev_context {
 	const struct model_info *model;		/* device model descriptor */
 	struct acquisition_state *acquisition;	/* running capture state */
 	int active_fpga_config;			/* FPGA configuration index */
+	gboolean short_transfer_quirk;		/* 64 bytes response limit */
 
 	enum protocol_state state;	/* async protocol state */
 	gboolean cancel_requested;	/* stop after current transfer */
@@ -141,11 +129,9 @@ struct dev_context {
 	enum signal_edge cfg_clock_edge;	/* ext clock edge setting */
 	enum trigger_source cfg_trigger_source;	/* trigger source setting */
 	enum signal_edge cfg_trigger_slope;	/* ext trigger slope setting */
-
 };
 
-/** LWLA model descriptor.
- */
+/** LWLA model descriptor. */
 struct model_info {
 	char name[12];
 	int num_channels;
@@ -164,8 +150,8 @@ struct model_info {
 	int (*handle_response)(const struct sr_dev_inst *sdi);
 };
 
-SR_PRIV const struct model_info lwla1016_info;
-SR_PRIV const struct model_info lwla1034_info;
+extern SR_PRIV const struct model_info lwla1016_info;
+extern SR_PRIV const struct model_info lwla1034_info;
 
 SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);