X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fsysclk-lwla%2Flwla1034.c;h=a4bda3683016c9f4918ba8c0e08ad1ba1092c280;hb=4a465510fb2a427089f3460da599a4dda6e4a146;hp=62de549a639b2bd4f2ccec66f14aa7a8fbbc7429;hpb=786485772ffd28dfb1ca7375ca64118ccd7af25c;p=libsigrok.git diff --git a/src/hardware/sysclk-lwla/lwla1034.c b/src/hardware/sysclk-lwla/lwla1034.c index 62de549a..a4bda368 100644 --- a/src/hardware/sysclk-lwla/lwla1034.c +++ b/src/hardware/sysclk-lwla/lwla1034.c @@ -208,9 +208,7 @@ static void read_response(struct acquisition_state *acq) uint64_t sample, high_nibbles, word; uint32_t *slice; uint8_t *out_p; - unsigned int words_left; - unsigned int max_samples, run_samples; - unsigned int wi, ri, si; + unsigned int words_left, max_samples, run_samples, wi, ri, si; /* Number of 36-bit words remaining in the transfer buffer. */ words_left = MIN(acq->mem_addr_next, acq->mem_addr_stop) @@ -239,13 +237,13 @@ static void read_response(struct acquisition_state *acq) acq->samples_done += run_samples; if (run_samples == max_samples) - break; /* packet full or sample limit reached */ + break; /* Packet full or sample limit reached. */ if (wi >= words_left) - break; /* done with current transfer */ + break; /* Done with current transfer. */ /* Get the current slice of 8 packed 36-bit words. */ slice = &acq->xfer_buf_in[(acq->in_index + wi) / 8 * 9]; - si = (acq->in_index + wi) % 8; /* word index within slice */ + si = (acq->in_index + wi) % 8; /* Word index within slice. */ /* Extract the next 36-bit word. */ high_nibbles = LWLA_TO_UINT32(slice[8]); @@ -262,6 +260,7 @@ static void read_response(struct acquisition_state *acq) acq->rle = RLE_STATE_DATA; } } + acq->in_index += wi; acq->mem_addr_done += wi; } @@ -279,15 +278,13 @@ static int detect_short_transfer_quirk(const struct sr_dev_inst *sdi) { struct dev_context *devc; struct sr_usb_dev_inst *usb; - int xfer_len; - int ret; + int xfer_len, ret; uint16_t command[3]; unsigned char buf[512]; - const int lreg_count = 10; devc = sdi->priv; - usb = sdi->conn; + usb = sdi->conn; command[0] = LWLA_WORD(CMD_READ_LREGS); command[1] = LWLA_WORD(0); @@ -326,8 +323,7 @@ static int apply_fpga_config(const struct sr_dev_inst *sdi) { struct dev_context *devc; struct drv_context *drvc; - int config; - int ret; + int config, ret; devc = sdi->priv; drvc = sdi->driver->context; @@ -342,7 +338,7 @@ static int apply_fpga_config(const struct sr_dev_inst *sdi) config = FPGA_EXTNEG; if (config == devc->active_fpga_config) - return SR_OK; /* no change */ + return SR_OK; /* No change. */ ret = lwla_send_bitstream(drvc->sr_ctx, sdi->conn, bitstream_map[config]); @@ -358,9 +354,7 @@ static int device_init_check(const struct sr_dev_inst *sdi) uint64_t value; int ret; - ret = read_long_reg(sdi->conn, LREG_TEST_ID, &value); - if (ret != SR_OK) - return ret; + read_long_reg(sdi->conn, LREG_TEST_ID, &value); /* Ignore the value returned by the first read. */ ret = read_long_reg(sdi->conn, LREG_TEST_ID, &value); @@ -379,32 +373,30 @@ static int device_init_check(const struct sr_dev_inst *sdi) */ static int setup_acquisition(const struct sr_dev_inst *sdi) { - uint64_t divider_count; - uint64_t trigger_mask; + static const struct regval capture_init[] = { + {REG_MEM_CTRL, MEM_CTRL_CLR_IDX}, + {REG_MEM_CTRL, MEM_CTRL_WRITE}, + {REG_LONG_ADDR, LREG_CAP_CTRL}, + {REG_LONG_LOW, CAP_CTRL_CLR_TIMEBASE | CAP_CTRL_FLUSH_FIFO | + CAP_CTRL_CLR_FIFOFULL | CAP_CTRL_CLR_COUNTER}, + {REG_LONG_HIGH, 0}, + {REG_LONG_STROBE, 0}, + }; + uint64_t divider_count, trigger_mask; struct dev_context *devc; struct sr_usb_dev_inst *usb; struct acquisition_state *acq; int ret; devc = sdi->priv; - usb = sdi->conn; - acq = devc->acquisition; - - acq->reg_seq_pos = 0; - acq->reg_seq_len = 0; - - lwla_queue_regval(acq, REG_MEM_CTRL, MEM_CTRL_CLR_IDX); - lwla_queue_regval(acq, REG_MEM_CTRL, MEM_CTRL_WRITE); - - queue_long_regval(acq, LREG_CAP_CTRL, - CAP_CTRL_CLR_TIMEBASE | CAP_CTRL_FLUSH_FIFO | - CAP_CTRL_CLR_FIFOFULL | CAP_CTRL_CLR_COUNTER); - - lwla_queue_regval(acq, REG_CLK_BOOST, acq->clock_boost); + usb = sdi->conn; + acq = devc->acquisition; - ret = lwla_write_regs(usb, acq->reg_sequence, acq->reg_seq_len); - acq->reg_seq_len = 0; + ret = lwla_write_regs(usb, capture_init, ARRAY_SIZE(capture_init)); + if (ret != SR_OK) + return ret; + ret = lwla_write_reg(usb, REG_CLK_BOOST, acq->clock_boost); if (ret != SR_OK) return ret; @@ -422,7 +414,7 @@ static int setup_acquisition(const struct sr_dev_inst *sdi) bulk_long_set(acq, LREG_DIV_COUNT, divider_count); bulk_long_set(acq, LREG_TRG_VALUE, devc->trigger_values); - bulk_long_set(acq, LREG_TRG_TYPE, devc->trigger_edge_mask); + bulk_long_set(acq, LREG_TRG_TYPE, devc->trigger_edge_mask); trigger_mask = devc->trigger_mask; @@ -525,7 +517,7 @@ static int handle_response(const struct sr_dev_inst *sdi) int expect_len; devc = sdi->priv; - acq = devc->acquisition; + acq = devc->acquisition; switch (devc->state) { case STATE_STATUS_REQUEST: @@ -535,7 +527,7 @@ static int handle_response(const struct sr_dev_inst *sdi) return SR_ERR; } acq->mem_addr_fill = bulk_long_get(acq, LREG_MEM_FILL) & 0xFFFFFFFF; - acq->duration_now = bulk_long_get(acq, LREG_DURATION); + acq->duration_now = bulk_long_get(acq, LREG_DURATION); /* Shift left by one so the bit positions match the LWLA1016. */ acq->status = (bulk_long_get(acq, LREG_STATUS) & 0x3F) << 1; /*