X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fsysclk-lwla%2Flwla.h;h=35e33f79ef8a8cf48069559cfb26925467f9abd5;hb=62974b235a5c5aeaacad5d28a50aef39f528dccd;hp=7bd5886415519524131774f8b30dd9cba81ca79f;hpb=be64f90b53d09d9720dc6e06ff8ab61d96c03932;p=libsigrok.git

diff --git a/src/hardware/sysclk-lwla/lwla.h b/src/hardware/sysclk-lwla/lwla.h
index 7bd58864..35e33f79 100644
--- a/src/hardware/sysclk-lwla/lwla.h
+++ b/src/hardware/sysclk-lwla/lwla.h
@@ -48,7 +48,8 @@ struct sr_usb_dev_inst;
 #define LWLA_WORD_3(val) GUINT16_TO_LE(((val) >> 32) & 0xFFFF)
 
 /* Maximum number of 16-bit words sent at a time during acquisition.
- * Used for allocating the libusb transfer buffer.
+ * Used for allocating the libusb transfer buffer. Keep this even so that
+ * subsequent members are always 32-bit aligned.
  */
 #define MAX_ACQ_SEND_LEN16	64 /* 43 for capture setup plus stuffing */
 
@@ -60,7 +61,7 @@ struct sr_usb_dev_inst;
 
 /* Maximum length of a register read/write sequence.
  */
-#define MAX_REG_SEQ_LEN		16
+#define MAX_REG_SEQ_LEN		8
 
 /* Logic datafeed packet size in bytes.
  * This is a multiple of both 4 and 5 to match any model's unit size
@@ -68,14 +69,6 @@ struct sr_usb_dev_inst;
  */
 #define PACKET_SIZE		(5000 * 4 * 5)
 
-/** USB device end points.
- */
-enum usb_endpoint {
-	EP_COMMAND = 2,
-	EP_CONFIG  = 4,
-	EP_REPLY   = 6 | LIBUSB_ENDPOINT_IN
-};
-
 /** LWLA protocol command ID codes.
  */
 enum command_id {
@@ -90,7 +83,7 @@ enum command_id {
 /** LWLA capture state flags.
  * The bit positions are the same as in the LWLA1016 control register.
  */
-enum {
+enum status_flag {
 	STATUS_CAPTURING = 1 << 2,
 	STATUS_TRIGGERED = 1 << 5,
 	STATUS_MEM_AVAIL = 1 << 6,
@@ -124,13 +117,13 @@ struct acquisition_state {
 	struct libusb_transfer *xfer_in;	/* USB in transfer record */
 	struct libusb_transfer *xfer_out;	/* USB out transfer record */
 
-	size_t mem_addr_fill;	/* capture memory fill level */
-	size_t mem_addr_done;	/* position up to which data was received */
-	size_t mem_addr_next;	/* start address for next async read */
-	size_t mem_addr_stop;	/* end of memory range to be read */
-	size_t in_index;	/* position in read transfer buffer */
-	size_t out_index;	/* position in logic packet buffer */
-	enum rle_state rle;	/* RLE decoding state */
+	unsigned int mem_addr_fill;	/* capture memory fill level */
+	unsigned int mem_addr_done;	/* next address to be processed */
+	unsigned int mem_addr_next;	/* start address for next async read */
+	unsigned int mem_addr_stop;	/* end of memory range to be read */
+	unsigned int in_index;		/* position in read transfer buffer */
+	unsigned int out_index;		/* position in logic packet buffer */
+	enum rle_state rle;		/* RLE decoding state */
 
 	gboolean rle_enabled;	/* capturing in timing-state mode */
 	gboolean clock_boost;	/* switch to faster clock during capture */
@@ -161,7 +154,7 @@ SR_PRIV int lwla_send_command(const struct sr_usb_dev_inst *usb,
 			      const uint16_t *command, int cmd_len);
 
 SR_PRIV int lwla_receive_reply(const struct sr_usb_dev_inst *usb,
-			       uint32_t *reply, int reply_len, int expect_len);
+			       void *reply, int buf_size, int *xfer_len);
 
 SR_PRIV int lwla_read_reg(const struct sr_usb_dev_inst *usb,
 			  uint16_t reg, uint32_t *value);