X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fscpi-pps%2Fprofiles.c;h=45feb72f2d8fce6cf5e2679718c9dc01a290a2a4;hb=5433907ed99c40e948b8350f55845dd88a5cbbe6;hp=c9e8632c7b0ed1001dcb122241c8edbce081be5f;hpb=fd2433153a3e2c2681d637f715c19f2b6f40fcc9;p=libsigrok.git diff --git a/src/hardware/scpi-pps/profiles.c b/src/hardware/scpi-pps/profiles.c index c9e8632c..45feb72f 100644 --- a/src/hardware/scpi-pps/profiles.c +++ b/src/hardware/scpi-pps/profiles.c @@ -486,7 +486,6 @@ static const struct scpi_command hp_6630a_cmd[] = { static int hp_6630a_init_acquisition(const struct sr_dev_inst *sdi) { struct sr_scpi_dev_inst *scpi; - int ret; scpi = sdi->conn; @@ -494,11 +493,7 @@ static int hp_6630a_init_acquisition(const struct sr_dev_inst *sdi) * Monitor CV (1), CC+ (2), UR (4), OVP (8), OTP (16), OCP (64) and * CC- (256) bits of the Status Register for the FAULT? query. */ - ret = sr_scpi_send(scpi, "UNMASK 607"); - if (ret != SR_OK) - return ret; - - return SR_OK; + return sr_scpi_send(scpi, "UNMASK 607"); } static int hp_6630a_update_status(const struct sr_dev_inst *sdi) @@ -553,7 +548,7 @@ static int hp_6630a_update_status(const struct sr_dev_inst *sdi) regulation_changed = (fault & (1 << 9)) | regulation_changed; if (regulation_changed) { - if (cv && !cc_pos && !cc_neg &&!unreg) + if (cv && !cc_pos && !cc_neg && !unreg) regulation = "CV"; else if (cc_pos && !cv && !cc_neg && !unreg) regulation = "CC"; @@ -561,7 +556,7 @@ static int hp_6630a_update_status(const struct sr_dev_inst *sdi) regulation = "CC-"; else if (unreg && !cv && !cc_pos && !cc_neg) regulation = "UR"; - else if (!cv && !cc_pos && !cc_neg &&!unreg) + else if (!cv && !cc_pos && !cc_neg && !unreg) regulation = ""; else { sr_dbg("Undefined regulation for HP 66xxA " @@ -621,6 +616,10 @@ static const struct channel_spec hp_6632b_ch[] = { { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, }; +static const struct channel_spec hp_66312a_ch[] = { + { "1", { 0, 20.475, 0.0001, 4, 5 }, { 0, 2.0475, 0.0001, 4, 5 }, { 0, 41.92256 }, FREQ_DC_ONLY, { 0, 22, 0.01 }, NO_OCP_LIMITS }, +}; + static const struct channel_spec hp_66332a_ch[] = { { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, }; @@ -779,8 +778,8 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) /* * Check if output state has changed, due to one of the * questionable states changed. - * NOTE: The output state is send even if it hasn't changed, but that - * only happends rarely. + * NOTE: The output state is sent even if it hasn't changed, + * but that only happens rarely. */ ret = sr_scpi_get_bool(scpi, "OUTP:STAT?", &output_enabled); if (ret != SR_OK) @@ -812,7 +811,7 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) } if (regulation_changed) { - if (cv && !cc_pos && !cc_neg &&!unreg) + if (cv && !cc_pos && !cc_neg && !unreg) regulation = "CV"; else if (cc_pos && !cv && !cc_neg && !unreg) regulation = "CC"; @@ -820,11 +819,11 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) regulation = "CC-"; else if (unreg && !cv && !cc_pos && !cc_neg) regulation = "UR"; - else if (!cv && !cc_pos && !cc_neg &&!unreg) - /* This happends in case of OCP active */ + else if (!cv && !cc_pos && !cc_neg && !unreg) + /* This happens in case of OCP active. */ regulation = ""; else { - /* This happends from time to time (CV and CC+ active). */ + /* This happens from time to time (CV and CC+ active). */ sr_dbg("Undefined regulation for HP 66xxB " "(CV=%i, CC+=%i, CC-=%i, UR=%i).", cv, cc_pos, cc_neg, unreg); @@ -837,6 +836,53 @@ static int hp_6630b_update_status(const struct sr_dev_inst *sdi) return SR_OK; } +/* Owon P4000 series */ +static const uint32_t owon_p4000_devopts[] = { + SR_CONF_CONTINUOUS, + SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, + SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET +}; + +static const uint32_t owon_p4000_devopts_cg[] = { + SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, + SR_CONF_VOLTAGE | SR_CONF_GET, + SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_CURRENT | SR_CONF_GET, + SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, + SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, +}; + +static const struct channel_spec owon_p4603_ch[] = { + { "1", { 0.01, 60, 0.001, 3, 3 }, { 0.001, 3, 0.001, 3, 3 }, { 0, 180, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 61, 0.001}, { 0.001, 3.1, 0.001} }, +}; + +static const struct channel_spec owon_p4305_ch[] = { + { "1", { 0.01, 30, 0.001, 3, 3 }, { 0.001, 5, 0.001, 3, 3 }, { 0, 180, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 31, 0.001}, { 0.001, 3.1, 0.001} }, +}; + +static const struct channel_group_spec owon_p4000_cg[] = { + { "1", CH_IDX(0), PPS_OVP | PPS_OCP, SR_MQFLAG_DC }, +}; + +static const struct scpi_command owon_p4000_cmd[] = { + { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" }, + { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, + { SCPI_CMD_GET_MEAS_POWER, "MEAS:POW?" }, + { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" }, + { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" }, + { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" }, + { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" }, + { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" }, + { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP 1" }, + { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP 0" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM?" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:LIM %.6f" }, + { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM?" }, + { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, "CURR:LIM %.6f" }, + ALL_ZERO +}; + /* Philips/Fluke PM2800 series */ static const uint32_t philips_pm2800_devopts[] = { SR_CONF_CONTINUOUS, @@ -1038,6 +1084,83 @@ static const struct scpi_command rs_hmc8043_cmd[] = { ALL_ZERO }; +static const uint32_t rs_hmp4040_devopts[] = { + SR_CONF_CONTINUOUS, + SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, + SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, +}; + +static const uint32_t rs_hmp4040_devopts_cg[] = { + SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET, + SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, + SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, + SR_CONF_VOLTAGE | SR_CONF_GET, + SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_CURRENT | SR_CONF_GET, + SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, + SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, + SR_CONF_OVER_TEMPERATURE_PROTECTION_ACTIVE | SR_CONF_GET, + SR_CONF_REGULATION | SR_CONF_GET, +}; + +static const struct channel_spec rs_hmp2020_ch[] = { + { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, +}; + +static const struct channel_spec rs_hmp2030_ch[] = { + { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 5.01, 0.0001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, +}; + +static const struct channel_spec rs_hmp4040_ch[] = { + { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, + { "4", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 10.01, 0.0002, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, +}; + +static const struct channel_group_spec rs_hmp4040_cg[] = { + { "1", CH_IDX(0), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, + { "2", CH_IDX(1), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, + { "3", CH_IDX(2), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, + { "4", CH_IDX(3), PPS_OVP | PPS_OTP, SR_MQFLAG_DC }, +}; + +/* + * Developer's note: Currently unused device commands. Some of them + * are not in use because SCPI_CMD codes are not defined yet. + * OUTP:GEN + * VOLT? MAX, CURR? MAX + * VOLT:PROT:CLE (could set SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE) + * VOLT:PROT:MODE + * FUSE:STAT, FUSE:TRIP?, FUSE:LINK, FUSE:UNL + * ARB:... + * SYST:LOC, SYST:REM, SYST:RWL, SYST:MIX + * SYST:BEEP:IMM + */ +static const struct scpi_command rs_hmp4040_cmd[] = { + { SCPI_CMD_REMOTE, "SYST:REM" }, + { SCPI_CMD_LOCAL, "SYST:LOC" }, + { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" }, + { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" }, + { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, + { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" }, + { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" }, + { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" }, + { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" }, + { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" }, + { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" }, + { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" }, + { SCPI_CMD_GET_OUTPUT_REGULATION, "STAT:QUES:INST:ISUM%s:COND?" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" }, + { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION_ACTIVE, "STAT:QUES:INST:ISUM%s:COND?" }, + ALL_ZERO +}; + SR_PRIV const struct scpi_pps pps_profiles[] = { /* Agilent N5763A */ { "Agilent", "N5763A", SCPI_DIALECT_UNKNOWN, 0, @@ -1225,6 +1348,18 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { hp_6630b_update_status, }, + /* HP 66312A */ + { "HP", "66312A", SCPI_DIALECT_HP_66XXB, PPS_OTP, + ARRAY_AND_SIZE(hp_6630b_devopts), + ARRAY_AND_SIZE(hp_6630b_devopts_cg), + ARRAY_AND_SIZE(hp_66312a_ch), + ARRAY_AND_SIZE(hp_6630b_cg), + hp_6630b_cmd, + .probe_channels = NULL, + hp_6630b_init_acquisition, + hp_6630b_update_status, + }, + /* HP 66332A */ { "HP", "66332A", SCPI_DIALECT_HP_66XXB, PPS_OTP, ARRAY_AND_SIZE(hp_6630b_devopts), @@ -1315,6 +1450,28 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { .update_status = NULL, }, + /* Owon P4000 series */ + { "OWON", "^P4305$", SCPI_DIALECT_UNKNOWN, 0, + ARRAY_AND_SIZE(owon_p4000_devopts), + ARRAY_AND_SIZE(owon_p4000_devopts_cg), + ARRAY_AND_SIZE(owon_p4305_ch), + ARRAY_AND_SIZE(owon_p4000_cg), + owon_p4000_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "OWON", "^P4603$", SCPI_DIALECT_UNKNOWN, 0, + ARRAY_AND_SIZE(owon_p4000_devopts), + ARRAY_AND_SIZE(owon_p4000_devopts_cg), + ARRAY_AND_SIZE(owon_p4603_ch), + ARRAY_AND_SIZE(owon_p4000_cg), + owon_p4000_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + /* Philips/Fluke PM2800 series */ { "Philips", "^PM28[13][123]/[01234]{1,2}$", SCPI_DIALECT_PHILIPS, 0, ARRAY_AND_SIZE(philips_pm2800_devopts), @@ -1338,6 +1495,69 @@ SR_PRIV const struct scpi_pps pps_profiles[] = { .init_acquisition = NULL, .update_status = NULL, }, + + /* Hameg / Rohde&Schwarz HMP4000 series */ + /* TODO Match on regex, pass scpi_pps item to .probe_channels(). */ + { "HAMEG", "HMP4030", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp4040_ch, 3, + rs_hmp4040_cg, 3, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "HAMEG", "HMP4040", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + ARRAY_AND_SIZE(rs_hmp4040_ch), + ARRAY_AND_SIZE(rs_hmp4040_cg), + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP2020", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp2020_ch, 2, + rs_hmp4040_cg, 2, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP2030", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp2030_ch, 3, + rs_hmp4040_cg, 3, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP4030", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + rs_hmp4040_ch, 3, + rs_hmp4040_cg, 3, + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, + { "ROHDE&SCHWARZ", "HMP4040", SCPI_DIALECT_HMP, 0, + ARRAY_AND_SIZE(rs_hmp4040_devopts), + ARRAY_AND_SIZE(rs_hmp4040_devopts_cg), + ARRAY_AND_SIZE(rs_hmp4040_ch), + ARRAY_AND_SIZE(rs_hmp4040_cg), + rs_hmp4040_cmd, + .probe_channels = NULL, + .init_acquisition = NULL, + .update_status = NULL, + }, }; SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);