X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fopenbench-logic-sniffer%2Fapi.c;fp=src%2Fhardware%2Fopenbench-logic-sniffer%2Fapi.c;h=c8915fbbed3e316e1fbc8a14e363f9a200570bf6;hb=a2b1a53bb41336756688f98aeecb16072ec95543;hp=5cf415df8ac95fe33f2df21e0895ba376b1fa9e2;hpb=f1a37f39244d97bcd3abb1c29d6a71e9b9edfefe;p=libsigrok.git

diff --git a/src/hardware/openbench-logic-sniffer/api.c b/src/hardware/openbench-logic-sniffer/api.c
index 5cf415df..c8915fbb 100644
--- a/src/hardware/openbench-logic-sniffer/api.c
+++ b/src/hardware/openbench-logic-sniffer/api.c
@@ -440,7 +440,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 			return SR_ERR;
 
 		delaycount = readcount * (1 - devc->capture_ratio / 100.0);
-		devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
+		devc->trigger_at_smpl = (readcount - delaycount) * 4 - devc->num_stages;
 		for (i = 0; i <= devc->num_stages; i++) {
 			sr_dbg("Setting OLS stage %d trigger.", i);
 			if ((ret = set_trigger(sdi, i)) != SR_OK)