X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fhantek-dso%2Fdso.h;h=44cced48400605bad020554ade3fd3e950ab764e;hb=3591481e871eec154a764e1c78004095144de5b5;hp=edccb725cf3830bc873833e6e4856e3468392a59;hpb=155b680da482cea2381becb73c51cfb838bff31e;p=libsigrok.git

diff --git a/src/hardware/hantek-dso/dso.h b/src/hardware/hantek-dso/dso.h
index edccb725..44cced48 100644
--- a/src/hardware/hantek-dso/dso.h
+++ b/src/hardware/hantek-dso/dso.h
@@ -49,7 +49,7 @@
 #define EEPROM_CHANNEL_OFFSETS  0x08
 
 /* All models have this for their "fast" mode. */
-#define FRAMESIZE_SMALL         10240
+#define FRAMESIZE_SMALL         (10 * 1024)
 
 enum control_requests {
 	CTRL_READ_EEPROM = 0xa2,
@@ -154,10 +154,10 @@ struct dso_profile {
 	/* VID/PID after firmware upload */
 	uint16_t fw_vid;
 	uint16_t fw_pid;
-	char *vendor;
-	char *model;
+	const char *vendor;
+	const char *model;
 	const uint64_t *buffersizes;
-	char *firmware;
+	const char *firmware;
 };
 
 struct dev_context {
@@ -180,19 +180,15 @@ struct dev_context {
 	int timebase;
 	gboolean ch1_enabled;
 	gboolean ch2_enabled;
-	int voltage_ch1;
-	int voltage_ch2;
-	int coupling_ch1;
-	int coupling_ch2;
+	int voltage[2];
+	int coupling[2];
 	// voltage offset (vertical position)
 	float voffset_ch1;
 	float voffset_ch2;
 	float voffset_trigger;
 	uint16_t channel_levels[2][9][2];
 	unsigned int framesize;
-	gboolean filter_ch1;
-	gboolean filter_ch2;
-	gboolean filter_trigger;
+	gboolean filter[2];
 	int triggerslope;
 	char *triggersource;
 	float triggerposition;