X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Ffx2lafw%2Fapi.c;h=54db1f36510802b2b609130b8839c513fee63bfc;hb=4d399734b4ec7affb58c5881ea1b8d88eaa57d53;hp=368873abaeec7f316efc7c8c84c5d24c6daac2e2;hpb=c01bf34ca264b268fee2e71ab918c71d28dc3018;p=libsigrok.git

diff --git a/src/hardware/fx2lafw/api.c b/src/hardware/fx2lafw/api.c
index 368873ab..54db1f36 100644
--- a/src/hardware/fx2lafw/api.c
+++ b/src/hardware/fx2lafw/api.c
@@ -21,6 +21,7 @@
 #include <config.h>
 #include "protocol.h"
 #include "dslogic.h"
+#include <math.h>
 
 static const struct fx2lafw_profile supported_fx2[] = {
 	/*
@@ -125,7 +126,7 @@ static const uint32_t scanopts[] = {
 };
 
 static const uint32_t devopts[] = {
-	SR_CONF_CONTINUOUS | SR_CONF_SET,
+	SR_CONF_CONTINUOUS,
 	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 	SR_CONF_CONN | SR_CONF_GET,
 	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
@@ -133,6 +134,18 @@ static const uint32_t devopts[] = {
 	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
 };
 
+static const uint32_t dslogic_devopts[] = {
+	SR_CONF_CONTINUOUS | SR_CONF_SET | SR_CONF_GET,
+	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
+	SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+	SR_CONF_CONN | SR_CONF_GET,
+	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
+	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
+	SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
+	SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+};
+
 static const int32_t soft_trigger_matches[] = {
 	SR_TRIGGER_ZERO,
 	SR_TRIGGER_ONE,
@@ -141,6 +154,21 @@ static const int32_t soft_trigger_matches[] = {
 	SR_TRIGGER_EDGE,
 };
 
+/* Names assigned to available edge slope choices. */
+static const char *const signal_edge_names[] = {
+	[DS_EDGE_RISING] = "rising",
+	[DS_EDGE_FALLING] = "falling",
+};
+
+static const struct {
+	int range;
+	gdouble low;
+	gdouble high;
+} volt_thresholds[] = {
+	{ DS_VOLTAGE_RANGE_18_33_V, 0.7, 1.4 },
+	{ DS_VOLTAGE_RANGE_5_V, 1.4, 3.6 },
+};
+
 static const uint64_t samplerates[] = {
 	SR_KHZ(20),
 	SR_KHZ(25),
@@ -181,11 +209,6 @@ static const uint64_t dslogic_samplerates[] = {
 
 SR_PRIV struct sr_dev_driver fx2lafw_driver_info;
 
-static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
-{
-	return std_init(sr_ctx, di, LOG_PREFIX);
-}
-
 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 {
 	struct drv_context *drvc;
@@ -466,18 +489,19 @@ static int dev_open(struct sr_dev_inst *sdi)
 
 	if (devc->dslogic) {
 		if (!strcmp(devc->profile->model, "DSLogic")) {
-			fpga_firmware = DSLOGIC_FPGA_FIRMWARE;
-		} else if (!strcmp(devc->profile->model, "DSLogic Pro")) {
+			if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V)
+				fpga_firmware = DSLOGIC_FPGA_FIRMWARE_3V3;
+			else
+				fpga_firmware = DSLOGIC_FPGA_FIRMWARE_5V;
+		} else if (!strcmp(devc->profile->model, "DSLogic Pro")){
 			fpga_firmware = DSLOGIC_PRO_FPGA_FIRMWARE;
 		} else if (!strcmp(devc->profile->model, "DSCope")) {
 			fpga_firmware = DSCOPE_FPGA_FIRMWARE;
 		}
 
-		if ((ret = dslogic_fpga_firmware_upload(sdi,
-				fpga_firmware)) != SR_OK)
+		if ((ret = dslogic_fpga_firmware_upload(sdi, fpga_firmware)) != SR_OK)
 			return ret;
 	}
-
 	if (devc->cur_samplerate == 0) {
 		/* Samplerate hasn't been set; default to the slowest one. */
 		devc->cur_samplerate = devc->samplerates[0];
@@ -491,6 +515,7 @@ static int dev_close(struct sr_dev_inst *sdi)
 	struct sr_usb_dev_inst *usb;
 
 	usb = sdi->conn;
+
 	if (!usb->devhdl)
 		return SR_ERR;
 
@@ -504,11 +529,13 @@ static int dev_close(struct sr_dev_inst *sdi)
 	return SR_OK;
 }
 
-static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
-		const struct sr_channel_group *cg)
+static int config_get(uint32_t key, GVariant **data,
+	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 {
 	struct dev_context *devc;
 	struct sr_usb_dev_inst *usb;
+	GVariant *range[2];
+	unsigned int i;
 	char str[128];
 
 	(void)cg;
@@ -530,6 +557,16 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s
 		snprintf(str, 128, "%d.%d", usb->bus, usb->address);
 		*data = g_variant_new_string(str);
 		break;
+	case SR_CONF_VOLTAGE_THRESHOLD:
+		for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
+			if (volt_thresholds[i].range != devc->dslogic_voltage_threshold)
+				continue;
+			range[0] = g_variant_new_double(volt_thresholds[i].low);
+			range[1] = g_variant_new_double(volt_thresholds[i].high);
+			*data = g_variant_new_tuple(range, 2);
+			break;
+		}
+		break;
 	case SR_CONF_LIMIT_SAMPLES:
 		*data = g_variant_new_uint64(devc->limit_samples);
 		break;
@@ -539,6 +576,18 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s
 	case SR_CONF_CAPTURE_RATIO:
 		*data = g_variant_new_uint64(devc->capture_ratio);
 		break;
+	case SR_CONF_EXTERNAL_CLOCK:
+		*data = g_variant_new_boolean(devc->dslogic_external_clock);
+		break;
+	case SR_CONF_CONTINUOUS:
+		*data = g_variant_new_boolean(devc->dslogic_continuous_mode);
+		break;
+	case SR_CONF_CLOCK_EDGE:
+		i = devc->dslogic_clock_edge;
+		if (i >= ARRAY_SIZE(signal_edge_names))
+			return SR_ERR_BUG;
+		*data = g_variant_new_string(signal_edge_names[0]);
+		break;
 	default:
 		return SR_ERR_NA;
 	}
@@ -546,12 +595,35 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s
 	return SR_OK;
 }
 
-static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
-		const struct sr_channel_group *cg)
+/*
+ * Helper for mapping a string-typed configuration value to an index
+ * within a table of possible values.
+ */
+static int lookup_index(GVariant *value, const char *const *table, int len)
+{
+	const char *entry;
+	int i;
+
+	entry = g_variant_get_string(value, NULL);
+	if (!entry)
+		return -1;
+
+	/* Linear search is fine for very small tables. */
+	for (i = 0; i < len; i++) {
+		if (strcmp(entry, table[i]) == 0)
+			return i;
+	}
+
+	return -1;
+}
+
+static int config_set(uint32_t key, GVariant *data,
+	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 {
 	struct dev_context *devc;
 	uint64_t arg;
 	int i, ret;
+	gdouble low, high;
 
 	(void)cg;
 
@@ -584,6 +656,38 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd
 		devc->capture_ratio = g_variant_get_uint64(data);
 		ret = (devc->capture_ratio > 100) ? SR_ERR : SR_OK;
 		break;
+	case SR_CONF_VOLTAGE_THRESHOLD:
+		g_variant_get(data, "(dd)", &low, &high);
+		ret = SR_ERR_ARG;
+		for (i = 0; (unsigned int)i < ARRAY_SIZE(volt_thresholds); i++) {
+			if (fabs(volt_thresholds[i].low - low) < 0.1 &&
+			    fabs(volt_thresholds[i].high - high) < 0.1) {
+				devc->dslogic_voltage_threshold = volt_thresholds[i].range;
+				break;
+			}
+		}
+		if (!strcmp(devc->profile->model, "DSLogic")) {
+			if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_5_V)
+				ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_5V);
+			else
+				ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_3V3);
+		} else if (!strcmp(devc->profile->model, "DSLogic Pro")) {
+			ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE);
+		}
+		break;
+	case SR_CONF_EXTERNAL_CLOCK:
+		devc->dslogic_external_clock = g_variant_get_boolean(data);
+		break;
+	case SR_CONF_CONTINUOUS:
+		devc->dslogic_continuous_mode = g_variant_get_boolean(data);
+		break;
+	case SR_CONF_CLOCK_EDGE:
+		i = lookup_index(data, signal_edge_names,
+		 		   ARRAY_SIZE(signal_edge_names));
+		if (i < 0)
+			return SR_ERR_ARG;
+		devc->dslogic_clock_edge = i;
+		break;		
 	default:
 		ret = SR_ERR_NA;
 	}
@@ -591,12 +695,13 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd
 	return ret;
 }
 
-static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
-		const struct sr_channel_group *cg)
+static int config_list(uint32_t key, GVariant **data,
+	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 {
 	struct dev_context *devc;
-	GVariant *gvar;
+	GVariant *gvar, *range[2];
 	GVariantBuilder gvb;
+	unsigned int i;
 
 	(void)cg;
 
@@ -606,17 +711,36 @@ static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *
 				scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
 		break;
 	case SR_CONF_DEVICE_OPTIONS:
-		if (!sdi)
-			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
-					drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
-		else
+		if (!sdi) {
 			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
-					devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
+				drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
+		} else {
+			devc = sdi->priv;
+			if (!devc->dslogic)
+				*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
+								  devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
+			else
+				*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
+								  dslogic_devopts, ARRAY_SIZE(dslogic_devopts), sizeof(uint32_t));
+		}
 		break;
-	case SR_CONF_SAMPLERATE:
+	case SR_CONF_VOLTAGE_THRESHOLD:
 		if (!sdi->priv)
 			return SR_ERR_ARG;
 		devc = sdi->priv;
+		if (!devc->dslogic)
+			return SR_ERR_NA;
+		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
+		for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
+			range[0] = g_variant_new_double(volt_thresholds[i].low);
+			range[1] = g_variant_new_double(volt_thresholds[i].high);
+			gvar = g_variant_new_tuple(range, 2);
+			g_variant_builder_add_value(&gvb, gvar);
+		}
+		*data = g_variant_builder_end(&gvb);
+		break;
+	case SR_CONF_SAMPLERATE:
+		devc = sdi->priv;
 		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
 		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), devc->samplerates,
 				devc->num_samplerates, sizeof(uint64_t));
@@ -628,6 +752,10 @@ static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *
 				soft_trigger_matches, ARRAY_SIZE(soft_trigger_matches),
 				sizeof(int32_t));
 		break;
+	case SR_CONF_CLOCK_EDGE:
+		*data = g_variant_new_strv(signal_edge_names,
+			ARRAY_SIZE(signal_edge_names));
+		break;
 	default:
 		return SR_ERR_NA;
 	}
@@ -669,7 +797,7 @@ static int start_transfers(const struct sr_dev_inst *sdi)
 	devc->acq_aborted = FALSE;
 	devc->empty_transfer_count = 0;
 
-	if ((trigger = sr_session_trigger_get(sdi->session))) {
+	if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
 		int pre_trigger_samples = 0;
 		if (devc->limit_samples > 0)
 			pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
@@ -681,6 +809,19 @@ static int start_transfers(const struct sr_dev_inst *sdi)
 		devc->trigger_fired = TRUE;
 
 	num_transfers = fx2lafw_get_number_of_transfers(devc);
+
+	//if (devc->dslogic)
+	//	num_transfers = dslogic_get_number_of_transfers(devc);
+
+	if (devc->dslogic) {
+		if (devc->cur_samplerate == SR_MHZ(100))
+			num_transfers = 16;
+		else if (devc->cur_samplerate == SR_MHZ(200))
+			num_transfers = 8;
+		else if (devc->cur_samplerate == SR_MHZ(400))
+			num_transfers = 4;
+	}
+
 	size = fx2lafw_get_buffer_size(devc);
 	devc->submitted_transfers = 0;
 
@@ -702,6 +843,7 @@ static int start_transfers(const struct sr_dev_inst *sdi)
 		libusb_fill_bulk_transfer(transfer, usb->devhdl,
 				endpoint | LIBUSB_ENDPOINT_IN, buf, size,
 				fx2lafw_receive_transfer, (void *)sdi, timeout);
+		sr_info("submitting transfer: %d", i);
 		if ((ret = libusb_submit_transfer(transfer)) != 0) {
 			sr_err("Failed to submit transfer: %s.",
 			       libusb_error_name(ret));
@@ -746,11 +888,12 @@ static void LIBUSB_CALL dslogic_trigger_receive(struct libusb_transfer *transfer
 	} else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
 			&& transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
 		tpos = (struct dslogic_trigger_pos *)transfer->buffer;
-		sr_dbg("tpos real_pos %.8x ram_saddr %.8x", tpos->real_pos, tpos->ram_saddr);
+		sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
+			tpos->ram_saddr, tpos->remain_cnt);
+		devc->trigger_pos = tpos->real_pos;
 		g_free(tpos);
 		start_transfers(sdi);
 	}
-
 	libusb_free_transfer(transfer);
 }
 
@@ -771,6 +914,15 @@ static int dslogic_trigger_request(const struct sr_dev_inst *sdi)
 	if ((ret = dslogic_fpga_configure(sdi)) != SR_OK)
 		return ret;
 
+	/* If this is a DSLogic Pro, set the voltage threshold. */
+	if (!strcmp(devc->profile->model, "DSLogic Pro")){
+		if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V) {
+			dslogic_set_vth(sdi, 1.4);
+		} else {
+			dslogic_set_vth(sdi, 3.3);
+		}
+	}
+
 	if ((ret = dslogic_start_acquisition(sdi)) != SR_OK)
 		return ret;
 
@@ -891,7 +1043,7 @@ SR_PRIV struct sr_dev_driver fx2lafw_driver_info = {
 	.name = "fx2lafw",
 	.longname = "fx2lafw (generic driver for FX2 based LAs)",
 	.api_version = 1,
-	.init = init,
+	.init = std_init,
 	.cleanup = std_cleanup,
 	.scan = scan,
 	.dev_list = std_dev_list,