X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fasix-sigma%2Fprotocol.h;h=5b4f669f8f9726f31a2d33166a355e9ff9c88f0a;hb=8bd4dc8799ff6839b457e691151f82b9a93c2644;hp=edd15dffdb1f03e65dd8ae3998160a0a85d7cfcc;hpb=7fe1f91f7550d63ea4a09c0f0e1ce5b88c59c6fb;p=libsigrok.git diff --git a/src/hardware/asix-sigma/protocol.h b/src/hardware/asix-sigma/protocol.h index edd15dff..5b4f669f 100644 --- a/src/hardware/asix-sigma/protocol.h +++ b/src/hardware/asix-sigma/protocol.h @@ -124,6 +124,42 @@ enum sigma_read_register { READ_TEST = 15, }; +#define HI4(b) (((b) >> 4) & 0x0f) +#define LO4(b) (((b) >> 0) & 0x0f) + +#define BIT_MASK(l) ((1UL << (l)) - 1) + +#define CLKSEL_CLKSEL8 (1 << 0) +#define CLKSEL_PINMASK BIT_MASK(4) +#define CLKSEL_RISING (1 << 4) +#define CLKSEL_FALLING (1 << 5) + +#define TRGSEL_SELINC_MASK BIT_MASK(2) +#define TRGSEL_SELINC_SHIFT 0 +#define TRGSEL_SELRES_MASK BIT_MASK(2) +#define TRGSEL_SELRES_SHIFT 2 +#define TRGSEL_SELA_MASK BIT_MASK(2) +#define TRGSEL_SELA_SHIFT 4 +#define TRGSEL_SELB_MASK BIT_MASK(2) +#define TRGSEL_SELB_SHIFT 6 +#define TRGSEL_SELC_MASK BIT_MASK(2) +#define TRGSEL_SELC_SHIFT 8 +#define TRGSEL_SELPRESC_MASK BIT_MASK(4) +#define TRGSEL_SELPRESC_SHIFT 12 + +enum trgsel_selcode_t { + TRGSEL_SELCODE_LEVEL = 0, + TRGSEL_SELCODE_FALL = 1, + TRGSEL_SELCODE_RISE = 2, + TRGSEL_SELCODE_EVENT = 3, + TRGSEL_SELCODE_NEVER = 3, +}; + +#define TRGSEL2_PINS_MASK BIT_MASK(3) +#define TRGSEL2_PINPOL_RISE (1 << 3) +#define TRGSEL2_LUT_ADDR_MASK BIT_MASK(4) +#define TRGSEL2_LUT_WRITE (1 << 4) +#define TRGSEL2_RESET (1 << 5) #define TRGSEL2_LEDSEL0 (1 << 6) #define TRGSEL2_LEDSEL1 (1 << 7) @@ -211,51 +247,23 @@ struct sigma_dram_line { } cluster[CLUSTERS_PER_ROW]; }; -struct clockselect_50 { - uint8_t async; - uint64_t fraction; - uint16_t disabled_channels; -}; - /* The effect of all these are still a bit unclear. */ struct triggerinout { - uint8_t trgout_resistor_enable : 1; - uint8_t trgout_resistor_pullup : 1; - uint8_t reserved1 : 1; - uint8_t trgout_bytrigger : 1; - uint8_t trgout_byevent : 1; - uint8_t trgout_bytriggerin : 1; - uint8_t reserved2 : 2; - - /* Should be set same as the first two */ - uint8_t trgout_resistor_enable2 : 1; - uint8_t trgout_resistor_pullup2 : 1; - - uint8_t reserved3 : 1; - uint8_t trgout_long : 1; - uint8_t trgout_pin : 1; /* Use 1k resistor. Pullup? */ - uint8_t trgin_negate : 1; - uint8_t trgout_enable : 1; - uint8_t trgin_enable : 1; + gboolean trgout_resistor_enable, trgout_resistor_pullup; + gboolean trgout_resistor_enable2, trgout_resistor_pullup2; + gboolean trgout_bytrigger, trgout_byevent, trgout_bytriggerin; + gboolean trgout_long, trgout_pin; /* 1ms pulse, 1k resistor */ + gboolean trgin_negate, trgout_enable, trgin_enable; }; struct triggerlut { - /* The actual LUTs. */ uint16_t m0d[4], m1d[4], m2d[4]; - uint16_t m3, m3s, m4; - - /* Parameters should be sent as a single register write. */ + uint16_t m3q, m3s, m4; struct { - uint8_t selc : 2; - uint8_t selpresc : 6; - - uint8_t selinc : 2; - uint8_t selres : 2; - uint8_t sela : 2; - uint8_t selb : 2; - - uint16_t cmpb; - uint16_t cmpa; + uint8_t selpresc; + uint8_t sela, selb, selc; + uint8_t selinc, selres; + uint16_t cmpa, cmpb; } params; }; @@ -316,6 +324,12 @@ enum sigma_firmware_idx { SIGMA_FW_FREQ, }; +enum ext_clock_edge_t { + SIGMA_CLOCK_EDGE_RISING, + SIGMA_CLOCK_EDGE_FALLING, + SIGMA_CLOCK_EDGE_EITHER, +}; + struct submit_buffer; struct dev_context { @@ -329,7 +343,12 @@ struct dev_context { struct ftdi_context ctx; gboolean is_open, must_close; } ftdi; - uint64_t samplerate; + struct { + uint64_t samplerate; + gboolean use_ext_clock; + size_t clock_pin; + enum ext_clock_edge_t clock_edge; + } clock; struct sr_sw_limits cfg_limits; /* Configured limits (user specified). */ struct sr_sw_limits acq_limits; /* Acquisition limits (internal use). */ struct sr_sw_limits feed_limits; /* Datafeed limits (internal use). */ @@ -343,27 +362,33 @@ struct dev_context { struct submit_buffer *buffer; }; -extern SR_PRIV const uint64_t samplerates[]; -extern SR_PRIV const size_t samplerates_count; - /* "Automatic" and forced USB connection open/close support. */ SR_PRIV int sigma_check_open(const struct sr_dev_inst *sdi); SR_PRIV int sigma_check_close(struct dev_context *devc); SR_PRIV int sigma_force_open(const struct sr_dev_inst *sdi); SR_PRIV int sigma_force_close(struct dev_context *devc); +/* Send register content (simple and complex) to the hardware. */ SR_PRIV int sigma_write_register(struct dev_context *devc, uint8_t reg, uint8_t *data, size_t len); SR_PRIV int sigma_set_register(struct dev_context *devc, uint8_t reg, uint8_t value); SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc, struct triggerlut *lut); + +/* Samplerate constraints check, get/set/list helpers. */ SR_PRIV int sigma_normalize_samplerate(uint64_t want_rate, uint64_t *have_rate); +SR_PRIV uint64_t sigma_get_samplerate(const struct sr_dev_inst *sdi); +SR_PRIV GVariant *sigma_get_samplerates_list(void); + +/* Preparation of data acquisition, spec conversion, hardware configuration. */ SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi); SR_PRIV int sigma_set_acquire_timeout(struct dev_context *devc); SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi); -SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data); SR_PRIV int sigma_build_basic_trigger(struct dev_context *devc, struct triggerlut *lut); +/* Callback to periodically drive acuisition progress. */ +SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data); + #endif