X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fasix-sigma%2Fprotocol.c;h=2aec141a691345ac56879dfac98d35a881f96b84;hb=419f10950500d37489db3e3842670ac49e3607e7;hp=f052c51cc6091ece3ff8dc0160d771a1df6ca57a;hpb=2a62a9c44e7690f68ca756c6a5b9189c32186b47;p=libsigrok.git diff --git a/src/hardware/asix-sigma/protocol.c b/src/hardware/asix-sigma/protocol.c index f052c51c..2aec141a 100644 --- a/src/hardware/asix-sigma/protocol.c +++ b/src/hardware/asix-sigma/protocol.c @@ -4,6 +4,7 @@ * Copyright (C) 2010-2012 Håvard Espeland , * Copyright (C) 2010 Martin Stensgård * Copyright (C) 2010 Carl Henrik Lunde + * Copyright (C) 2020 Gerhard Sittig * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -36,7 +37,7 @@ * few discrete values, while setter routines accept any user specified * rate that is supported by the hardware. */ -SR_PRIV const uint64_t samplerates[] = { +static const uint64_t samplerates[] = { /* 50MHz and integer divider. 1/2/5 steps (where possible). */ SR_KHZ(200), SR_KHZ(500), SR_MHZ(1), SR_MHZ(2), SR_MHZ(5), @@ -45,7 +46,10 @@ SR_PRIV const uint64_t samplerates[] = { SR_MHZ(100), SR_MHZ(200), }; -SR_PRIV const size_t samplerates_count = ARRAY_SIZE(samplerates); +SR_PRIV GVariant *sigma_get_samplerates_list(void) +{ + return std_gvar_samplerates(samplerates, ARRAY_SIZE(samplerates)); +} static const char *firmware_files[] = { [SIGMA_FW_50MHZ] = "asix-sigma-50.fw", /* 50MHz, 8bit divider. */ @@ -57,46 +61,199 @@ static const char *firmware_files[] = { #define SIGMA_FIRMWARE_SIZE_LIMIT (256 * 1024) -static int sigma_read(struct dev_context *devc, void *buf, size_t size) +static int sigma_ftdi_open(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc; + int vid, pid; + const char *serno; + int ret; + + devc = sdi->priv; + if (!devc) + return SR_ERR_ARG; + + if (devc->ftdi.is_open) + return SR_OK; + + vid = devc->id.vid; + pid = devc->id.pid; + serno = sdi->serial_num; + if (!vid || !pid || !serno || !*serno) + return SR_ERR_ARG; + + ret = ftdi_init(&devc->ftdi.ctx); + if (ret < 0) { + sr_err("Cannot initialize FTDI context (%d): %s.", + ret, ftdi_get_error_string(&devc->ftdi.ctx)); + return SR_ERR_IO; + } + ret = ftdi_usb_open_desc_index(&devc->ftdi.ctx, + vid, pid, NULL, serno, 0); + if (ret < 0) { + sr_err("Cannot open device (%d): %s.", + ret, ftdi_get_error_string(&devc->ftdi.ctx)); + return SR_ERR_IO; + } + devc->ftdi.is_open = TRUE; + + return SR_OK; +} + +static int sigma_ftdi_close(struct dev_context *devc) +{ + int ret; + + ret = ftdi_usb_close(&devc->ftdi.ctx); + devc->ftdi.is_open = FALSE; + devc->ftdi.must_close = FALSE; + ftdi_deinit(&devc->ftdi.ctx); + + return ret == 0 ? SR_OK : SR_ERR_IO; +} + +SR_PRIV int sigma_check_open(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc; + int ret; + + if (!sdi) + return SR_ERR_ARG; + devc = sdi->priv; + if (!devc) + return SR_ERR_ARG; + + if (devc->ftdi.is_open) + return SR_OK; + + ret = sigma_ftdi_open(sdi); + if (ret != SR_OK) + return ret; + devc->ftdi.must_close = TRUE; + + return ret; +} + +SR_PRIV int sigma_check_close(struct dev_context *devc) +{ + int ret; + + if (!devc) + return SR_ERR_ARG; + + if (devc->ftdi.must_close) { + ret = sigma_ftdi_close(devc); + if (ret != SR_OK) + return ret; + devc->ftdi.must_close = FALSE; + } + + return SR_OK; +} + +SR_PRIV int sigma_force_open(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc; + int ret; + + if (!sdi) + return SR_ERR_ARG; + devc = sdi->priv; + if (!devc) + return SR_ERR_ARG; + + ret = sigma_ftdi_open(sdi); + if (ret != SR_OK) + return ret; + devc->ftdi.must_close = FALSE; + + return SR_OK; +} + +SR_PRIV int sigma_force_close(struct dev_context *devc) +{ + return sigma_ftdi_close(devc); +} + +/* + * BEWARE! Error propagation is important, as are kinds of return values. + * + * - Raw USB tranport communicates the number of sent or received bytes, + * or negative error codes in the external library's(!) range of codes. + * - Internal routines at the "sigrok driver level" communicate success + * or failure in terms of SR_OK et al error codes. + * - Main loop style receive callbacks communicate booleans which arrange + * for repeated calls to drive progress during acquisition. + * + * Careful consideration by maintainers is essential, because all of the + * above kinds of values are assignment compatbile from the compiler's + * point of view. Implementation errors will go unnoticed at build time. + */ + +static int sigma_read_raw(struct dev_context *devc, void *buf, size_t size) { int ret; - ret = ftdi_read_data(&devc->ftdic, (unsigned char *)buf, size); + ret = ftdi_read_data(&devc->ftdi.ctx, (unsigned char *)buf, size); if (ret < 0) { - sr_err("ftdi_read_data failed: %s", - ftdi_get_error_string(&devc->ftdic)); + sr_err("USB data read failed: %s", + ftdi_get_error_string(&devc->ftdi.ctx)); } return ret; } -static int sigma_write(struct dev_context *devc, const void *buf, size_t size) +static int sigma_write_raw(struct dev_context *devc, const void *buf, size_t size) { int ret; - ret = ftdi_write_data(&devc->ftdic, buf, size); - if (ret < 0) - sr_err("ftdi_write_data failed: %s", - ftdi_get_error_string(&devc->ftdic)); - else if ((size_t) ret != size) - sr_err("ftdi_write_data did not complete write."); + ret = ftdi_write_data(&devc->ftdi.ctx, buf, size); + if (ret < 0) { + sr_err("USB data write failed: %s", + ftdi_get_error_string(&devc->ftdi.ctx)); + } else if ((size_t)ret != size) { + sr_err("USB data write length mismatch."); + } return ret; } +static int sigma_read_sr(struct dev_context *devc, void *buf, size_t size) +{ + int ret; + + ret = sigma_read_raw(devc, buf, size); + if (ret < 0 || (size_t)ret != size) + return SR_ERR_IO; + + return SR_OK; +} + +static int sigma_write_sr(struct dev_context *devc, const void *buf, size_t size) +{ + int ret; + + ret = sigma_write_raw(devc, buf, size); + if (ret < 0 || (size_t)ret != size) + return SR_ERR_IO; + + return SR_OK; +} + /* - * NOTE: We chose the buffer size to be large enough to hold any write to the - * device. We still print a message just in case. + * Implementor's note: The local write buffer's size shall suffice for + * any know FPGA register transaction that is involved in the supported + * feature set of this sigrok device driver. If the length check trips, + * that's a programmer's error and needs adjustment in the complete call + * stack of the respective code path. */ SR_PRIV int sigma_write_register(struct dev_context *devc, uint8_t reg, uint8_t *data, size_t len) { uint8_t buf[80], *wrptr; - size_t idx, count; - int ret; + size_t idx; if (2 + 2 * len > sizeof(buf)) { - sr_err("Write buffer too small to write %zu bytes.", len); + sr_err("Short write buffer for %zu bytes to reg %u.", len, reg); return SR_ERR_BUG; } @@ -107,12 +264,8 @@ SR_PRIV int sigma_write_register(struct dev_context *devc, write_u8_inc(&wrptr, REG_DATA_LOW | (data[idx] & 0xf)); write_u8_inc(&wrptr, REG_DATA_HIGH_WRITE | (data[idx] >> 4)); } - count = wrptr - buf; - ret = sigma_write(devc, buf, count); - if (ret != SR_OK) - return ret; - return SR_OK; + return sigma_write_sr(devc, buf, wrptr - buf); } SR_PRIV int sigma_set_register(struct dev_context *devc, @@ -125,41 +278,63 @@ static int sigma_read_register(struct dev_context *devc, uint8_t reg, uint8_t *data, size_t len) { uint8_t buf[3], *wrptr; + int ret; wrptr = buf; write_u8_inc(&wrptr, REG_ADDR_LOW | (reg & 0xf)); write_u8_inc(&wrptr, REG_ADDR_HIGH | (reg >> 4)); write_u8_inc(&wrptr, REG_READ_ADDR); - sigma_write(devc, buf, wrptr - buf); + ret = sigma_write_sr(devc, buf, wrptr - buf); + if (ret != SR_OK) + return ret; - return sigma_read(devc, data, len); + return sigma_read_sr(devc, data, len); } static int sigma_read_pos(struct dev_context *devc, - uint32_t *stoppos, uint32_t *triggerpos) + uint32_t *stoppos, uint32_t *triggerpos, uint8_t *mode) { /* - * Read 6 registers starting at trigger position LSB. - * Which yields two 24bit counter values. + * Read 7 registers starting at trigger position LSB. + * Which yields two 24bit counter values, and mode flags. */ const uint8_t buf[] = { + /* Setup first register address. */ REG_ADDR_LOW | READ_TRIGGER_POS_LOW, + /* Retrieve trigger position. */ REG_READ_ADDR | REG_ADDR_INC, REG_READ_ADDR | REG_ADDR_INC, REG_READ_ADDR | REG_ADDR_INC, + /* Retrieve stop position. */ REG_READ_ADDR | REG_ADDR_INC, REG_READ_ADDR | REG_ADDR_INC, REG_READ_ADDR | REG_ADDR_INC, + /* Retrieve mode register. */ + REG_READ_ADDR | REG_ADDR_INC, }, *rdptr; - uint8_t result[6]; + uint8_t result[7]; + uint32_t v32; + uint8_t v8; + int ret; - sigma_write(devc, buf, sizeof(buf)); + ret = sigma_write_sr(devc, buf, sizeof(buf)); + if (ret != SR_OK) + return ret; - sigma_read(devc, result, sizeof(result)); + ret = sigma_read_sr(devc, result, sizeof(result)); + if (ret != SR_OK) + return ret; rdptr = &result[0]; - *triggerpos = read_u24le_inc(&rdptr); - *stoppos = read_u24le_inc(&rdptr); + v32 = read_u24le_inc(&rdptr); + if (triggerpos) + *triggerpos = v32; + v32 = read_u24le_inc(&rdptr); + if (stoppos) + *stoppos = v32; + v8 = read_u8_inc(&rdptr); + if (mode) + *mode = v8; /* * These positions consist of "the memory row" in the MSB fields, @@ -172,9 +347,9 @@ static int sigma_read_pos(struct dev_context *devc, * cater for the timestamps when the decrement carries over to * a different memory row. */ - if ((--*stoppos & ROW_MASK) == ROW_MASK) + if (stoppos && (--*stoppos & ROW_MASK) == ROW_MASK) *stoppos -= CLUSTERS_PER_ROW; - if ((--*triggerpos & ROW_MASK) == ROW_MASK) + if (triggerpos && (--*triggerpos & ROW_MASK) == ROW_MASK) *triggerpos -= CLUSTERS_PER_ROW; return SR_OK; @@ -185,11 +360,11 @@ static int sigma_read_dram(struct dev_context *devc, { uint8_t buf[128], *wrptr; size_t chunk; - int sel; + int sel, ret; gboolean is_last; if (2 + 3 * numchunks > ARRAY_SIZE(buf)) { - sr_err("Read buffer too small to read %zu DRAM rows", numchunks); + sr_err("Short write buffer for %zu DRAM row reads.", numchunks); return SR_ERR_BUG; } @@ -197,7 +372,9 @@ static int sigma_read_dram(struct dev_context *devc, wrptr = buf; write_u8_inc(&wrptr, startchunk >> 8); write_u8_inc(&wrptr, startchunk & 0xff); - sigma_write_register(devc, WRITE_MEMROW, buf, wrptr - buf); + ret = sigma_write_register(devc, WRITE_MEMROW, buf, wrptr - buf); + if (ret != SR_OK) + return ret; /* * Access DRAM content. Fetch from DRAM to FPGA's internal RAM, @@ -216,9 +393,11 @@ static int sigma_read_dram(struct dev_context *devc, if (!is_last) write_u8_inc(&wrptr, REG_DRAM_WAIT_ACK); } - sigma_write(devc, buf, wrptr - buf); + ret = sigma_write_sr(devc, buf, wrptr - buf); + if (ret != SR_OK) + return ret; - return sigma_read(devc, data, numchunks * ROW_LENGTH_BYTES); + return sigma_read_sr(devc, data, numchunks * ROW_LENGTH_BYTES); } /* Upload trigger look-up tables to Sigma. */ @@ -229,6 +408,7 @@ SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc, uint8_t tmp[2]; uint16_t bit; uint8_t buf[6], *wrptr, regval; + int ret; /* Transpose the table and send to Sigma. */ for (i = 0; i < 16; i++) { @@ -278,8 +458,15 @@ SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc, wrptr = buf; write_u8_inc(&wrptr, tmp[0]); write_u8_inc(&wrptr, tmp[1]); - sigma_write_register(devc, WRITE_TRIGGER_SELECT, buf, wrptr - buf); - sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x30 | i); + ret = sigma_write_register(devc, WRITE_TRIGGER_SELECT, + buf, wrptr - buf); + if (ret != SR_OK) + return ret; + ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, + TRGSEL2_RESET | TRGSEL2_LUT_WRITE | + (i & TRGSEL2_LUT_ADDR_MASK)); + if (ret != SR_OK) + return ret; } /* Send the parameters */ @@ -296,7 +483,9 @@ SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc, write_u8_inc(&wrptr, regval); write_u16le_inc(&wrptr, lut->params.cmpb); write_u16le_inc(&wrptr, lut->params.cmpa); - sigma_write_register(devc, WRITE_TRIGGER_SELECT, buf, wrptr - buf); + ret = sigma_write_register(devc, WRITE_TRIGGER_SELECT, buf, wrptr - buf); + if (ret != SR_OK) + return ret; return SR_OK; } @@ -375,26 +564,43 @@ static int sigma_fpga_init_bitbang_once(struct dev_context *devc) uint8_t data; /* Section 2. part 1), do the FPGA suicide. */ - sigma_write(devc, suicide, sizeof(suicide)); - sigma_write(devc, suicide, sizeof(suicide)); - sigma_write(devc, suicide, sizeof(suicide)); - sigma_write(devc, suicide, sizeof(suicide)); + ret = SR_OK; + ret |= sigma_write_sr(devc, suicide, sizeof(suicide)); + ret |= sigma_write_sr(devc, suicide, sizeof(suicide)); + ret |= sigma_write_sr(devc, suicide, sizeof(suicide)); + ret |= sigma_write_sr(devc, suicide, sizeof(suicide)); + if (ret != SR_OK) + return SR_ERR_IO; g_usleep(10 * 1000); /* Section 2. part 2), pulse PROG. */ - sigma_write(devc, init_array, sizeof(init_array)); + ret = sigma_write_sr(devc, init_array, sizeof(init_array)); + if (ret != SR_OK) + return ret; g_usleep(10 * 1000); - ftdi_usb_purge_buffers(&devc->ftdic); + ftdi_usb_purge_buffers(&devc->ftdi.ctx); - /* Wait until the FPGA asserts INIT_B. */ + /* + * Wait until the FPGA asserts INIT_B. Check in a maximum number + * of bursts with a given delay between them. Read as many pin + * capture results as the combination of FTDI chip and FTID lib + * may provide. Cope with absence of pin capture data in a cycle. + * This approach shall result in fast reponse in case of success, + * low cost of execution during wait, reliable error handling in + * the transport layer, and robust response to failure or absence + * of result data (hardware inactivity after stimulus). + */ retries = 10; while (retries--) { - ret = sigma_read(devc, &data, sizeof(data)); - if (ret < 0) - return ret; - if (data & BB_PIN_INIT) - return SR_OK; - g_usleep(10 * 1000); + do { + ret = sigma_read_raw(devc, &data, sizeof(data)); + if (ret < 0) + return SR_ERR_IO; + if (ret == sizeof(data) && (data & BB_PIN_INIT)) + return SR_OK; + } while (ret == sizeof(data)); + if (retries) + g_usleep(10 * 1000); } return SR_ERR_TIMEOUT; @@ -463,10 +669,14 @@ static int sigma_fpga_init_la(struct dev_context *devc) * Send the command sequence which contains 3 READ requests. * Expect to see the corresponding 3 response bytes. */ - sigma_write(devc, buf, wrptr - buf); - ret = sigma_read(devc, result, ARRAY_SIZE(result)); - if (ret != ARRAY_SIZE(result)) { - sr_err("Insufficient start response length."); + ret = sigma_write_sr(devc, buf, wrptr - buf); + if (ret != SR_OK) { + sr_err("Could not request LA start response."); + return ret; + } + ret = sigma_read_sr(devc, result, ARRAY_SIZE(result)); + if (ret != SR_OK) { + sr_err("Could not receive LA start response."); return SR_ERR_IO; } rdptr = result; @@ -535,7 +745,7 @@ static int sigma_fw_2_bitbang(struct sr_context *ctx, const char *name, bb_size = file_size * 8 * 2; bb_stream = g_try_malloc(bb_size); if (!bb_stream) { - sr_err("%s: Failed to allocate bitbang stream", __func__); + sr_err("Memory allocation failed during firmware upload."); g_free(firmware); return SR_ERR_MALLOC; } @@ -586,52 +796,59 @@ static int upload_firmware(struct sr_context *ctx, struct dev_context *devc, devc->state.state = SIGMA_CONFIG; /* Set the cable to bitbang mode. */ - ret = ftdi_set_bitmode(&devc->ftdic, BB_PINMASK, BITMODE_BITBANG); + ret = ftdi_set_bitmode(&devc->ftdi.ctx, BB_PINMASK, BITMODE_BITBANG); if (ret < 0) { - sr_err("ftdi_set_bitmode failed: %s", - ftdi_get_error_string(&devc->ftdic)); + sr_err("Could not setup cable mode for upload: %s", + ftdi_get_error_string(&devc->ftdi.ctx)); return SR_ERR; } - ret = ftdi_set_baudrate(&devc->ftdic, BB_BITRATE); + ret = ftdi_set_baudrate(&devc->ftdi.ctx, BB_BITRATE); if (ret < 0) { - sr_err("ftdi_set_baudrate failed: %s", - ftdi_get_error_string(&devc->ftdic)); + sr_err("Could not setup bitrate for upload: %s", + ftdi_get_error_string(&devc->ftdi.ctx)); return SR_ERR; } /* Initiate FPGA configuration mode. */ ret = sigma_fpga_init_bitbang(devc); - if (ret) + if (ret) { + sr_err("Could not initiate firmware upload to hardware"); return ret; + } /* Prepare wire format of the firmware image. */ ret = sigma_fw_2_bitbang(ctx, firmware, &buf, &buf_size); if (ret != SR_OK) { - sr_err("Could not prepare file %s for download.", firmware); + sr_err("Could not prepare file %s for upload.", firmware); return ret; } /* Write the FPGA netlist to the cable. */ sr_info("Uploading firmware file '%s'.", firmware); - sigma_write(devc, buf, buf_size); - + ret = sigma_write_sr(devc, buf, buf_size); g_free(buf); + if (ret != SR_OK) { + sr_err("Could not upload firmware file '%s'.", firmware); + return ret; + } /* Leave bitbang mode and discard pending input data. */ - ret = ftdi_set_bitmode(&devc->ftdic, 0, BITMODE_RESET); + ret = ftdi_set_bitmode(&devc->ftdi.ctx, 0, BITMODE_RESET); if (ret < 0) { - sr_err("ftdi_set_bitmode failed: %s", - ftdi_get_error_string(&devc->ftdic)); + sr_err("Could not setup cable mode after upload: %s", + ftdi_get_error_string(&devc->ftdi.ctx)); return SR_ERR; } - ftdi_usb_purge_buffers(&devc->ftdic); - while (sigma_read(devc, &pins, sizeof(pins)) > 0) + ftdi_usb_purge_buffers(&devc->ftdi.ctx); + while (sigma_read_raw(devc, &pins, sizeof(pins)) > 0) ; /* Initialize the FPGA for logic-analyzer mode. */ ret = sigma_fpga_init_la(devc); - if (ret != SR_OK) + if (ret != SR_OK) { + sr_err("Hardware response after firmware upload failed."); return ret; + } /* Keep track of successful firmware download completion. */ devc->state.state = SIGMA_IDLE; @@ -753,6 +970,13 @@ SR_PRIV int sigma_normalize_samplerate(uint64_t want_rate, uint64_t *have_rate) return SR_ERR_ARG; } +SR_PRIV uint64_t sigma_get_samplerate(const struct sr_dev_inst *sdi) +{ + /* TODO Retrieve value from hardware. */ + (void)sdi; + return samplerates[0]; +} + SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi) { struct dev_context *devc; @@ -975,8 +1199,9 @@ SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi) int channelbit, trigger_set; devc = sdi->priv; - memset(&devc->trigger, 0, sizeof(struct sigma_trigger)); - if (!(trigger = sr_session_trigger_get(sdi->session))) + memset(&devc->trigger, 0, sizeof(devc->trigger)); + trigger = sr_session_trigger_get(sdi->session); + if (!trigger) return SR_OK; trigger_set = 0; @@ -991,8 +1216,7 @@ SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi) if (devc->samplerate >= SR_MHZ(100)) { /* Fast trigger support. */ if (trigger_set) { - sr_err("Only a single pin trigger is " - "supported in 100 and 200MHz mode."); + sr_err("100/200MHz modes limited to single trigger pin."); return SR_ERR; } if (match->match == SR_TRIGGER_FALLING) { @@ -1000,8 +1224,7 @@ SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi) } else if (match->match == SR_TRIGGER_RISING) { devc->trigger.risingmask |= channelbit; } else { - sr_err("Only rising/falling trigger is " - "supported in 100 and 200MHz mode."); + sr_err("100/200MHz modes limited to edge trigger."); return SR_ERR; } @@ -1028,7 +1251,7 @@ SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi) * does not permit ORed triggers. */ if (trigger_set > 1) { - sr_err("Only 1 rising/falling trigger is supported."); + sr_err("Limited to 1 edge trigger."); return SR_ERR; } } @@ -1296,18 +1519,16 @@ static int download_capture(struct sr_dev_inst *sdi) struct dev_context *devc; struct sigma_dram_line *dram_line; - int bufsz; uint32_t stoppos, triggerpos; uint8_t modestatus; uint32_t i; uint32_t dl_lines_total, dl_lines_curr, dl_lines_done; uint32_t dl_first_line, dl_line; - uint32_t dl_events_in_line; + uint32_t dl_events_in_line, trigger_event; uint32_t trg_line, trg_event; int ret; devc = sdi->priv; - dl_events_in_line = EVENTS_PER_ROW; sr_info("Downloading sample data."); devc->state.state = SIGMA_DOWNLOAD; @@ -1318,27 +1539,28 @@ static int download_capture(struct sr_dev_inst *sdi) * clusters to DRAM regardless of whether pin state changes) and * raise the POSTTRIGGERED flag. */ - sigma_set_register(devc, WRITE_MODE, WMR_FORCESTOP | WMR_SDRAMWRITEEN); + modestatus = WMR_FORCESTOP | WMR_SDRAMWRITEEN; + ret = sigma_set_register(devc, WRITE_MODE, modestatus); + if (ret != SR_OK) + return ret; do { ret = sigma_read_register(devc, READ_MODE, &modestatus, sizeof(modestatus)); - if (ret != sizeof(modestatus)) { - sr_err("Could not poll for post-trigger condition."); + if (ret != SR_OK) { + sr_err("Could not poll for post-trigger state."); return FALSE; } } while (!(modestatus & RMR_POSTTRIGGERED)); /* Set SDRAM Read Enable. */ - sigma_set_register(devc, WRITE_MODE, WMR_SDRAMREADEN); - - /* Get the current position. */ - sigma_read_pos(devc, &stoppos, &triggerpos); + ret = sigma_set_register(devc, WRITE_MODE, WMR_SDRAMREADEN); + if (ret != SR_OK) + return ret; - /* Check if trigger has fired. */ - ret = sigma_read_register(devc, READ_MODE, - &modestatus, sizeof(modestatus)); - if (ret != sizeof(modestatus)) { - sr_err("Could not query trigger hit."); + /* Get the current position. Check if trigger has fired. */ + ret = sigma_read_pos(devc, &stoppos, &triggerpos, &modestatus); + if (ret != SR_OK) { + sr_err("Could not query capture positions/state."); return FALSE; } trg_line = ~0; @@ -1380,10 +1602,10 @@ static int download_capture(struct sr_dev_inst *sdi) dl_line = dl_first_line + dl_lines_done; dl_line %= ROW_COUNT; - bufsz = sigma_read_dram(devc, dl_line, dl_lines_curr, - (uint8_t *)dram_line); - /* TODO: Check bufsz. For now, just avoid compiler warnings. */ - (void)bufsz; + ret = sigma_read_dram(devc, dl_line, dl_lines_curr, + (uint8_t *)dram_line); + if (ret != SR_OK) + return FALSE; /* This is the first DRAM line, so find the initial timestamp. */ if (dl_lines_done == 0) { @@ -1393,12 +1615,13 @@ static int download_capture(struct sr_dev_inst *sdi) } for (i = 0; i < dl_lines_curr; i++) { - uint32_t trigger_event = ~0; /* The last "DRAM line" need not span its full length. */ + dl_events_in_line = EVENTS_PER_ROW; if (dl_lines_done + i == dl_lines_total - 1) dl_events_in_line = stoppos & ROW_MASK; /* Test if the trigger happened on this line. */ + trigger_event = ~0; if (dl_lines_done + i == trg_line) trigger_event = trg_event; @@ -1496,7 +1719,7 @@ static void add_trigger_function(enum triggerop oper, enum triggerfunc func, int i, j; int x[2][2], tmp, a, b, aset, bset, rset; - memset(x, 0, 4 * sizeof(int)); + memset(x, 0, sizeof(x)); /* Trigger detect condition. */ switch (oper) { @@ -1579,10 +1802,11 @@ static void add_trigger_function(enum triggerop oper, enum triggerfunc func, SR_PRIV int sigma_build_basic_trigger(struct dev_context *devc, struct triggerlut *lut) { - int i,j; - uint16_t masks[2] = { 0, 0 }; + int i, j; + uint16_t masks[2]; - memset(lut, 0, sizeof(struct triggerlut)); + memset(lut, 0, sizeof(*lut)); + memset(&masks, 0, sizeof(masks)); /* Constant for simple triggers. */ lut->m4 = 0xa000;