X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fasix-sigma%2Fapi.c;h=f939fb5af8f397595d5bb8d313a9125d1aa4c9cc;hb=f06fb3e9f1fdfc3780bfa8cb06f76a2d630d6f1c;hp=c4e4027c8a1d23663b21d5e8e4b71ce595346800;hpb=4154a516de818ace3aabfe5e44cf4c81986074e7;p=libsigrok.git

diff --git a/src/hardware/asix-sigma/api.c b/src/hardware/asix-sigma/api.c
index c4e4027c..f939fb5a 100644
--- a/src/hardware/asix-sigma/api.c
+++ b/src/hardware/asix-sigma/api.c
@@ -42,10 +42,12 @@ static const uint32_t drvopts[] = {
 
 static const uint32_t devopts[] = {
 	SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
-	SR_CONF_LIMIT_SAMPLES | SR_CONF_SET,
+	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
 	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+#if ASIX_SIGMA_WITH_TRIGGER
 	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
 	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
+#endif
 };
 
 static const int32_t trigger_matches[] = {
@@ -102,6 +104,7 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options)
 	devc->cur_samplerate = samplerates[0];
 	devc->period_ps = 0;
 	devc->limit_msec = 0;
+	devc->limit_samples = 0;
 	devc->cur_firmware = -1;
 	devc->num_channels = 0;
 	devc->samples_per_event = 0;
@@ -185,9 +188,14 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s
 	case SR_CONF_LIMIT_MSEC:
 		*data = g_variant_new_uint64(devc->limit_msec);
 		break;
+	case SR_CONF_LIMIT_SAMPLES:
+		*data = g_variant_new_uint64(devc->limit_samples);
+		break;
+#if ASIX_SIGMA_WITH_TRIGGER
 	case SR_CONF_CAPTURE_RATIO:
 		*data = g_variant_new_uint64(devc->capture_ratio);
 		break;
+#endif
 	default:
 		return SR_ERR_NA;
 	}
@@ -223,15 +231,17 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd
 		break;
 	case SR_CONF_LIMIT_SAMPLES:
 		tmp = g_variant_get_uint64(data);
-		devc->limit_msec = tmp * 1000 / devc->cur_samplerate;
+		devc->limit_samples = tmp;
+		devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
 		break;
+#if ASIX_SIGMA_WITH_TRIGGER
 	case SR_CONF_CAPTURE_RATIO:
 		tmp = g_variant_get_uint64(data);
-		if (tmp <= 100)
-			devc->capture_ratio = tmp;
-		else
-			ret = SR_ERR;
+		if (tmp > 100)
+			return SR_ERR;
+		devc->capture_ratio = tmp;
 		break;
+#endif
 	default:
 		ret = SR_ERR_NA;
 	}
@@ -263,11 +273,13 @@ static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *
 		g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
 		*data = g_variant_builder_end(&gvb);
 		break;
+#if ASIX_SIGMA_WITH_TRIGGER
 	case SR_CONF_TRIGGER_MATCH:
 		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
 				trigger_matches, ARRAY_SIZE(trigger_matches),
 				sizeof(int32_t));
 		break;
+#endif
 	default:
 		return SR_ERR_NA;
 	}
@@ -280,7 +292,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 	struct dev_context *devc;
 	struct clockselect_50 clockselect;
 	int frac, triggerpin, ret;
-	uint8_t triggerselect = 0;
+	uint8_t triggerselect;
 	struct triggerinout triggerinout_conf;
 	struct triggerlut lut;
 
@@ -303,8 +315,9 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 	/* Enter trigger programming mode. */
 	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
 
-	/* 100 and 200 MHz mode. */
+	triggerselect = 0;
 	if (devc->cur_samplerate >= SR_MHZ(100)) {
+		/* 100 and 200 MHz mode. */
 		sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
 
 		/* Find which pin to trigger on from mask. */
@@ -320,8 +333,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 		if (devc->trigger.fallingmask)
 			triggerselect |= 1 << 3;
 
-	/* All other modes. */
 	} else if (devc->cur_samplerate <= SR_MHZ(50)) {
+		/* All other modes. */
 		sigma_build_basic_trigger(&lut, devc);
 
 		sigma_write_trigger_lut(&lut, devc);