X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fasix-sigma%2Fapi.c;h=4fdafec955eb1cfb1b1ef4eb112a2192f63b1e22;hb=6ee37801751a6e76e6b5865d1b3c88b9d342fe53;hp=d8f9bf27c49206bfaa2522005e5c405d3434f4a9;hpb=53c8a99c41120a5359e407934ae5041a285046e1;p=libsigrok.git diff --git a/src/hardware/asix-sigma/api.c b/src/hardware/asix-sigma/api.c index d8f9bf27..4fdafec9 100644 --- a/src/hardware/asix-sigma/api.c +++ b/src/hardware/asix-sigma/api.c @@ -49,10 +49,9 @@ static const uint32_t devopts[] = { SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET, SR_CONF_EXTERNAL_CLOCK_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, -#if ASIX_SIGMA_WITH_TRIGGER SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, -#endif + /* Consider SR_CONF_TRIGGER_PATTERN (SR_T_STRING, GET/SET) support. */ }; static const char *ext_clock_edges[] = { @@ -61,14 +60,12 @@ static const char *ext_clock_edges[] = { [SIGMA_CLOCK_EDGE_EITHER] = "either", }; -#if ASIX_SIGMA_WITH_TRIGGER static const int32_t trigger_matches[] = { SR_TRIGGER_ZERO, SR_TRIGGER_ONE, SR_TRIGGER_RISING, SR_TRIGGER_FALLING, }; -#endif static void clear_helper(struct dev_context *devc) { @@ -123,7 +120,7 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options) char conn_id[20]; char serno_txt[16]; char *end; - long serno_num, serno_pre; + unsigned long serno_num, serno_pre; enum asix_device_type dev_type; const char *dev_text; struct sr_dev_inst *sdi; @@ -195,7 +192,7 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options) * All ASIX logic analyzers have a serial number, which * reads as a hex number, and tells the device type. */ - ret = sr_atol_base(serno_txt, &serno_num, &end, 16); + ret = sr_atoul_base(serno_txt, &serno_num, &end, 16); if (ret != SR_OK || !end || *end) { sr_warn("Cannot interpret serial number %s.", serno_txt); continue; @@ -248,9 +245,9 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options) devc->id.serno = serno_num; devc->id.prefix = serno_pre; devc->id.type = dev_type; - sr_sw_limits_init(&devc->cfg_limits); + sr_sw_limits_init(&devc->limit.config); devc->capture_ratio = 50; - devc->use_triggers = 0; + devc->use_triggers = FALSE; /* Get current hardware configuration (or use defaults). */ (void)sigma_fetch_hw_config(sdi); @@ -316,12 +313,10 @@ static int config_get(uint32_t key, GVariant **data, break; case SR_CONF_LIMIT_MSEC: case SR_CONF_LIMIT_SAMPLES: - return sr_sw_limits_config_get(&devc->cfg_limits, key, data); -#if ASIX_SIGMA_WITH_TRIGGER + return sr_sw_limits_config_get(&devc->limit.config, key, data); case SR_CONF_CAPTURE_RATIO: *data = g_variant_new_uint64(devc->capture_ratio); break; -#endif default: return SR_ERR_NA; } @@ -375,12 +370,10 @@ static int config_set(uint32_t key, GVariant *data, break; case SR_CONF_LIMIT_MSEC: case SR_CONF_LIMIT_SAMPLES: - return sr_sw_limits_config_set(&devc->cfg_limits, key, data); -#if ASIX_SIGMA_WITH_TRIGGER + return sr_sw_limits_config_set(&devc->limit.config, key, data); case SR_CONF_CAPTURE_RATIO: devc->capture_ratio = g_variant_get_uint64(data); break; -#endif default: return SR_ERR_NA; } @@ -407,11 +400,9 @@ static int config_list(uint32_t key, GVariant **data, case SR_CONF_CLOCK_EDGE: *data = g_variant_new_strv(ARRAY_AND_SIZE(ext_clock_edges)); break; -#if ASIX_SIGMA_WITH_TRIGGER case SR_CONF_TRIGGER_MATCH: *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches)); break; -#endif default: return SR_ERR_NA; } @@ -424,15 +415,22 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) struct dev_context *devc; uint16_t pindis_mask; uint8_t async, div; - int triggerpin, ret; + int ret; + size_t triggerpin; uint8_t trigsel2; struct triggerinout triggerinout_conf; struct triggerlut lut; - uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr; - size_t count; + uint8_t regval, cmd_bytes[4], *wrptr; devc = sdi->priv; + /* Convert caller's trigger spec to driver's internal format. */ + ret = sigma_convert_trigger(sdi); + if (ret != SR_OK) { + sr_err("Could not configure triggers."); + return ret; + } + /* * Setup the device's samplerate from the value which up to now * just got checked and stored. As a byproduct this can pick and @@ -455,12 +453,6 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) if (ret != SR_OK) return ret; - ret = sigma_convert_trigger(sdi); - if (ret != SR_OK) { - sr_err("Could not configure triggers."); - return ret; - } - /* Enter trigger programming mode. */ trigsel2 = TRGSEL2_RESET; ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2); @@ -477,9 +469,9 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) /* Find which pin to trigger on from mask. */ for (triggerpin = 0; triggerpin < 8; triggerpin++) { - if (devc->trigger.risingmask & (1 << triggerpin)) + if (devc->trigger.risingmask & BIT(triggerpin)) break; - if (devc->trigger.fallingmask & (1 << triggerpin)) + if (devc->trigger.fallingmask & BIT(triggerpin)) break; } @@ -510,8 +502,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) /* Setup trigger in and out pins to default values. */ memset(&triggerinout_conf, 0, sizeof(triggerinout_conf)); - triggerinout_conf.trgout_bytrigger = 1; - triggerinout_conf.trgout_enable = 1; + triggerinout_conf.trgout_bytrigger = TRUE; + triggerinout_conf.trgout_enable = TRUE; /* TODO * Verify the correctness of this implementation. The previous * version used to assign to a C language struct with bit fields @@ -521,7 +513,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) * Which means that I could not verify "on paper" either. Let's * re-visit this code later during research for trigger support. */ - wrptr = trgconf_bytes; + wrptr = cmd_bytes; regval = 0; if (triggerinout_conf.trgout_bytrigger) regval |= TRGOPT_TRGOOUTEN; @@ -530,9 +522,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) if (triggerinout_conf.trgout_enable) regval |= TRGOPT_TRGOEN; write_u8_inc(&wrptr, regval); - count = wrptr - trgconf_bytes; ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION, - trgconf_bytes, count); + cmd_bytes, wrptr - cmd_bytes); if (ret != SR_OK) return ret; @@ -551,12 +542,12 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) * Derive a mask where bits are set for unavailable channels. * Either send the single byte, or the full byte sequence. */ - pindis_mask = ~((1UL << devc->num_channels) - 1); + pindis_mask = ~BITS_MASK(devc->interp.num_channels); if (devc->clock.samplerate > SR_MHZ(50)) { ret = sigma_set_register(devc, WRITE_CLOCK_SELECT, pindis_mask & 0xff); } else { - wrptr = clock_bytes; + wrptr = cmd_bytes; /* Select 50MHz base clock, and divider. */ async = 0; div = SR_MHZ(50) / devc->clock.samplerate - 1; @@ -580,7 +571,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) write_u8_inc(&wrptr, div); write_u16be_inc(&wrptr, pindis_mask); ret = sigma_write_register(devc, WRITE_CLOCK_SELECT, - clock_bytes, wrptr - clock_bytes); + cmd_bytes, wrptr - cmd_bytes); } if (ret != SR_OK) return ret; @@ -593,9 +584,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) /* Start acqusition. */ regval = WMR_TRGRES | WMR_SDRAMWRITEEN; -#if ASIX_SIGMA_WITH_TRIGGER - regval |= WMR_TRGEN; -#endif + if (devc->use_triggers) + regval |= WMR_TRGEN; ret = sigma_set_register(devc, WRITE_MODE, regval); if (ret != SR_OK) return ret; @@ -610,7 +600,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi) if (ret != SR_OK) return ret; - devc->state.state = SIGMA_CAPTURE; + devc->state = SIGMA_CAPTURE; return SR_OK; } @@ -628,10 +618,10 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi) * already. The detour is required to have sample data retrieved * for forced acquisition stops. */ - if (devc->state.state == SIGMA_CAPTURE) { - devc->state.state = SIGMA_STOPPING; + if (devc->state == SIGMA_CAPTURE) { + devc->state = SIGMA_STOPPING; } else { - devc->state.state = SIGMA_IDLE; + devc->state = SIGMA_IDLE; (void)sr_session_source_remove(sdi->session, -1); }