X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=pv%2Fdata%2Flogicsegment.cpp;h=1bbd8d7cf0e7c40255ce13ae21d7211cafc550d6;hb=f98070844c2d468fdbb6beb5b65e4ccbbcd3f10b;hp=3896ff2151efc09989d34211b78399f017473c88;hpb=1ec3e43f7489cae3a9ca43e665044c8717f345f1;p=pulseview.git

diff --git a/pv/data/logicsegment.cpp b/pv/data/logicsegment.cpp
index 3896ff21..1bbd8d7c 100644
--- a/pv/data/logicsegment.cpp
+++ b/pv/data/logicsegment.cpp
@@ -25,6 +25,7 @@
 #include <cmath>
 #include <cstdlib>
 #include <cstring>
+#include <cstdint>
 
 #include "logic.hpp"
 #include "logicsegment.hpp"
@@ -64,7 +65,7 @@ LogicSegment::~LogicSegment()
 		free(l.data);
 }
 
-uint64_t LogicSegment::unpack_sample(const uint8_t *ptr) const
+inline uint64_t LogicSegment::unpack_sample(const uint8_t *ptr) const
 {
 #ifdef HAVE_UNALIGNED_LITTLE_ENDIAN_ACCESS
 	return *(uint64_t*)ptr;
@@ -102,7 +103,7 @@ uint64_t LogicSegment::unpack_sample(const uint8_t *ptr) const
 #endif
 }
 
-void LogicSegment::pack_sample(uint8_t *ptr, uint64_t value)
+inline void LogicSegment::pack_sample(uint8_t *ptr, uint64_t value)
 {
 #ifdef HAVE_UNALIGNED_LITTLE_ENDIAN_ACCESS
 	*(uint64_t*)ptr = value;
@@ -152,8 +153,8 @@ void LogicSegment::append_payload(void *data, uint64_t data_size)
 
 	lock_guard<recursive_mutex> lock(mutex_);
 
-	uint64_t prev_sample_count = sample_count_;
-	uint64_t sample_count = data_size / unit_size_;
+	const uint64_t prev_sample_count = sample_count_;
+	const uint64_t sample_count = data_size / unit_size_;
 
 	append_samples(data, sample_count);
 
@@ -236,8 +237,8 @@ void LogicSegment::append_payload_to_mipmap()
 	dest_ptr = (uint8_t*)m0.data + prev_length * unit_size_;
 
 	// Iterate through the samples to populate the first level mipmap
-	uint64_t start_sample = prev_length * MipMapScaleFactor;
-	uint64_t end_sample = m0.length * MipMapScaleFactor;
+	const uint64_t start_sample = prev_length * MipMapScaleFactor;
+	const uint64_t end_sample = m0.length * MipMapScaleFactor;
 
 	it = begin_raw_sample_iteration(start_sample);
 	for (uint64_t i = start_sample; i < end_sample;) {
@@ -302,9 +303,8 @@ uint64_t LogicSegment::get_unpacked_sample(uint64_t index) const
 	uint8_t data[8];
 
 	get_raw_samples(index, 1, data);
-	uint64_t sample = unpack_sample(data);
 
-	return sample;
+	return unpack_sample(data);
 }
 
 void LogicSegment::get_subsampled_edges(
@@ -480,7 +480,7 @@ uint64_t LogicSegment::get_subsample(int level, uint64_t offset) const
 
 uint64_t LogicSegment::pow2_ceil(uint64_t x, unsigned int power)
 {
-	const uint64_t p = 1 << power;
+	const uint64_t p = UINT64_C(1) << power;
 	return (x + p - 1) / p * p;
 }