X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=output%2Fvcd.c;h=44a12dec37a8c2e2265ea499d4410d61443d5ac3;hb=3699a8a1ff68a2f5f781c6ae74946adc8bc82673;hp=d1526c1b6587e076732b343b07a9c81c692df156;hpb=05c644ea081f5973fcbb2429318b808b931edfe3;p=libsigrok.git

diff --git a/output/vcd.c b/output/vcd.c
index d1526c1b..44a12dec 100644
--- a/output/vcd.c
+++ b/output/vcd.c
@@ -62,6 +62,8 @@ static int init(struct sr_output *o)
 
 	for (l = o->sdi->probes; l; l = l->next) {
 		probe = l->data;
+		if (probe->type != SR_PROBE_LOGIC)
+			continue;
 		if (!probe->enabled)
 			continue;
 		ctx->probeindices = g_array_append_val(
@@ -124,6 +126,8 @@ static int init(struct sr_output *o)
 	/* Wires / channels */
 	for (i = 0, l = o->sdi->probes; l; l = l->next, i++) {
 		probe = l->data;
+		if (probe->type != SR_PROBE_LOGIC)
+			continue;
 		if (!probe->enabled)
 			continue;
 		g_string_append_printf(ctx->header, "$var wire 1 %c %s $end\n",