X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=include%2Flibsigrok%2Flibsigrok.h;h=a367ddeffb938b26c1e767cabe1e7637c6a0aa0f;hb=e3f86ef5fc4e5061a19b4af72727077797446fbd;hp=e88360b68a9c6243531b5479a298b39efc9dd475;hpb=3601d50e2643f4e871ef03c2f507f43a436ea81c;p=libsigrok.git

diff --git a/include/libsigrok/libsigrok.h b/include/libsigrok/libsigrok.h
index e88360b6..a367ddef 100644
--- a/include/libsigrok/libsigrok.h
+++ b/include/libsigrok/libsigrok.h
@@ -956,6 +956,8 @@ enum sr_configkey {
 	 * Channel regulation
 	 * get: "CV", "CC" or "UR", denoting constant voltage, constant current
 	 *      or unregulated.
+	 *      "CC-" denotes a power supply in current sink mode (e.g. HP 66xxB).
+	 *      "" is used when there is no regulation, e.g. the output is disabled.
 	 */
 	SR_CONF_REGULATION,
 
@@ -989,6 +991,30 @@ enum sr_configkey {
 	/** Under-voltage condition threshold. */
 	SR_CONF_UNDER_VOLTAGE_CONDITION_THRESHOLD,
 
+	/**
+	 * Which external clock source to use if the device supports
+	 * multiple external clock channels.
+	 */
+	SR_CONF_EXTERNAL_CLOCK_SOURCE,
+
+	/** Offset of a source without strictly-defined MQ. */
+	SR_CONF_OFFSET,
+
+	/** The device supports setting a pattern for the logic trigger. */
+	SR_CONF_TRIGGER_PATTERN,
+
+	/** High resolution mode. */
+	SR_CONF_HIGH_RESOLUTION,
+
+	/** Peak detection. */
+	SR_CONF_PEAK_DETECTION,
+
+	/** Logic threshold: predefined levels (TTL, ECL, CMOS, etc). */
+	SR_CONF_LOGIC_THRESHOLD,
+
+	/** Logic threshold: custom numerical value. */
+	SR_CONF_LOGIC_THRESHOLD_CUSTOM,
+
 	/* Update sr_key_info_config[] (hwdriver.c) upon changes! */
 
 	/*--- Special stuff -------------------------------------------------*/