X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=i2s%2F2ch-16bit-16khz%2FREADME;h=79aa873965ee02a6cd316bcea7c72a040049f784;hb=47cd3c8ff64cd43ddf47f5da497b88e30616b162;hp=5403a16286166684201a9ceb40eaac084e71ea78;hpb=f4298ac310a284590808a47d9e0d33ee449e15c4;p=sigrok-dumps.git

diff --git a/i2s/2ch-16bit-16khz/README b/i2s/2ch-16bit-16khz/README
index 5403a16..79aa873 100644
--- a/i2s/2ch-16bit-16khz/README
+++ b/i2s/2ch-16bit-16khz/README
@@ -2,18 +2,16 @@
 I2S Master 2-channel 16-bit 16-kHz
 -------------------------------------------------------------------------------
 
-This is an example of an I2S master with a playing a recording of the BBC
+This is an example of an I2S master playing a recording of the BBC
 shipping forecast through one channel, and the other channel disconnected.
 
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a EE Electronics ESLA201A at a
-sample rate of 16MHz. The logic analyzer probes were connected to the I2S
-pins like this:
+The logic analyzer used was an EE Electronics ESLA201A (at 16MHz):
 
-  Probe       Signal
-  ------------------------
+  Probe       I2S pin
+  -------------------
   0           Clock
   1           Frame Select
   2           Data