X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=i2c%2Frtc_epson_8564je%2FREADME;h=a896bc5cbbcae8a0bdb45aee45774306c62a163a;hb=d83821bfc484fd1b27cb4594387865147e3c990e;hp=a6594f8a0b8c07c044f240dc4d6d722ed2689c25;hpb=49d0ad90ecb5e1df1b82a5fa9078bb1b3b7ae8d7;p=sigrok-dumps.git

diff --git a/i2c/rtc_epson_8564je/README b/i2c/rtc_epson_8564je/README
index a6594f8..a896bc5 100644
--- a/i2c/rtc_epson_8564je/README
+++ b/i2c/rtc_epson_8564je/README
@@ -1,22 +1,21 @@
 -------------------------------------------------------------------------------
-Epson 8564JE I2C RTC
+Epson RTC-8564 JE/NB
 -------------------------------------------------------------------------------
 
-This an example capture of I2C traffic from/to an Epson 8564JE I2C RTC chip,
-which has a slave address of 0x51 (or 0xa2, if the read/write bit is included).
+This is an example capture of I2C traffic from/to an Epson RTC-8564 JE/NB
+I2C RTC chip, which has a slave address of 0x51 (or 0xa2, if the read/write
+bit is included).
 
 
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate
-of 1MHz. The logic analyzer probes were connected to the RTC chip like this:
+The logic analyzer used was a ChronoVu LA8 (at 1MHz):
 
   Probe       RTC chip pin
   ------------------------
   0 (green)   SCL
   1 (orange)  SDA
-  GND         GND
 
 
 Data