X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=i2c%2Frtc_epson_8564je%2FREADME;h=60cd0759fb3296dd1f0b3a089cddf62a64a7c890;hb=47cd3c8ff64cd43ddf47f5da497b88e30616b162;hp=decf739db8fa2fb10648bb5e286a84c0bdb1ae50;hpb=f4298ac310a284590808a47d9e0d33ee449e15c4;p=libsigrokdecode.git

diff --git a/i2c/rtc_epson_8564je/README b/i2c/rtc_epson_8564je/README
index decf739..60cd075 100644
--- a/i2c/rtc_epson_8564je/README
+++ b/i2c/rtc_epson_8564je/README
@@ -9,8 +9,7 @@ which has a slave address of 0x51 (or 0xa2, if the read/write bit is included).
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate
-of 1MHz. The logic analyzer probes were connected to the RTC chip like this:
+The logic analyzer used was a ChronoVu LA8 (at 1MHz):
 
   Probe       RTC chip pin
   ------------------------