X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=i2c%2Fa2_dummy_write%2FREADME;h=9bd37f730bc21d6cedf9a314b4a7aaefe5dfbe7f;hb=47cd3c8ff64cd43ddf47f5da497b88e30616b162;hp=d7fe4e76bd7bd5bc83796b2b1c63e5b42259ce4e;hpb=048863512d8088884b26248f9d026e1596923303;p=libsigrokdecode.git

diff --git a/i2c/a2_dummy_write/README b/i2c/a2_dummy_write/README
index d7fe4e7..9bd37f7 100644
--- a/i2c/a2_dummy_write/README
+++ b/i2c/a2_dummy_write/README
@@ -3,21 +3,19 @@ Dummy I2C writes
 -------------------------------------------------------------------------------
 
 This an example capture of some dummy I2C traffic, where the master writes
-to a slave at address 0x51 (or 0x2a, if the read/write bit is included)
-in an infinite loop. The slave does not respond.
+to a slave (an RTC) at address 0x51 (or 0x2a, if the read/write bit is
+included) in an infinite loop. The slave does not respond.
 
 
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate
-of 1MHz. The logic analyzer probes were connected to the I2C pins like this:
+The logic analyzer used was a ChronoVu LA8 (at 1MHz):
 
   Probe       RTC chip pin
   ------------------------
   0 (green)   SCL
   1 (orange)  SDA
-  GND         GND
 
 
 Data