X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fsysclk-lwla%2Fprotocol.c;h=4c89ea2480db4d759841c0fb0333edaab89ba466;hb=7f4975b4401a1e8de61e356b5b272fc00b658260;hp=3618eb11030745e51da0035a8ce298e25549f9a2;hpb=8a3ddd8815aea40a2efd5987e754df1ec1322337;p=libsigrok.git

diff --git a/hardware/sysclk-lwla/protocol.c b/hardware/sysclk-lwla/protocol.c
index 3618eb11..4c89ea24 100644
--- a/hardware/sysclk-lwla/protocol.c
+++ b/hardware/sysclk-lwla/protocol.c
@@ -20,9 +20,6 @@
 #include "protocol.h"
 #include <string.h>
 
-/* Bit mask covering all 34 channels. */
-#define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_PROBES) - 1)
-
 /* Bit mask for the RLE repeat-count-follows flag. */
 #define RLE_FLAG_LEN_FOLLOWS ((uint64_t)1 << 35)
 
@@ -64,11 +61,13 @@ static int submit_transfer(struct dev_context *devc,
 static int capture_setup(const struct sr_dev_inst *sdi)
 {
 	struct dev_context *devc;
+	struct acquisition_state *acq;
 	uint64_t divider_count;
 	uint64_t memory_limit;
 	uint16_t command[3 + 10*4];
 
 	devc = sdi->priv;
+	acq  = devc->acquisition;
 
 	command[0] = LWLA_WORD(CMD_CAP_SETUP);
 	command[1] = LWLA_WORD(0); /* address */
@@ -83,7 +82,7 @@ static int capture_setup(const struct sr_dev_inst *sdi)
 	 * 100 MHz. At the highest samplerate of 125 MHz the clock divider
 	 * is bypassed.
 	 */
-	if (devc->samplerate > 0 && devc->samplerate < SR_MHZ(100))
+	if (!acq->bypass_clockdiv && devc->samplerate > 0)
 		divider_count = SR_MHZ(100) / devc->samplerate - 1;
 	else
 		divider_count = 0;
@@ -229,16 +228,15 @@ static void issue_read_start(const struct sr_dev_inst *sdi)
 	acq->sample  = 0;
 	acq->run_len = 0;
 
-	acq->captured_samples    = 0;
-	acq->transferred_samples = 0;
+	acq->samples_done = 0;
 
 	/* For some reason, the start address is 4 rather than 0. */
 	acq->mem_addr_done = 4;
 	acq->mem_addr_next = 4;
 	acq->mem_addr_stop = acq->mem_addr_fill;
 
-	/* Byte offset into the packet output buffer. */
-	acq->out_offset = 0;
+	/* Sample position in the packet output buffer. */
+	acq->out_index = 0;
 
 	regvals = devc->reg_write_seq;
 
@@ -258,6 +256,10 @@ static void issue_read_start(const struct sr_dev_inst *sdi)
 		devc->state = STATE_READ_PREPARE;
 }
 
+/* Issue a command as an asynchronous USB transfer which returns the device
+ * to normal state after a read operation.  Sets a new device context state
+ * on success.
+ */
 static void issue_read_end(const struct sr_dev_inst *sdi)
 {
 	struct dev_context *devc;
@@ -287,8 +289,7 @@ static void process_capture_length(const struct sr_dev_inst *sdi)
 	}
 	acq->mem_addr_fill = LWLA_READ32(acq->xfer_buf_in);
 
-	sr_dbg("%lu words in capture buffer.",
-	       (unsigned long)acq->mem_addr_fill);
+	sr_dbg("%zu words in capture buffer.", acq->mem_addr_fill);
 
 	if (acq->mem_addr_fill > 0 && sdi->status == SR_ST_ACTIVE)
 		issue_read_start(sdi);
@@ -342,9 +343,10 @@ static void issue_stop_capture(const struct sr_dev_inst *sdi)
 static void process_capture_status(const struct sr_dev_inst *sdi)
 {
 	uint64_t duration;
-	uint64_t timescale;
 	struct dev_context *devc;
 	struct acquisition_state *acq;
+	unsigned int mem_fill;
+	unsigned int flags;
 
 	devc = sdi->priv;
 	acq  = devc->acquisition;
@@ -360,22 +362,32 @@ static void process_capture_status(const struct sr_dev_inst *sdi)
 	 * in the FPGA.  These fields are definitely less than 64 bit wide
 	 * internally, and the unused bits occasionally even contain garbage.
 	 */
-	acq->mem_addr_fill = LWLA_READ32(&acq->xfer_buf_in[0]);
-	duration           = LWLA_READ32(&acq->xfer_buf_in[8]);
-	acq->capture_flags = LWLA_READ32(&acq->xfer_buf_in[16])
-				& STATUS_FLAG_MASK;
-
-	/* The 125 MHz setting is special, and uses the same timebase
-	 * for the duration field as the 100 MHz setting.
+	mem_fill = LWLA_READ32(&acq->xfer_buf_in[0]);
+	duration = LWLA_READ32(&acq->xfer_buf_in[8]);
+	flags    = LWLA_READ32(&acq->xfer_buf_in[16]) & STATUS_FLAG_MASK;
+
+	/* The LWLA1034 runs at 125 MHz if the clock divider is bypassed.
+	 * However, the time base used for the duration is apparently not
+	 * adjusted for this "boost" mode.  Whereas normally the duration
+	 * unit is 1 ms, it is 0.8 ms when the clock divider is bypassed.
+	 * As 0.8 = 100 MHz / 125 MHz, it seems that the internal cycle
+	 * counter period is the same as at the 100 MHz setting.
 	 */
-	timescale = MIN(devc->samplerate, SR_MHZ(100));
-	acq->captured_samples = (duration * timescale) / 1000;
+	if (acq->bypass_clockdiv)
+		acq->duration_now = duration * 4 / 5;
+	else
+		acq->duration_now = duration;
+
+	sr_spew("Captured %u words, %" PRIu64 " ms, flags 0x%02X.",
+		mem_fill, acq->duration_now, flags);
+
+	if ((flags & STATUS_TRIGGERED) > (acq->capture_flags & STATUS_TRIGGERED))
+		sr_info("Capture triggered.");
 
-	sr_spew("Captured %lu words, %" PRIu64 " samples, flags 0x%02X",
-		(unsigned long)acq->mem_addr_fill,
-		acq->captured_samples, acq->capture_flags);
+	acq->capture_flags = flags;
 
-	if (acq->captured_samples >= devc->limit_samples) {
+	if (acq->duration_now >= acq->duration_max) {
+		sr_dbg("Time limit reached, stopping capture.");
 		issue_stop_capture(sdi);
 		return;
 	}
@@ -425,49 +437,6 @@ static void request_read_mem(const struct sr_dev_inst *sdi)
 	}
 }
 
-/* Send a packet of logic samples to the session bus.  The payload is taken
- * from the acquisition state.  The return value indicates whether to stop
- * reading more samples.
- */
-static gboolean send_logic_packet(const struct sr_dev_inst *sdi)
-{
-	uint64_t samples;
-	struct dev_context *devc;
-	struct acquisition_state *acq;
-	struct sr_datafeed_packet packet;
-	struct sr_datafeed_logic  logic;
-	int last;
-
-	devc = sdi->priv;
-	acq  = devc->acquisition;
-
-	if (acq->transferred_samples >= devc->limit_samples)
-		return TRUE;
-
-	packet.type    = SR_DF_LOGIC;
-	packet.payload = &logic;
-	logic.unitsize = UNIT_SIZE;
-	logic.data     = acq->out_packet;
-	logic.length   = acq->out_offset;
-
-	samples = acq->out_offset / UNIT_SIZE;
-	last = FALSE;
-
-	/* Cut the packet short if necessary. */
-	if (acq->transferred_samples + samples >= devc->limit_samples) {
-		samples = devc->limit_samples - acq->transferred_samples;
-		logic.length = samples * UNIT_SIZE;
-		last = TRUE;
-	}
-	acq->transferred_samples += samples;
-	acq->out_offset = 0;
-
-	/* Send off logic datafeed packet. */
-	sr_session_send(sdi, &packet);
-
-	return last;
-}
-
 /* Demangle and decompress incoming sample data from the capture buffer.
  * The data chunk is taken from the acquisition state, and is expected to
  * contain a multiple of 8 device words.
@@ -478,15 +447,19 @@ static gboolean send_logic_packet(const struct sr_dev_inst *sdi)
 static int process_sample_data(const struct sr_dev_inst *sdi)
 {
 	uint64_t sample;
-	uint64_t run_len;
 	uint64_t high_nibbles;
 	uint64_t word;
 	struct dev_context *devc;
 	struct acquisition_state *acq;
 	uint8_t *out_p;
 	uint16_t *slice;
+	struct sr_datafeed_packet packet;
+	struct sr_datafeed_logic logic;
 	size_t expect_len;
 	size_t actual_len;
+	size_t out_max_samples;
+	size_t out_run_samples;
+	size_t ri;
 	size_t in_words_left;
 	size_t si;
 
@@ -494,7 +467,7 @@ static int process_sample_data(const struct sr_dev_inst *sdi)
 	acq  = devc->acquisition;
 
 	if (acq->mem_addr_done >= acq->mem_addr_stop
-			|| acq->transferred_samples >= devc->limit_samples)
+			|| acq->samples_done >= acq->samples_max)
 		return SR_OK;
 
 	in_words_left = MIN(acq->mem_addr_stop - acq->mem_addr_done,
@@ -503,33 +476,55 @@ static int process_sample_data(const struct sr_dev_inst *sdi)
 	actual_len = acq->xfer_in->actual_length;
 
 	if (actual_len != expect_len) {
-		sr_err("Received size %lu does not match expected size %lu.",
-		       (unsigned long)actual_len, (unsigned long)expect_len);
+		sr_err("Received size %zu does not match expected size %zu.",
+		       actual_len, expect_len);
 		devc->transfer_error = TRUE;
 		return SR_ERR;
 	}
 	acq->mem_addr_done += in_words_left;
+
+	/* Prepare session packet. */
+	packet.type    = SR_DF_LOGIC;
+	packet.payload = &logic;
+	logic.unitsize = UNIT_SIZE;
+	logic.data     = acq->out_packet;
+
 	slice = acq->xfer_buf_in;
 	si = 0; /* word index within slice */
 
 	for (;;) {
-		sample = acq->sample;
+		/* Calculate number of samples to write into packet. */
+		out_max_samples = MIN(acq->samples_max - acq->samples_done,
+				      PACKET_LENGTH - acq->out_index);
+		out_run_samples = MIN(acq->run_len, out_max_samples);
+
 		/* Expand run-length samples into session packet. */
-		for (run_len = acq->run_len; run_len > 0; --run_len) {
-			out_p = &acq->out_packet[acq->out_offset];
+		sample = acq->sample;
+		out_p = &acq->out_packet[acq->out_index * UNIT_SIZE];
+
+		for (ri = 0; ri < out_run_samples; ++ri) {
 			out_p[0] =  sample        & 0xFF;
 			out_p[1] = (sample >>  8) & 0xFF;
 			out_p[2] = (sample >> 16) & 0xFF;
 			out_p[3] = (sample >> 24) & 0xFF;
 			out_p[4] = (sample >> 32) & 0xFF;
-			acq->out_offset += UNIT_SIZE;
-
-			/* Send out packet if it is full. */
-			if (acq->out_offset > PACKET_SIZE - UNIT_SIZE)
-				if (send_logic_packet(sdi))
-					return SR_OK; /* sample limit reached */
+			out_p += UNIT_SIZE;
+		}
+		acq->run_len -= out_run_samples;
+		acq->out_index += out_run_samples;
+		acq->samples_done += out_run_samples;
+
+		/* Packet full or sample count limit reached? */
+		if (out_run_samples == out_max_samples) {
+			logic.length = acq->out_index * UNIT_SIZE;
+			sr_session_send(sdi, &packet);
+			acq->out_index = 0;
+
+			if (acq->samples_done >= acq->samples_max)
+				return SR_OK; /* sample limit reached */
+			if (acq->run_len > 0)
+				continue; /* need another packet */
 		}
-		acq->run_len = 0;
 
 		if (in_words_left == 0)
 			break; /* done with current chunk */
@@ -557,10 +552,12 @@ static int process_sample_data(const struct sr_dev_inst *sdi)
 		--in_words_left;
 	}
 
-	/* Send out partially filled packet if it is the last one. */
-	if (acq->mem_addr_done >= acq->mem_addr_stop && acq->out_offset > 0)
-		send_logic_packet(sdi);
-
+	/* Send out partially filled packet if this was the last chunk. */
+	if (acq->mem_addr_done >= acq->mem_addr_stop && acq->out_index > 0) {
+		logic.length = acq->out_index * UNIT_SIZE;
+		sr_session_send(sdi, &packet);
+		acq->out_index = 0;
+	}
 	return SR_OK;
 }
 
@@ -675,7 +672,7 @@ static void receive_transfer_in(struct libusb_transfer *transfer)
 	case STATE_READ_RESPONSE:
 		if (process_sample_data(sdi) == SR_OK
 				&& acq->mem_addr_next < acq->mem_addr_stop
-				&& acq->transferred_samples < devc->limit_samples)
+				&& acq->samples_done < acq->samples_max)
 			request_read_mem(sdi);
 		else
 			issue_read_end(sdi);
@@ -716,21 +713,21 @@ SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi)
 	ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL1, &value);
 	if (ret != SR_OK)
 		return ret;
-	sr_info("Received test word 0x%08X back.", value);
+	sr_dbg("Received test word 0x%08X back.", value);
 	if (value != 0x12345678)
 		return SR_ERR;
 
 	ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL4, &value);
 	if (ret != SR_OK)
 		return ret;
-	sr_info("Received test word 0x%08X back.", value);
+	sr_dbg("Received test word 0x%08X back.", value);
 	if (value != 0x12345678)
 		return SR_ERR;
 
 	ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL3, &value);
 	if (ret != SR_OK)
 		return ret;
-	sr_info("Received test word 0x%08X back.", value);
+	sr_dbg("Received test word 0x%08X back.", value);
 	if (value != 0x87654321)
 		return SR_ERR;
 
@@ -745,20 +742,22 @@ SR_PRIV int lwla_set_clock_source(const struct sr_dev_inst *sdi)
 	struct dev_context *devc;
 	int ret;
 	enum clock_source selected;
+	size_t idx;
 
 	devc = sdi->priv;
 	selected = devc->selected_clock_source;
 
 	if (devc->cur_clock_source != selected) {
 		devc->cur_clock_source = CLOCK_SOURCE_NONE;
-
-		if (selected >= 0 && selected < G_N_ELEMENTS(bitstream_map)) {
-			ret = lwla_send_bitstream(sdi->conn,
-						  bitstream_map[selected]);
-			if (ret == SR_OK)
-				devc->cur_clock_source = selected;
-			return ret;
+		idx = selected;
+		if (idx >= G_N_ELEMENTS(bitstream_map)) {
+			sr_err("Clock source (%d) out of range", selected);
+			return SR_ERR_BUG;
 		}
+		ret = lwla_send_bitstream(sdi->conn, bitstream_map[idx]);
+		if (ret == SR_OK)
+			devc->cur_clock_source = selected;
+		return ret;
 	}
 	return SR_OK;
 }
@@ -769,11 +768,57 @@ SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi)
 {
 	struct dev_context *devc;
 	struct sr_usb_dev_inst *usb;
+	struct acquisition_state *acq;
 	struct regval_pair regvals[7];
 	int ret;
 
 	devc = sdi->priv;
 	usb  = sdi->conn;
+	acq  = devc->acquisition;
+
+	if (devc->limit_msec > 0) {
+		acq->duration_max = devc->limit_msec;
+		sr_info("Acquisition time limit %" PRIu64 " ms.",
+			devc->limit_msec);
+	} else
+		acq->duration_max = MAX_LIMIT_MSEC;
+
+	if (devc->limit_samples > 0) {
+		acq->samples_max = devc->limit_samples;
+		sr_info("Acquisition sample count limit %" PRIu64 ".",
+			devc->limit_samples);
+	} else
+		acq->samples_max = MAX_LIMIT_SAMPLES;
+
+	switch (devc->cur_clock_source) {
+	case CLOCK_SOURCE_INT:
+		sr_info("Internal clock, samplerate %" PRIu64 ".",
+			devc->samplerate);
+		if (devc->samplerate == 0)
+			return SR_ERR_BUG;
+		/* At 125 MHz, the clock divider is bypassed. */
+		acq->bypass_clockdiv = (devc->samplerate > SR_MHZ(100));
+
+		/* If only one of the limits is set, derive the other one. */
+		if (devc->limit_msec == 0 && devc->limit_samples > 0)
+			acq->duration_max = devc->limit_samples
+					* 1000 / devc->samplerate + 1;
+		else if (devc->limit_samples == 0 && devc->limit_msec > 0)
+			acq->samples_max = devc->limit_msec
+					* devc->samplerate / 1000;
+		break;
+	case CLOCK_SOURCE_EXT_FALL:
+		sr_info("External clock, falling edge.");
+		acq->bypass_clockdiv = TRUE;
+		break;
+	case CLOCK_SOURCE_EXT_RISE:
+		sr_info("External clock, rising edge.");
+		acq->bypass_clockdiv = TRUE;
+		break;
+	default:
+		sr_err("No valid clock source has been configured.");
+		return SR_ERR;
+	}
 
 	regvals[0].reg = REG_MEM_CTRL2;
 	regvals[0].val = 2;
@@ -794,7 +839,7 @@ SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi)
 	regvals[5].val = 0;
 
 	regvals[6].reg = REG_DIV_BYPASS;
-	regvals[6].val = (devc->samplerate > SR_MHZ(100)) ? 1 : 0;
+	regvals[6].val = acq->bypass_clockdiv;
 
 	ret = lwla_write_regs(usb, regvals, G_N_ELEMENTS(regvals));
 	if (ret != SR_OK)
@@ -818,6 +863,10 @@ SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
 	usb  = sdi->conn;
 	acq  = devc->acquisition;
 
+	acq->duration_now  = 0;
+	acq->mem_addr_fill = 0;
+	acq->capture_flags = 0;
+
 	libusb_fill_bulk_transfer(acq->xfer_out, usb->devhdl, EP_COMMAND,
 				  (unsigned char *)acq->xfer_buf_out, 0,
 				  &receive_transfer_out,