X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fsaleae-logic%2Fsaleae-logic.c;h=b986243b80a8693fe8bfbdb29c584e8e11596e1c;hb=d261dbbfcc73;hp=295582a963c435ed2bb9466f24030fcdb95b8768;hpb=ea9cfed7a55260ab97f57150b57c42a28c3a85a7;p=libsigrok.git

diff --git a/hardware/saleae-logic/saleae-logic.c b/hardware/saleae-logic/saleae-logic.c
index 295582a9..b986243b 100644
--- a/hardware/saleae-logic/saleae-logic.c
+++ b/hardware/saleae-logic/saleae-logic.c
@@ -46,6 +46,12 @@ static int hwcaps[] = {
 	0,
 };
 
+/*
+ * Probes are numbered 1-8.
+ *
+ * TODO: FX2 eval boards with the standard Cypress VID/PID can have 16 pins
+ * or probes in theory, which is not supported by the Saleae Logic firmware.
+ */
 static const char *probe_names[] = {
 	"0",
 	"1",