X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Frigol-ds%2Fapi.c;h=c11d3b6456b949283ef243ba3ccf3e28c19a016b;hb=8e06edf5282647deb9ddcc9ffad5bd6f94ae6f6a;hp=de4d8a376ed838ad37b340c492b60d926126a9ec;hpb=d993d8d39d739d84f4927d251a826142a6a946a8;p=libsigrok.git diff --git a/hardware/rigol-ds/api.c b/hardware/rigol-ds/api.c index de4d8a37..c11d3b64 100644 --- a/hardware/rigol-ds/api.c +++ b/hardware/rigol-ds/api.c @@ -40,6 +40,8 @@ static const int32_t hwcaps[] = { SR_CONF_TRIGGER_SLOPE, SR_CONF_HORIZ_TRIGGERPOS, SR_CONF_NUM_TIMEBASE, + SR_CONF_LIMIT_FRAMES, + SR_CONF_SAMPLERATE, }; static const int32_t analog_hwcaps[] = { @@ -51,6 +53,7 @@ static const int32_t analog_hwcaps[] = { static const uint64_t timebases[][2] = { /* nanoseconds */ + { 1, 1000000000 }, { 2, 1000000000 }, { 5, 1000000000 }, { 10, 1000000000 }, @@ -88,7 +91,7 @@ static const uint64_t timebases[][2] = { { 100, 1 }, { 200, 1 }, { 500, 1 }, - /* { 1000, 1 }, Confuses other code? */ + { 1000, 1 }, }; static const uint64_t vdivs[][2] = { @@ -161,12 +164,12 @@ static const char *data_sources[] = { #define AGILENT "Agilent Technologies" static const struct rigol_ds_model supported_models[] = { - {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, - {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, - {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, - {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, - {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, - {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, @@ -229,12 +232,7 @@ static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...) if (ret != SR_OK) return SR_ERR; - /* When setting a bunch of parameters in a row, the DS1052E scrambles - * some of them unless there is at least 100ms delay in between. */ - sr_spew("delay %dms", 100); - g_usleep(100000); - - return SR_OK; + return sr_scpi_get_opc(sdi->conn); } static int init(struct sr_context *sr_ctx) @@ -455,21 +453,65 @@ static int cleanup(void) return dev_clear(); } +static int analog_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + struct sr_probe *probe; + int analog_probes = 0; + GSList *l; + + switch (devc->model->series) { + case RIGOL_VS5000: + return VS5000_ANALOG_LIVE_WAVEFORM_SIZE; + case RIGOL_DS1000: + return DS1000_ANALOG_LIVE_WAVEFORM_SIZE; + default: + for (l = sdi->probes; l; l = l->next) { + probe = l->data; + if (probe->type == SR_PROBE_ANALOG && probe->enabled) + analog_probes++; + } + if (devc->data_source == DATA_SOURCE_MEMORY) { + if (analog_probes == 1) + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; + else + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + } else { + if (devc->model->series == AGILENT_DSO1000) + return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE; + else + return DS2000_ANALOG_LIVE_WAVEFORM_SIZE; + } + } +} + +static int digital_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + + switch (devc->model->series) { + case RIGOL_VS5000: + return VS5000_DIGITAL_WAVEFORM_SIZE; + case RIGOL_DS1000: + return DS1000_DIGITAL_WAVEFORM_SIZE; + default: + return 0; + } +} + static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, const struct sr_probe_group *probe_group) { struct dev_context *devc; + uint64_t samplerate; if (!sdi || !(devc = sdi->priv)) return SR_ERR_ARG; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } switch (id) { @@ -486,6 +528,15 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, else *data = g_variant_new_string("Segmented"); break; + case SR_CONF_SAMPLERATE: + if (devc->data_source == DATA_SOURCE_LIVE) { + samplerate = analog_frame_size(sdi) / + (devc->timebase * devc->model->num_horizontal_divs); + *data = g_variant_new_uint64(samplerate); + } else { + return SR_ERR_NA; + } + break; default: return SR_ERR_NA; } @@ -502,6 +553,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, unsigned int i, j; int ret; const char *tmp_str; + char buffer[16]; if (!(devc = sdi->priv)) return SR_ERR_ARG; @@ -510,12 +562,9 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, return SR_ERR_DEV_CLOSED; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } ret = SR_OK; @@ -539,14 +588,17 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, /* We have the trigger offset as a percentage of the frame, but * need to express this in seconds. */ t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases; - ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl); + g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl); + ret = set_cfg(sdi, ":TIM:OFFS %s", buffer); break; case SR_CONF_TIMEBASE: g_variant_get(data, "(tt)", &p, &q); for (i = 0; i < devc->num_timebases; i++) { if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) { devc->timebase = (float)p / q; - ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase); + g_ascii_formatd(buffer, sizeof(buffer), "%.9f", + devc->timebase); + ret = set_cfg(sdi, ":TIM:SCAL %s", buffer); break; } } @@ -590,8 +642,10 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, if (vdivs[j][0] != p || vdivs[j][1] != q) continue; devc->vdiv[i] = (float)p / q; - return set_cfg(sdi, ":CHAN%d:SCAL %.3f", i + 1, - devc->vdiv[i]); + g_ascii_formatd(buffer, sizeof(buffer), "%.3f", + devc->vdiv[i]); + return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1, + buffer); } return SR_ERR_ARG; } @@ -623,7 +677,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, devc->data_source = DATA_SOURCE_LIVE; else if (!strcmp(tmp_str, "Memory")) devc->data_source = DATA_SOURCE_MEMORY; - else if (devc->model->protocol == PROTOCOL_IEEE488_2 + else if (devc->model->series >= RIGOL_DS1000Z && !strcmp(tmp_str, "Segmented")) devc->data_source = DATA_SOURCE_SEGMENTED; else @@ -760,6 +814,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) struct sr_scpi_dev_inst *scpi; struct dev_context *devc; struct sr_probe *probe; + struct sr_datafeed_packet packet; GSList *l; if (sdi->status != SR_ST_ACTIVE) @@ -768,6 +823,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) scpi = sdi->conn; devc = sdi->priv; + devc->num_frames = 0; + for (l = sdi->probes; l; l = l->next) { probe = l->data; sr_dbg("handling probe %s", probe->name); @@ -780,16 +837,25 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1, probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; + devc->analog_channels[probe->index] = probe->enabled; } } else if (probe->type == SR_PROBE_LOGIC) { - if (probe->enabled) + if (probe->enabled) { devc->enabled_digital_probes = g_slist_append( devc->enabled_digital_probes, probe); + /* Turn on LA module if currently off. */ + if (!devc->la_enabled) { + if (set_cfg(sdi, ":LA:DISP ON") != SR_OK) + return SR_ERR; + devc->la_enabled = TRUE; + } + } if (probe->enabled != devc->digital_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index, probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; + devc->digital_channels[probe->index] = probe->enabled; } } } @@ -797,6 +863,11 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) if (!devc->enabled_analog_probes && !devc->enabled_digital_probes) return SR_ERR; + /* Turn off LA module if on and no digital probes selected. */ + if (devc->la_enabled && !devc->enabled_digital_probes) + if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK) + return SR_ERR; + if (devc->data_source == DATA_SOURCE_LIVE) { if (set_cfg(sdi, ":RUN") != SR_OK) return SR_ERR; @@ -820,21 +891,16 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) else devc->channel_entry = devc->enabled_digital_probes; - if (devc->model->protocol == PROTOCOL_LEGACY) { - devc->analog_frame_size = (devc->model->series == RIGOL_VS5000 ? - VS5000_ANALOG_LIVE_WAVEFORM_SIZE : - DS1000_ANALOG_LIVE_WAVEFORM_SIZE); + devc->analog_frame_size = analog_frame_size(sdi); + devc->digital_frame_size = digital_frame_size(sdi); + + if (devc->model->series < RIGOL_DS1000Z) { /* Fetch the first frame. */ if (rigol_ds_channel_start(sdi) != SR_OK) return SR_ERR; } else { if (devc->enabled_analog_probes) { - if (devc->data_source == DATA_SOURCE_MEMORY) - { - if (g_slist_length(devc->enabled_analog_probes) == 1) - devc->analog_frame_size = DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; - else - devc->analog_frame_size = DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + if (devc->data_source == DATA_SOURCE_MEMORY) { /* Apparently for the DS2000 the memory * depth can only be set in Running state - * this matches the behaviour of the UI. */ @@ -844,17 +910,16 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) return SR_ERR; if (set_cfg(sdi, ":STOP") != SR_OK) return SR_ERR; - } else { - if (devc->model->series == AGILENT_DSO1000) - devc->analog_frame_size = DSO1000_ANALOG_LIVE_WAVEFORM_SIZE; - else - devc->analog_frame_size = DS2000_ANALOG_LIVE_WAVEFORM_SIZE; } if (rigol_ds_capture_start(sdi) != SR_OK) return SR_ERR; } } + /* Start of first frame. */ + packet.type = SR_DF_FRAME_BEGIN; + sr_session_send(cb_data, &packet); + return SR_OK; } @@ -862,6 +927,7 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) { struct dev_context *devc; struct sr_scpi_dev_inst *scpi; + struct sr_datafeed_packet packet; (void)cb_data; @@ -872,6 +938,10 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) return SR_ERR; } + /* End of last frame. */ + packet.type = SR_DF_END; + sr_session_send(sdi, &packet); + g_slist_free(devc->enabled_analog_probes); g_slist_free(devc->enabled_digital_probes); devc->enabled_analog_probes = NULL;