X-Git-Url: https://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Frigol-ds%2Fapi.c;h=c11d3b6456b949283ef243ba3ccf3e28c19a016b;hb=8e06edf5282647deb9ddcc9ffad5bd6f94ae6f6a;hp=64f724bb6dc8f363632033ea6abdfd09dbcbea51;hpb=bafd489094c42e626ee0b1964893a308751c50b7;p=libsigrok.git diff --git a/hardware/rigol-ds/api.c b/hardware/rigol-ds/api.c index 64f724bb..c11d3b64 100644 --- a/hardware/rigol-ds/api.c +++ b/hardware/rigol-ds/api.c @@ -30,6 +30,7 @@ static const int32_t hwopts[] = { SR_CONF_CONN, + SR_CONF_SERIALCOMM }; static const int32_t hwcaps[] = { @@ -39,16 +40,20 @@ static const int32_t hwcaps[] = { SR_CONF_TRIGGER_SLOPE, SR_CONF_HORIZ_TRIGGERPOS, SR_CONF_NUM_TIMEBASE, + SR_CONF_LIMIT_FRAMES, + SR_CONF_SAMPLERATE, }; static const int32_t analog_hwcaps[] = { SR_CONF_NUM_VDIV, SR_CONF_VDIV, SR_CONF_COUPLING, + SR_CONF_DATA_SOURCE, }; static const uint64_t timebases[][2] = { /* nanoseconds */ + { 1, 1000000000 }, { 2, 1000000000 }, { 5, 1000000000 }, { 10, 1000000000 }, @@ -86,7 +91,7 @@ static const uint64_t timebases[][2] = { { 100, 1 }, { 200, 1 }, { 500, 1 }, - /* { 1000, 1 }, Confuses other code? */ + { 1000, 1 }, }; static const uint64_t vdivs[][2] = { @@ -115,6 +120,8 @@ static const uint64_t vdivs[][2] = { static const char *trigger_sources[] = { "CH1", "CH2", + "CH3", + "CH4", "EXT", "AC Line", "D0", @@ -141,17 +148,52 @@ static const char *coupling[] = { "GND", }; -/* name, series, min timebase, max timebase, min vdiv, digital channels */ +/* Do not change the order of entries */ +static const char *data_sources[] = { + "Live", + "Memory", + "Segmented", +}; + +/* + * name, series, protocol flavor, min timebase, max timebase, min vdiv, + * digital channels, number of horizontal divs + */ + +#define RIGOL "Rigol Technologies" +#define AGILENT "Agilent Technologies" + static const struct rigol_ds_model supported_models[] = { - {"DS1052E", 1, {5, 1000000000}, {50, 1}, {2, 1000}, false}, - {"DS1102E", 1, {2, 1000000000}, {50, 1}, {2, 1000}, false}, - {"DS1152E", 1, {2, 1000000000}, {50, 1}, {2, 1000}, false}, - {"DS1052D", 1, {5, 1000000000}, {50, 1}, {2, 1000}, true}, - {"DS1102D", 1, {2, 1000000000}, {50, 1}, {2, 1000}, true}, - {"DS1152D", 1, {2, 1000000000}, {50, 1}, {2, 1000}, true}, - {"DS2072", 2, {5, 1000000000}, {500, 1}, {500, 1000000}, false}, - {"DS2102", 2, {5, 1000000000}, {500, 1}, {500, 1000000}, false}, - {"DS2202", 2, {2, 1000000000}, {500, 1}, {500, 1000000}, false}, + {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, + {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, + {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, }; SR_PRIV struct sr_dev_driver rigol_ds_driver_info; @@ -162,6 +204,8 @@ static void clear_helper(void *priv) struct dev_context *devc; devc = priv; + g_free(devc->data); + g_free(devc->buffer); g_free(devc->coupling[0]); g_free(devc->coupling[1]); g_free(devc->trigger_source); @@ -179,20 +223,16 @@ static int dev_clear(void) static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...) { va_list args; - char buf[256]; + int ret; va_start(args, format); - vsnprintf(buf, 255, format, args); + ret = sr_scpi_send_variadic(sdi->conn, format, args); va_end(args); - if (rigol_ds_send(sdi, buf) != SR_OK) - return SR_ERR; - /* When setting a bunch of parameters in a row, the DS1052E scrambles - * some of them unless there is at least 100ms delay in between. */ - sr_spew("delay %dms", 100); - g_usleep(100000); + if (ret != SR_OK) + return SR_ERR; - return SR_OK; + return sr_scpi_get_opc(sdi->conn); } static int init(struct sr_context *sr_ctx) @@ -200,84 +240,70 @@ static int init(struct sr_context *sr_ctx) return std_init(sr_ctx, di, LOG_PREFIX); } -static int probe_port(const char *port, GSList **devices) +static int probe_port(const char *resource, const char *serialcomm, GSList **devices) { struct dev_context *devc; struct sr_dev_inst *sdi; - struct sr_serial_dev_inst *serial; + struct sr_scpi_dev_inst *scpi; + struct sr_scpi_hw_info *hw_info; struct sr_probe *probe; unsigned int i; - int len, num_tokens; - const char *manufacturer, *model_name, *version; const struct rigol_ds_model *model = NULL; - char buf[256]; - gchar **tokens, *channel_name; + gchar *channel_name; *devices = NULL; - if (!(serial = sr_serial_dev_inst_new(port, NULL))) - return SR_ERR_MALLOC; - if (serial_open(serial, SERIAL_RDWR) != SR_OK) + if (!(scpi = scpi_dev_inst_new(resource, serialcomm))) return SR_ERR; - len = serial_write(serial, "*IDN?", 5); - len = serial_read(serial, buf, sizeof(buf)); - if (serial_close(serial) != SR_OK) - return SR_ERR; - - sr_serial_dev_inst_free(serial); - - if (len == 0) - return SR_ERR_NA; - - buf[len] = 0; - tokens = g_strsplit(buf, ",", 0); - sr_dbg("response: %s [%s]", port, buf); - for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++); - - if (num_tokens < 4) { - g_strfreev(tokens); - return SR_ERR_NA; - } - - manufacturer = tokens[0]; - model_name = tokens[1]; - version = tokens[3]; + if (sr_scpi_open(scpi) != SR_OK) { + sr_info("Couldn't open SCPI device."); + sr_scpi_free(scpi); + return SR_ERR; + }; - if (strcasecmp(manufacturer, "Rigol Technologies")) { - g_strfreev(tokens); - return SR_ERR_NA; + if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { + sr_info("Couldn't get IDN response."); + sr_scpi_close(scpi); + sr_scpi_free(scpi); + return SR_ERR; } for (i = 0; i < ARRAY_SIZE(supported_models); i++) { - if (!strcmp(model_name, supported_models[i].name)) { + if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) && + !strcmp(hw_info->model, supported_models[i].name)) { model = &supported_models[i]; break; } } if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE, - manufacturer, model_name, version))) { - g_strfreev(tokens); + hw_info->manufacturer, hw_info->model, + hw_info->firmware_version))) { + sr_scpi_hw_info_free(hw_info); + sr_scpi_close(scpi); + sr_scpi_free(scpi); return SR_ERR_NA; } - g_strfreev(tokens); + sr_scpi_hw_info_free(hw_info); + sr_scpi_close(scpi); + + sdi->conn = scpi; - if (!(sdi->conn = sr_serial_dev_inst_new(port, NULL))) - return SR_ERR_MALLOC; sdi->driver = di; - sdi->inst_type = SR_INST_SERIAL; + sdi->inst_type = SR_INST_SCPI; if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) return SR_ERR_MALLOC; + devc->limit_frames = 0; devc->model = model; - for (i = 0; i < 2; i++) { - channel_name = (i == 0 ? "CH1" : "CH2"); - if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name))) + for (i = 0; i < model->analog_channels; i++) { + if (!(channel_name = g_strdup_printf("CH%d", i + 1))) return SR_ERR_MALLOC; + probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name); sdi->probes = g_slist_append(sdi->probes, probe); devc->analog_groups[i].name = channel_name; devc->analog_groups[i].probes = g_slist_append(NULL, probe); @@ -296,10 +322,10 @@ static int probe_port(const char *port, GSList **devices) sdi->probes = g_slist_append(sdi->probes, probe); devc->digital_group.probes = g_slist_append( devc->digital_group.probes, probe); - devc->digital_group.name = "LA"; - sdi->probe_groups = g_slist_append(sdi->probe_groups, - &devc->digital_group); } + devc->digital_group.name = "LA"; + sdi->probe_groups = g_slist_append(sdi->probe_groups, + &devc->digital_group); } for (i = 0; i < NUM_TIMEBASE; i++) { @@ -309,12 +335,16 @@ static int probe_port(const char *port, GSList **devices) devc->num_timebases = &timebases[i] - devc->timebases + 1; } - for (i = 0; i < NUM_VDIV; i++) { - if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) { - devc->vdivs = &timebases[i]; - devc->num_vdivs = NUM_VDIV - (&timebases[i] - &timebases[0]); - } - } + for (i = 0; i < NUM_VDIV; i++) + if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) + devc->vdivs = &vdivs[i]; + + if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE))) + return SR_ERR_MALLOC; + if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float)))) + return SR_ERR_MALLOC; + + devc->data_source = DATA_SOURCE_LIVE; sdi->priv = devc; @@ -332,21 +362,30 @@ static GSList *scan(GSList *options) int ret; const gchar *dev_name; gchar *port = NULL; + gchar *serialcomm = NULL; drvc = di->priv; for (l = options; l; l = l->next) { src = l->data; - if (src->key == SR_CONF_CONN) { + switch (src->key) { + case SR_CONF_CONN: port = (char *)g_variant_get_string(src->data, NULL); break; + case SR_CONF_SERIALCOMM: + serialcomm = (char *)g_variant_get_string(src->data, NULL); + break; } } devices = NULL; if (port) { - if (probe_port(port, &devices) == SR_ERR_MALLOC) + if (probe_port(port, serialcomm, &devices) == SR_ERR_MALLOC) { + g_free(port); + if (serialcomm) + g_free(serialcomm); return NULL; + } } else { if (!(dir = g_dir_open("/sys/class/usbmisc/", 0, NULL))) if (!(dir = g_dir_open("/sys/class/usb/", 0, NULL))) @@ -355,8 +394,10 @@ static GSList *scan(GSList *options) if (strncmp(dev_name, "usbtmc", 6)) continue; port = g_strconcat("/dev/", dev_name, NULL); - ret = probe_port(port, &devices); + ret = probe_port(port, serialcomm, &devices); g_free(port); + if (serialcomm) + g_free(serialcomm); if (ret == SR_ERR_MALLOC) { g_dir_close(dir); return NULL; @@ -379,8 +420,9 @@ static GSList *dev_list(void) static int dev_open(struct sr_dev_inst *sdi) { + struct sr_scpi_dev_inst *scpi = sdi->conn; - if (serial_open(sdi->conn, SERIAL_RDWR) != SR_OK) + if (sr_scpi_open(scpi) < 0) return SR_ERR; if (rigol_ds_get_dev_cfg(sdi) != SR_OK) @@ -393,11 +435,13 @@ static int dev_open(struct sr_dev_inst *sdi) static int dev_close(struct sr_dev_inst *sdi) { - struct sr_serial_dev_inst *serial; + struct sr_scpi_dev_inst *scpi; + + scpi = sdi->conn; - serial = sdi->conn; - if (serial && serial->fd != -1) { - serial_close(serial); + if (scpi) { + if (sr_scpi_close(scpi) < 0) + return SR_ERR; sdi->status = SR_ST_INACTIVE; } @@ -409,40 +453,90 @@ static int cleanup(void) return dev_clear(); } +static int analog_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + struct sr_probe *probe; + int analog_probes = 0; + GSList *l; + + switch (devc->model->series) { + case RIGOL_VS5000: + return VS5000_ANALOG_LIVE_WAVEFORM_SIZE; + case RIGOL_DS1000: + return DS1000_ANALOG_LIVE_WAVEFORM_SIZE; + default: + for (l = sdi->probes; l; l = l->next) { + probe = l->data; + if (probe->type == SR_PROBE_ANALOG && probe->enabled) + analog_probes++; + } + if (devc->data_source == DATA_SOURCE_MEMORY) { + if (analog_probes == 1) + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; + else + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + } else { + if (devc->model->series == AGILENT_DSO1000) + return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE; + else + return DS2000_ANALOG_LIVE_WAVEFORM_SIZE; + } + } +} + +static int digital_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + + switch (devc->model->series) { + case RIGOL_VS5000: + return VS5000_DIGITAL_WAVEFORM_SIZE; + case RIGOL_DS1000: + return DS1000_DIGITAL_WAVEFORM_SIZE; + default: + return 0; + } +} + static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, const struct sr_probe_group *probe_group) { struct dev_context *devc; - unsigned int i; + uint64_t samplerate; if (!sdi || !(devc = sdi->priv)) return SR_ERR_ARG; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } switch (id) { case SR_CONF_NUM_TIMEBASE: - *data = g_variant_new_int32(devc->num_timebases); + *data = g_variant_new_int32(devc->model->num_horizontal_divs); break; case SR_CONF_NUM_VDIV: - if (!probe_group) { - sr_err("No probe group specified."); - return SR_ERR_PROBE_GROUP; - } - for (i = 0; i < 2; i++) { - if (probe_group == &devc->analog_groups[i]) { - *data = g_variant_new_int32(devc->num_vdivs); - return SR_OK; - } + *data = g_variant_new_int32(8); + case SR_CONF_DATA_SOURCE: + if (devc->data_source == DATA_SOURCE_LIVE) + *data = g_variant_new_string("Live"); + else if (devc->data_source == DATA_SOURCE_MEMORY) + *data = g_variant_new_string("Memory"); + else + *data = g_variant_new_string("Segmented"); + break; + case SR_CONF_SAMPLERATE: + if (devc->data_source == DATA_SOURCE_LIVE) { + samplerate = analog_frame_size(sdi) / + (devc->timebase * devc->model->num_horizontal_divs); + *data = g_variant_new_uint64(samplerate); + } else { + return SR_ERR_NA; } - return SR_ERR_NA; + break; default: return SR_ERR_NA; } @@ -459,6 +553,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, unsigned int i, j; int ret; const char *tmp_str; + char buffer[16]; if (!(devc = sdi->priv)) return SR_ERR_ARG; @@ -467,12 +562,9 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, return SR_ERR_DEV_CLOSED; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } ret = SR_OK; @@ -496,14 +588,17 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, /* We have the trigger offset as a percentage of the frame, but * need to express this in seconds. */ t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases; - ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl); + g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl); + ret = set_cfg(sdi, ":TIM:OFFS %s", buffer); break; case SR_CONF_TIMEBASE: g_variant_get(data, "(tt)", &p, &q); for (i = 0; i < devc->num_timebases; i++) { if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) { devc->timebase = (float)p / q; - ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase); + g_ascii_formatd(buffer, sizeof(buffer), "%.9f", + devc->timebase); + ret = set_cfg(sdi, ":TIM:SCAL %s", buffer); break; } } @@ -522,6 +617,10 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, tmp_str = "CHAN1"; else if (!strcmp(devc->trigger_source, "CH2")) tmp_str = "CHAN2"; + else if (!strcmp(devc->trigger_source, "CH3")) + tmp_str = "CHAN3"; + else if (!strcmp(devc->trigger_source, "CH4")) + tmp_str = "CHAN4"; else tmp_str = (char *)devc->trigger_source; ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str); @@ -543,8 +642,10 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, if (vdivs[j][0] != p || vdivs[j][1] != q) continue; devc->vdiv[i] = (float)p / q; - return set_cfg(sdi, ":CHAN%d:SCAL %.3f", i + 1, - devc->vdiv[i]); + g_ascii_formatd(buffer, sizeof(buffer), "%.3f", + devc->vdiv[i]); + return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1, + buffer); } return SR_ERR_ARG; } @@ -570,6 +671,18 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, } } return SR_ERR_NA; + case SR_CONF_DATA_SOURCE: + tmp_str = g_variant_get_string(data, NULL); + if (!strcmp(tmp_str, "Live")) + devc->data_source = DATA_SOURCE_LIVE; + else if (!strcmp(tmp_str, "Memory")) + devc->data_source = DATA_SOURCE_MEMORY; + else if (devc->model->series >= RIGOL_DS1000Z + && !strcmp(tmp_str, "Segmented")) + devc->data_source = DATA_SOURCE_SEGMENTED; + else + return SR_ERR; + break; default: ret = SR_ERR_NA; break; @@ -584,7 +697,10 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, GVariant *tuple, *rational[2]; GVariantBuilder gvb; unsigned int i; - struct dev_context *devc = sdi->priv; + struct dev_context *devc = NULL; + + if (sdi) + devc = sdi->priv; if (key == SR_CONF_SCAN_OPTIONS) { *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, @@ -610,7 +726,6 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, } switch (key) { - break; case SR_CONF_DEVICE_OPTIONS: if (!probe_group) { sr_err("No probe group specified."); @@ -639,12 +754,15 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling)); break; case SR_CONF_VDIV: + if (!devc) + /* Can't know this until we have the exact model. */ + return SR_ERR_ARG; if (!probe_group) { sr_err("No probe group specified."); return SR_ERR_PROBE_GROUP; } g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); - for (i = 0; i < devc->num_vdivs; i++) { + for (i = 0; i < NUM_VDIV; i++) { rational[0] = g_variant_new_uint64(devc->vdivs[i][0]); rational[1] = g_variant_new_uint64(devc->vdivs[i][1]); tuple = g_variant_new_tuple(rational, 2); @@ -653,6 +771,11 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, *data = g_variant_builder_end(&gvb); break; case SR_CONF_TIMEBASE: + if (!devc) + /* Can't know this until we have the exact model. */ + return SR_ERR_ARG; + if (devc->num_timebases <= 0) + return SR_ERR_NA; g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); for (i = 0; i < devc->num_timebases; i++) { rational[0] = g_variant_new_uint64(devc->timebases[i][0]); @@ -663,9 +786,22 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, *data = g_variant_builder_end(&gvb); break; case SR_CONF_TRIGGER_SOURCE: + if (!devc) + /* Can't know this until we have the exact model. */ + return SR_ERR_ARG; *data = g_variant_new_strv(trigger_sources, devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4); break; + case SR_CONF_DATA_SOURCE: + if (!devc) + /* Can't know this until we have the exact model. */ + return SR_ERR_ARG; + /* This needs tweaking by series/model! */ + if (devc->model->series == RIGOL_DS2000) + *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources)); + else + *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1); + break; default: return SR_ERR_NA; } @@ -675,18 +811,20 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) { - struct sr_serial_dev_inst *serial; + struct sr_scpi_dev_inst *scpi; struct dev_context *devc; struct sr_probe *probe; + struct sr_datafeed_packet packet; GSList *l; - char cmd[256]; if (sdi->status != SR_ST_ACTIVE) return SR_ERR_DEV_CLOSED; - serial = sdi->conn; + scpi = sdi->conn; devc = sdi->priv; + devc->num_frames = 0; + for (l = sdi->probes; l; l = l->next) { probe = l->data; sr_dbg("handling probe %s", probe->name); @@ -696,61 +834,100 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) devc->enabled_analog_probes, probe); if (probe->enabled != devc->analog_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ - sprintf(cmd, ":CHAN%d:DISP %s", probe->index + 1, - probe->enabled ? "ON" : "OFF"); - if (rigol_ds_send(sdi, cmd) != SR_OK) + if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1, + probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; + devc->analog_channels[probe->index] = probe->enabled; } } else if (probe->type == SR_PROBE_LOGIC) { - if (probe->enabled) + if (probe->enabled) { devc->enabled_digital_probes = g_slist_append( devc->enabled_digital_probes, probe); + /* Turn on LA module if currently off. */ + if (!devc->la_enabled) { + if (set_cfg(sdi, ":LA:DISP ON") != SR_OK) + return SR_ERR; + devc->la_enabled = TRUE; + } + } if (probe->enabled != devc->digital_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ - sprintf(cmd, ":DIG%d:TURN %s", probe->index, - probe->enabled ? "ON" : "OFF"); - if (rigol_ds_send(sdi, cmd) != SR_OK) + if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index, + probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; + devc->digital_channels[probe->index] = probe->enabled; } } } + if (!devc->enabled_analog_probes && !devc->enabled_digital_probes) return SR_ERR; - sr_source_add(serial->fd, G_IO_IN, 50, rigol_ds_receive, (void *)sdi); + /* Turn off LA module if on and no digital probes selected. */ + if (devc->la_enabled && !devc->enabled_digital_probes) + if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK) + return SR_ERR; + + if (devc->data_source == DATA_SOURCE_LIVE) { + if (set_cfg(sdi, ":RUN") != SR_OK) + return SR_ERR; + } else if (devc->data_source == DATA_SOURCE_MEMORY) { + if (devc->model->series != RIGOL_DS2000) { + sr_err("Data source 'Memory' not supported for this device"); + return SR_ERR; + } + } else if (devc->data_source == DATA_SOURCE_SEGMENTED) { + sr_err("Data source 'Segmented' not yet supported"); + return SR_ERR; + } + + sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi); /* Send header packet to the session bus. */ std_session_send_df_header(cb_data, LOG_PREFIX); - if (devc->model->series == 1) { - /* Fetch the first frame. */ - if (devc->enabled_analog_probes) { - devc->channel_frame = devc->enabled_analog_probes->data; - if (rigol_ds_send(sdi, ":WAV:DATA? CHAN%d", - devc->channel_frame->index + 1) != SR_OK) - return SR_ERR; - } else { - devc->channel_frame = devc->enabled_digital_probes->data; - if (rigol_ds_send(sdi, ":WAV:DATA? DIG") != SR_OK) - return SR_ERR; - } + if (devc->enabled_analog_probes) + devc->channel_entry = devc->enabled_analog_probes; + else + devc->channel_entry = devc->enabled_digital_probes; + + devc->analog_frame_size = analog_frame_size(sdi); + devc->digital_frame_size = digital_frame_size(sdi); - devc->num_frame_bytes = 0; + if (devc->model->series < RIGOL_DS1000Z) { + /* Fetch the first frame. */ + if (rigol_ds_channel_start(sdi) != SR_OK) + return SR_ERR; } else { if (devc->enabled_analog_probes) { - /* Assume there already was a trigger event - don't wait */ - if (rigol_ds2xx2_acquisition_start(sdi, FALSE) != SR_OK) + if (devc->data_source == DATA_SOURCE_MEMORY) { + /* Apparently for the DS2000 the memory + * depth can only be set in Running state - + * this matches the behaviour of the UI. */ + if (set_cfg(sdi, ":RUN") != SR_OK) + return SR_ERR; + if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK) + return SR_ERR; + if (set_cfg(sdi, ":STOP") != SR_OK) + return SR_ERR; + } + if (rigol_ds_capture_start(sdi) != SR_OK) return SR_ERR; } } + /* Start of first frame. */ + packet.type = SR_DF_FRAME_BEGIN; + sr_session_send(cb_data, &packet); + return SR_OK; } static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) { struct dev_context *devc; - struct sr_serial_dev_inst *serial; + struct sr_scpi_dev_inst *scpi; + struct sr_datafeed_packet packet; (void)cb_data; @@ -761,12 +938,16 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) return SR_ERR; } + /* End of last frame. */ + packet.type = SR_DF_END; + sr_session_send(sdi, &packet); + g_slist_free(devc->enabled_analog_probes); g_slist_free(devc->enabled_digital_probes); devc->enabled_analog_probes = NULL; devc->enabled_digital_probes = NULL; - serial = sdi->conn; - sr_source_remove(serial->fd); + scpi = sdi->conn; + sr_scpi_source_remove(scpi); return SR_OK; }